JP2001274321A - High breakdown voltage flat semiconductor device - Google Patents

High breakdown voltage flat semiconductor device

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Publication number
JP2001274321A
JP2001274321A JP2000082400A JP2000082400A JP2001274321A JP 2001274321 A JP2001274321 A JP 2001274321A JP 2000082400 A JP2000082400 A JP 2000082400A JP 2000082400 A JP2000082400 A JP 2000082400A JP 2001274321 A JP2001274321 A JP 2001274321A
Authority
JP
Japan
Prior art keywords
gas
package
semiconductor device
insulation
nitrogen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000082400A
Other languages
Japanese (ja)
Inventor
Tetsumi Takano
哲美 高野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP2000082400A priority Critical patent/JP2001274321A/en
Publication of JP2001274321A publication Critical patent/JP2001274321A/en
Pending legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To increase dielectric strength and reduce insulation size in a package by selecting a gas having a better insulation property than a nitrogen gas which has been used in the conventional method, for a gas to be enclosed in the package of a flat semiconductor device for power. SOLUTION: In this flat semiconductor device, an IGBT chip 2 and a diode chip 3 are assembled in combination with collector electrodes 7, insulation partition walls 8 and the like in the sealed flat package 1 comprising an outer case (ceramic) 4 and case electrodes 5, 6; and then an insulation is enclosed in the package. For the insulation gas to be enclosed in the package, a carbon dioxide which has a better insulation property than nitrogen and whose leakage gas has no adverse effect on the surrounding areas is used instead of a nitrogen gas which has been used in the conventional method.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、パワーエレクトロ
ニクス分野で使用する電力用の高耐圧平形半導体装置に
関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high withstand voltage flat semiconductor device for electric power used in the field of power electronics.

【0002】[0002]

【従来の技術】まず、インバータに適用するパワーIG
BTモジュールを例に、頭記した電力用の平形半導体装
置の構造を図1(a),(b) で説明する。図において、1は
密閉形の平形パッケージ、2はIGBTチップ、3はダ
イオードチップであり、平形パッケージ1はセラミック
ス製の外囲ケース4と、該外囲ケース4を挟んでその上
下両面にシール接合した銅製のケース電極(エミッタ
側)5,ケース電極(コレクタ側)5とからなる。ここ
で、IGBTチップ2,ダイオードチップ3は図示のよ
うに平面上に配列した上で各チップごとに集電極7を重
ね合わせ、さらにチップ相互間には組立て位置保持用の
絶縁隔壁8を配してケース電極5と6の間に挟持してお
り、実使用時には平形パッケージ1 を外部の放熱体に圧
接して取付け、チップ2,3の発熱をケース電極5,6
を伝熱して外部に効率よく放熱するようにしている。
2. Description of the Related Art First, a power IG applied to an inverter
The structure of the flat semiconductor device for electric power described above will be described with reference to FIGS. 1A and 1B by taking a BT module as an example. In the figure, 1 is a sealed flat package, 2 is an IGBT chip, and 3 is a diode chip. The flat package 1 is a ceramic outer case 4 and is sealed to both upper and lower surfaces with the outer case 4 interposed therebetween. And a case electrode (emitter side) 5 and a case electrode (collector side) 5 made of copper. Here, the IGBT chip 2 and the diode chip 3 are arranged on a plane as shown in the drawing, and a collecting electrode 7 is superposed on each chip, and an insulating partition 8 for holding an assembling position is arranged between the chips. In actual use, the flat package 1 is pressed against an external heat radiator and attached to the case electrodes 5 and 6 so that the heat generated by the chips 2 and 3 is removed from the case electrodes 5 and 6.
To efficiently radiate heat to the outside.

【0003】また、前記のように圧接構造を採用した平
形半導体モジュールにおいては、通常のパワートランジ
スタモジュールのようにパワー半導体チップの周域をパ
ッケージ内部で樹脂封止せずに、その代わりにパッケー
ジ内部の構造物を使用環境から保護するために絶縁ガス
として不活性ガスを封入しており、その封入ガスとして
従来装置では窒素ガスが用いられている。
Further, in a flat semiconductor module employing the above-described pressure contact structure, the peripheral region of the power semiconductor chip is not resin-sealed inside the package as in a normal power transistor module. In order to protect the structure from the use environment, an inert gas is sealed as an insulating gas, and a nitrogen gas is used in the conventional apparatus as the sealed gas.

【0004】[0004]

【発明が解決しようとする課題】ところで、昨今ではパ
ワー半導体デバイスの高耐圧,大電流化が急速に進み、
現在では耐圧4.5〜6kVクラスのパワーIGBTが
開発されている。この場合に、前記のように平形パッケ
ージ内に封入した窒素ガスは放電物理から見ると負イオ
ンを作らない気体であり、局所的な絶縁欠陥による部分
放電の現象において他の負イオンを作る絶縁気体に比べ
て絶縁耐力の面から見て有利な気体ではない。なお、空
気は窒素ガスに比べ負イオンの形成を生じる酸素を含ん
でいるので窒素ガスよりも絶縁耐力が優れているが、活
性な酸素を含んで酸化作用があること、また比較的大き
なギャップでも絶縁耐力の向上は高々10%程度である
ことから、高耐圧用の絶縁ガスとしては殆ど用いられて
ない。
By the way, in recent years, high breakdown voltage and large current of power semiconductor devices have been rapidly progressing.
At present, a power IGBT with a withstand voltage of 4.5 to 6 kV has been developed. In this case, the nitrogen gas sealed in the flat package as described above is a gas that does not produce negative ions from the viewpoint of discharge physics, and is an insulating gas that produces other negative ions in a partial discharge phenomenon due to local insulation defects. It is not an advantageous gas in terms of dielectric strength as compared with. In addition, air has a higher dielectric strength than nitrogen gas because it contains oxygen, which causes the formation of negative ions, compared with nitrogen gas.However, it contains active oxygen and has an oxidizing effect. Since the improvement of the dielectric strength is at most about 10%, it is hardly used as an insulating gas for high withstand voltage.

【0005】また、絶縁耐力を決定付ける実効電離係数
についても、図2の規約電界/電離係数の関係を表す特
性図の特性線C1 で表すように窒素ガスは低い電界領域
から急速に増大し、また高電界領域においても電離係数
が大である。一方,図1に示した半導体装置の組立構造
において、最も厳しい絶縁耐力が要求されるのはIGB
Tチップ2,ダイオードチップ3、および絶縁隔壁8に
対する沿面絶縁であり、特にこれら部品の表面に塵埃な
どの微小な異物が付着していると、図3に示す異物の大
きさと相対放電破壊電圧との関係特性図で表すように、
異物の大きさによって絶縁耐力が急速に低下する。
As for the effective ionization coefficient that determines the dielectric strength, the nitrogen gas rapidly increases from a low electric field region as shown by a characteristic line C1 in the characteristic diagram showing the relation between the specific electric field and the ionization coefficient in FIG. Further, the ionization coefficient is large even in a high electric field region. On the other hand, in the assembly structure of the semiconductor device shown in FIG.
This is a creeping insulation for the T chip 2, the diode chip 3 and the insulating partition 8. Particularly, when minute foreign matter such as dust adheres to the surface of these parts, the size of the foreign matter and the relative discharge breakdown voltage shown in FIG. As shown by the relationship characteristic diagram of
The dielectric strength rapidly decreases depending on the size of the foreign matter.

【0006】また、図4(a),(b) で示すように、接地金
属10の上に芯線11aを絶縁外被11bで被覆した高
圧リード線11を重ねて配線した絶縁構成、あるいは図
4(c) のように接地金属10に絶縁誘電体12を挟んで
高圧導体13を配置した絶縁構成では、その周囲雰囲気
のガスと誘電体との誘電率や導電率の相違から、図中に
おけるP1,あるいはP2 で示す境界部分に非常に高い電
界集中が生じる。特に、図4(a),(b) の配線構造では、
接地金属10に外被リード線11が接する界面部分P1
においては理論上無限大の電界が生じる。また、図4
(c) のように高圧導体13と接地金属10との間に介挿
した絶縁誘電体12が微小なガス相の隙間P2 を隔てて
高圧導体13に対峙している構造では、隙間P2 の気相
に集中する電界が、高圧導体13と接地金属10との電
位差を両者間の距離で除した平均電界に比べ絶縁誘電体
12とガスの誘電率倍に相応した値にまで上昇する。
As shown in FIGS. 4 (a) and 4 (b), an insulation structure in which a high voltage lead wire 11 in which a core wire 11a is covered with an insulation jacket 11b is superposed on a ground metal 10 and In the insulating configuration in which the high-voltage conductor 13 is disposed on the ground metal 10 with the insulating dielectric 12 interposed therebetween as shown in FIG. 3C, the difference between the dielectric constant and the electrical conductivity between the gas in the surrounding atmosphere and the dielectric causes , Or a very high electric field concentration occurs at the boundary indicated by P2. In particular, in the wiring structure of FIGS. 4 (a) and 4 (b),
Interface portion P1 where outer sheathed lead wire 11 contacts ground metal 10
, A theoretically infinite electric field is generated. FIG.
In the structure in which the insulating dielectric 12 interposed between the high-voltage conductor 13 and the ground metal 10 is opposed to the high-voltage conductor 13 with a small gas-phase gap P2 as shown in FIG. The electric field concentrated in the phase increases to a value corresponding to the dielectric constant of the insulating dielectric 12 and the gas times the average electric field obtained by dividing the potential difference between the high-voltage conductor 13 and the ground metal 10 by the distance therebetween.

【0007】このために、前記した境界部分P1,P2 に
部分的な放電が生じると、これが引き金となって急速に
絶縁構造全体の絶縁破壊にまで進展するようになる。し
かも、図1のように平形パッケージ1の狭い空間内にI
GBTチップ2,ダイオードチップ3,および絶縁隔壁
8を集積して組み込んだ平形半導体装置では、図4で述
べたように細隙を隔てて高圧部分と接地金属,ないし絶
縁誘電体が対向する箇所が常に存在している。
For this reason, when a partial discharge occurs at the above-mentioned boundary portions P1 and P2, this triggers and rapidly progresses to dielectric breakdown of the entire insulating structure. In addition, as shown in FIG.
In a flat semiconductor device in which the GBT chip 2, the diode chip 3, and the insulating partition 8 are integrated and assembled, as shown in FIG. 4, the high voltage portion and the ground metal or the insulating dielectric face each other with a small gap therebetween. Always exists.

【0008】このことから、定格電圧4.5〜6kVク
ラスの高耐圧平形半導体装置に対して、図1に示した平
形パッケージ1に窒素ガスを封入した場合には、図2で
述べた窒素ガスの電離係数特性からIGBTチップ2,
ダイオードチップ3とコレクタ側のケース電極6,絶縁
隔壁8との間に高い電界集中が生じてこの部分に非常に
大きな電離増倍が生じ、これが引きがねとなって局部的
な放電が発生し、ついには全路破壊に発展するにいた
る。
For this reason, when nitrogen gas is sealed in the flat package 1 shown in FIG. 1 for a high breakdown voltage flat semiconductor device having a rated voltage of 4.5 to 6 kV class, the nitrogen gas described in FIG. IGBT chip 2,
A high electric field concentration occurs between the diode chip 3 and the case electrode 6 on the collector side and the insulating partition wall 8, causing a very large ionization multiplication in this portion, which triggers a local discharge. Eventually, the road will be destroyed.

【0009】なお、絶縁耐力向上のためにパッケージ内
に封入する絶縁ガスとして、SF6のようなハロゲン系
ガスを封入することも考えられるが,SF6 ガスは地球
温室効果の高いガスであることが判明していて、次第に
その使用が規制される傾向にあること、また半導体装置
に事故が発生した場合に、SF6 のようなハロゲンガス
は高温のアークに触れて容易に分解し、フッ素や塩素の
化合物であるふっ酸や塩酸,その2次反応物が発生す
る。これらは非常に毒性が強く、パッケージからのガス
漏れが生じると周囲環境に悪影響を及ぼすおそれがあ
る。
Although it is conceivable to enclose a halogen-based gas such as SF 6 as an insulating gas in the package to improve the dielectric strength, SF 6 gas is a gas having a high global greenhouse effect. there have been found, gradually it tends to its use is restricted, and when an accident occurs in the semiconductor device, a halogen gas such as SF 6 is easily decomposed by touching the hot arc, fluorine Ya Hydrofluoric acid and hydrochloric acid, which are chlorine compounds, and their secondary reactants are generated. These are very toxic and can cause adverse effects on the surrounding environment if gas leaks from the package.

【0010】本発明は上記の点に鑑みなされたものであ
り、パッケージ内に封入するガスについて、発明者等が
各種ガスの絶縁性,漏れガスの周囲環境に与える影響な
どの物性を検討した研究結果を基に、従来用いられてい
た窒素ガスに代わり、窒素ガスよりも絶縁性がより一層
優れたガスを選定して絶縁耐力の向上,パッケージ内の
絶縁寸法の縮減化が図れるようにした高耐圧平形半導体
装置を提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above points, and has been studied by the inventors on the properties of the gas to be sealed in the package, such as the insulating properties of various gases and the effects of leaked gas on the surrounding environment. Based on the results, instead of the nitrogen gas used conventionally, a gas with better insulation than nitrogen gas was selected to improve the dielectric strength and reduce the insulation size in the package. It is an object of the present invention to provide a breakdown voltage semiconductor device.

【0011】[0011]

【課題を解決するための手段】上記目的を達成するため
に、本発明によれば、密閉形の平形パッケージにパワー
半導体チップを組み込み、パッケージ内に絶縁ガスを封
入した電力用の高耐圧平形半導体装置において、絶縁ガ
スとして二酸化炭素を採用するものとする。二酸化炭素
は、低電界領域における電離係数は窒素と同等である
が、高電界領域においては窒素に比べて低い電離係数を
示し、これによりパッケージ内に局所的な高い電界集中
が生じても、その部分での放電開始を抑止することがで
きる。また、準平等電界中での絶縁破壊電圧について
も、二酸化炭素は窒素よりも高く、(特に圧力×ギャッ
プ長)の低い領域では窒素に比べて約1.5倍の絶縁耐
力を示すことから、全体としての絶縁破壊電圧が高くな
り、これによりパッケージの封入ガスとして窒素を用い
ていた従来のものと比べて絶縁耐力の向上,および絶縁
寸法の縮減化が図れる。
According to the present invention, a power semiconductor chip is incorporated in a sealed flat package, and an insulating gas is sealed in the package. In the apparatus, carbon dioxide is adopted as the insulating gas. Carbon dioxide has the same ionization coefficient in the low electric field region as nitrogen, but exhibits a lower ionization coefficient than nitrogen in the high electric field region. It is possible to suppress the start of discharge in a portion. Also, regarding the dielectric breakdown voltage in a quasi-equivalent electric field, carbon dioxide is higher than nitrogen, and in a region where pressure (gap length) is low, the dielectric strength is approximately 1.5 times that of nitrogen. As a whole, the dielectric breakdown voltage is increased, and as a result, the dielectric strength can be improved and the insulation dimensions can be reduced as compared with the conventional device using nitrogen as the gas for filling the package.

【0012】[0012]

【発明の実施の形態】本発明の実施例においては、図1
に示した半導体装置のパッケージ内に封入する絶縁ガス
に二酸化炭素を用いるものし、そのために図1における
平形パッケージ1に外囲ケース4を貫通したガス導管9
を配管しておき、モジュール組立後にガス導管9を通じ
てパッケージ内を真空引きして空気を二酸化炭素にガス
置換した上でガス導管9を封じ切る。
DESCRIPTION OF THE PREFERRED EMBODIMENTS In an embodiment of the present invention, FIG.
As shown in FIG. 1, carbon dioxide is used as an insulating gas to be sealed in the package of the semiconductor device. For this purpose, a gas conduit 9 penetrating through the outer case 4 to the flat package 1 in FIG.
After the module is assembled, the interior of the package is evacuated through the gas conduit 9 to replace the air with carbon dioxide, and then the gas conduit 9 is sealed off.

【0013】ここで、二酸化炭素は図2の特性線C2 で
表すように、低電界領域では窒素と同等の電離係数であ
るが、高電界領域においては窒素に比べて低い電離係数
を示す。これにより、図4(a) 〜(c) の絶縁構造で境界
部分P1,P2 に局所的な電界集中部分が存在する場合で
も、周囲気体に二酸化炭素を用いることによりその部分
での放電開始を抑止することができる。
Here, as shown by the characteristic line C2 in FIG. 2, carbon dioxide has an ionization coefficient equivalent to that of nitrogen in a low electric field region, but has a lower ionization coefficient in a high electric field region than nitrogen. Thus, even if a local electric field concentration portion exists at the boundary portions P1 and P2 in the insulating structure shown in FIGS. 4 (a) to 4 (c), discharge starts at that portion by using carbon dioxide as the surrounding gas. Can be deterred.

【0014】また、図5(a),(b) は準平等電界中でのP
d (圧力×ギャップ長)に対する窒素と二酸化炭素との
絶縁破壊電圧比の関係を表した特性図であり、(a) 図は
正極性電圧印加の場合、(b) は負極性電圧印加の場合を
示している。この特性図から判るように、二酸化炭素の
絶縁破壊電圧はPd の広い範囲で窒素より高く、特に低
いPd 領域では約1.5倍の絶縁耐力を有している。こ
れにより、図2で述べた放電開始の抑制効果と併せて、
絶縁系全体での絶縁破壊電圧が窒素に比べて上昇し、平
形半導体装置として絶縁耐力の向上, および絶縁寸法の
縮小化が実現できる。
FIGS. 5 (a) and 5 (b) show P and P in a quasi-equal electric field.
FIG. 4 is a characteristic diagram showing a relationship between a breakdown voltage ratio of nitrogen and carbon dioxide to d (pressure × gap length), where (a) shows a case where a positive voltage is applied, and (b) shows a case where a negative voltage is applied. Is shown. As can be seen from this characteristic diagram, the dielectric breakdown voltage of carbon dioxide is higher than that of nitrogen in a wide range of Pd, and has a dielectric strength of about 1.5 times in a particularly low Pd region. Thereby, in addition to the effect of suppressing the start of discharge described in FIG.
The dielectric breakdown voltage of the entire insulating system is higher than that of nitrogen, so that a flat semiconductor device can have an improved dielectric strength and a reduced insulating dimension.

【0015】[0015]

【発明の効果】以上述べたように、本発明によれば、高
耐圧, 大容量の平形半導体装置のパッケージに封入する
ガスとして二酸化炭素を用いたことにより、半導体装置
としての絶縁耐力の向上と併せて、絶縁寸法の縮減, 絶
縁裕度の向上が実現できる。
As described above, according to the present invention, the use of carbon dioxide as a gas to be sealed in the package of a high-voltage, large-capacity flat semiconductor device improves the dielectric strength of the semiconductor device. At the same time, the insulation dimensions can be reduced and the insulation margin can be improved.

【図面の簡単な説明】[Brief description of the drawings]

【図1】パワーIGBTモジュールを実施対象とした平
形半導体装置の構成図であり、(a) はパッケージに実装
したIGBT, ダイオードチップの配列を模式的に表し
た平面図、(b) はその内部構造を表す側視断面図
FIG. 1 is a configuration diagram of a flat semiconductor device in which a power IGBT module is implemented. FIG. 1 (a) is a plan view schematically showing an arrangement of IGBTs and diode chips mounted on a package, and FIG. Side view sectional view showing structure

【図2】窒素と二酸化炭素を対比して表した規約電界と
電離係数との関係特性図
FIG. 2 is a characteristic diagram showing a relation between a normal electric field and an ionization coefficient, which is obtained by comparing nitrogen and carbon dioxide.

【図3】電圧印加の部品表面に付着した異物の大きさと
相対破壊電圧との関係を表す特性図
FIG. 3 is a characteristic diagram showing a relationship between the size of a foreign substance attached to the surface of a component to which a voltage is applied and a relative breakdown voltage.

【図4】接地金属と高圧導体との間の局所的な電界集中
を説明するための模式図で、(a),(b) は接地金属に接し
て外被リード線を配線したモデルの側面図, および断面
図、(c) は接地金属と高圧導体との間に絶縁誘電体を介
挿したモデルの側面図
FIGS. 4A and 4B are schematic diagrams for explaining local electric field concentration between a ground metal and a high-voltage conductor. FIGS. 4A and 4B are side views of a model in which a sheath lead wire is connected to the ground metal. Figure and cross section, (c) is a side view of the model with an insulating dielectric interposed between the ground metal and the high-voltage conductor

【図5】準平等電界中でのPd(圧力×ギャップ長)と、
窒素に対する二酸化炭素の絶縁破壊電圧比との関係を表
す特性図
FIG. 5 shows Pd (pressure × gap length) in a quasi-equal electric field,
Characteristic diagram showing the relationship between the breakdown voltage ratio of carbon dioxide to nitrogen

【符号の説明】[Explanation of symbols]

1 平形パッケージ 2 IGBTチップ 3 ダイオードチップ 4 セラミックス製の外囲ケース 5,6 ケース電極 7 集電極 8 絶縁隔壁 9 ガス導管 DESCRIPTION OF SYMBOLS 1 Flat package 2 IGBT chip 3 Diode chip 4 Surrounding case made of ceramics 5, 6 Case electrode 7 Collector electrode 8 Insulating partition 9 Gas conduit

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】密閉形の平形パッケージにパワー半導体チ
ップを実装した電力用の高耐圧平形半導体装置であり、
パワー半導体チップ,および集電極を重ね合わせてパッ
ケージのケース電極間に挟持し、かつパッケージ内に絶
縁ガスを封入したものにおいて、絶縁ガスとして二酸化
炭素を封入したことを特徴とする高耐圧平形半導体装
置。
1. A high-voltage flat semiconductor device for electric power, comprising a power semiconductor chip mounted on a sealed flat package,
A high-withstand-voltage flat semiconductor device characterized in that a power semiconductor chip and a collector electrode are stacked and sandwiched between case electrodes of a package, and carbon dioxide is sealed as an insulating gas in a package in which an insulating gas is sealed. .
JP2000082400A 2000-03-23 2000-03-23 High breakdown voltage flat semiconductor device Pending JP2001274321A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000082400A JP2001274321A (en) 2000-03-23 2000-03-23 High breakdown voltage flat semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000082400A JP2001274321A (en) 2000-03-23 2000-03-23 High breakdown voltage flat semiconductor device

Publications (1)

Publication Number Publication Date
JP2001274321A true JP2001274321A (en) 2001-10-05

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000082400A Pending JP2001274321A (en) 2000-03-23 2000-03-23 High breakdown voltage flat semiconductor device

Country Status (1)

Country Link
JP (1) JP2001274321A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007311441A (en) * 2006-05-17 2007-11-29 Hitachi Ltd Power semiconductor module
JP2013021021A (en) * 2011-07-07 2013-01-31 Fuji Electric Co Ltd Manufacturing method of power module

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007311441A (en) * 2006-05-17 2007-11-29 Hitachi Ltd Power semiconductor module
JP2013021021A (en) * 2011-07-07 2013-01-31 Fuji Electric Co Ltd Manufacturing method of power module

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