JP2001267582A - Semiconductor device, liquid crystal display device, manufacturing method for semiconductor device and manufacturing method for liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simplify a manufacturing process, without degrading the electrical characteristic of a thin-film field-effect transistor. SOLUTION: In the semiconductor device, thin-film field-effect transistors 17, 18 which contain channel regions 5, 7 are provided. A transparent substrate 1, a single-layer substrate film 2 and the upper layers 5, 7 are provided. The film 2 is formed on the substrate 1. The upper layers 5, 7 are formed, so as to come into contact with the film 2, and they contain a polysilicon film which becomes the regions 5, 7 for the transistors 17, 18.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device, a method of manufacturing the same, and a liquid crystal display device and a method of manufacturing the same. More specifically, the present invention relates to a semiconductor device having a thin film field effect transistor, a method of manufacturing the same, and a liquid crystal display device. It relates to the manufacturing method.

[0002]

2. Description of the Related Art In recent years, as one type of liquid crystal display device, a liquid crystal display device using a polysilicon thin film field effect transistor has been developed. The liquid crystal display device using the polysilicon thin film field effect transistor has various advantages, such as a higher definition display screen, as compared with the conventional liquid crystal display device using the amorphous silicon thin film field effect transistor. Therefore, development is being vigorously promoted.

A liquid crystal display device using the above-described polysilicon thin film field effect transistor has a structure as shown in FIG. 18, for example. FIG.
FIG. 2 is a schematic cross-sectional view showing a conventional liquid crystal display device, showing a glass substrate on which a thin film field effect transistor, which is a part of the liquid crystal display device, is formed. A conventional liquid crystal display device will be described with reference to FIG.

Referring to FIG. 18, the liquid crystal display device has a drive circuit area and a display pixel area. Glass substrate 101
Above, a p-type thin film field effect transistor 117 is formed in the drive circuit region, and n in the display pixel region.
Type thin film field effect transistor 118 and storage capacitor 11
9 are formed.

In the drive circuit area, the glass substrate 10
1, a base film 102 is formed. This base film 10
2 denotes a silicon nitride film 102a and a silicon oxide film 102
b). On the base film 102, the source / drain regions 106a and 106b of the p-type thin film field effect transistor 117 and the channel region 107 are formed by a polysilicon film as a semiconductor film of the same layer. A p-type conductive impurity is implanted in the source / drain regions 106a and 106b. An insulating film 108 serving as a gate insulating film is formed over the source / drain regions 106a and 106b and the channel region 107. In a region above the channel region 107, a gate electrode 109a is formed over the insulating film. On the gate electrode 109a, a protective film 111 is formed. Source / drain regions 106a, 106
On b, contact holes 112a and 112b are formed by removing a part of the protective film 111 and the insulating film 108 by etching. Electrodes 113a and 113b are formed to extend from inside contact holes 112a and 112b to the upper surface of protective film 111. Electrodes 113a and 113b and protective film 111
An insulating film 114 is formed on the substrate.

In a display pixel area of a liquid crystal display device,
A base film 102 which is a two-layer film composed of a silicon nitride film 102a and a silicon oxide film 102b on a glass substrate 101
Are formed. The source / drain region 1 of the n-type thin film field effect transistor 118 is
04a and 104b and the channel region 105 are formed of a polysilicon film as a semiconductor film of the same layer. The lower electrode 103 of the storage capacitor 119 is formed on the base film 102 at a distance from the region where the n-type thin film field effect transistor 118 is formed. Source/
Drain regions 104a, 104b and channel region 105
An insulating film 108 is formed on the upper electrode 103 and the lower electrode 103. The insulating film 108 includes a portion functioning as a gate insulating film of the n-type thin film field effect transistor 118 and a portion functioning as a dielectric film of the storage capacitor 119. That is, the insulating film 108 located on the channel region 105
Functions as a gate insulating film, and the insulating film 118 located on the lower electrode 103 functions as a dielectric film. In a region located on the channel region 105, the insulating film 108
A gate electrode 109b is formed thereon. In a region located on the lower electrode 103, the common electrode 110 as an upper electrode is formed on the insulating film 108 as a dielectric film.
Are formed. Gate electrode 109b and common electrode 11
On 0, a protective film 111 is formed. Protective film 1
Contact holes 112c to 112e are formed by removing a part of 11 and insulating film 108 by etching. These contact holes 112c to 11c
Electrodes 113c to 113e are formed to extend from the inside of 2e to the upper surface of protective film 111, respectively. An insulating film 114 is formed on the electrodes 113c to 113e and the protective film 111. Thereafter, in the display pixel region, a transparent electrode or the like is formed according to a normal process to manufacture a liquid crystal display device.

Next, a method of manufacturing the liquid crystal display device shown in FIG. 18 will be briefly described. Referring to FIG. 18, first, PECVD (Plasma Enhanced Chemical
A silicon nitride film 102a and a silicon oxide film 102b to be the base film 102 are formed by vapor deposition. Next, the formed thin film field effect transistor 1
In order to suppress the variation in the electrical characteristics of 17, 118,
The surface of the base film 102 is subjected to wet cleaning. After the wet cleaning, an amorphous silicon film is formed on the base film 102. By annealing the amorphous silicon film using an excimer laser, a polysilicon film to be a channel region of the p-type thin film field effect transistor 117 and the n-type thin film field effect transistor 118 is formed. Thereafter, a resist film is formed on the formed polysilicon film. Using this resist film as a mask, a polysilicon film including the regions to be the channel regions 107 and 105 and a polysilicon film to be the lower electrode 103 are formed by dry etching. After that, the resist film is removed.

Next, an n-type conductive impurity is implanted into the polysilicon film to be the lower electrode 103 of the storage capacitor 119. Thus, the lower electrode 103 is formed. Next, an insulating film 108 serving as a gate insulating film and a dielectric film of the capacitor electrode 119 is formed. A chromium film is formed on the insulating film 108 by using a sputtering method. A resist film is formed on the chromium film. Using this resist film as a mask, a part of the chromium film is removed by etching, so that gate electrodes 109a and 109b and common electrode 110 are formed. Thereafter, source / drain regions 104a and 104b are formed by injecting n-type conductive impurities into predetermined regions. The source / drain regions 106a and 106b are formed by implanting p-type conductive impurities into predetermined regions. As the n-type conductive impurities, for example, phosphorus ions can be used, and as the p-type conductive impurities, for example, boron ions can be used. Thus, a p-type thin film field effect transistor 117 and an n-type thin film field effect transistor 118 are formed.

Next, a protective film 11 as an interlayer insulating film is formed on the gate electrodes 109a and 109b and the common electrode 110.
Form one. Thereafter, activation annealing is performed. A resist film is formed on the protective film 111. By using the resist film as a mask, a part of the protective film 111 and the insulating film 108 is removed to form contact holes 112a to 112a.
2e is formed. After that, the resist film is removed. A conductor film made of chromium or an aluminum-based alloy is formed inside the contact holes 112a to 112e and on the upper surface of the protective film 111. A resist film is formed on the conductor film. By using the resist film as a mask and removing the conductive film by etching, the electrodes 113a to 113a-1 are removed.
13e is formed. After that, the resist film is removed.

Thereafter, the channel regions 105 and 107 are hydrogenated using hydrogen plasma to improve and stabilize the characteristics of the thin film field effect transistor.
Then, an insulating film 114 is formed over the electrodes 113a to 113e. Thus, a structure as shown in FIG. 18 can be obtained.

In the drive circuit region, an n-type thin film field effect transistor other than the illustrated p-type thin film field effect transistor 117 is simultaneously formed using the above-described method.
These thin film field effect transistors are components of a driving circuit. In the display pixel region, a display pixel is formed by electrically connecting the n-type thin-film field-effect transistor 118 and a separately formed transparent electrode. Further, the glass substrate 101 on which these elements are formed is
It is bonded to another glass substrate on which a color filter and a counter electrode are formed. Then, liquid crystal is injected into a gap formed between the glass substrate 101 and the other glass substrate,
By performing a predetermined process such as sealing, a liquid crystal display device can be obtained.

[0012]

In the above-described manufacturing process of the liquid crystal display device, the surface of the base film 102 is subjected to wet cleaning before forming the amorphous silicon film.
This is presumed to be effective in removing foreign substances on the surface of the base film 102, thereby preventing such foreign substances from entering the formed amorphous silicon film. From the viewpoint of manufacturing cost, performing the above-described wet cleaning step leads to an increase in the number of manufacturing steps, and as a result, one of the causes of increasing the manufacturing cost of the liquid crystal display device. However, it is empirically known that when the wet cleaning step is not performed, the variation in the electrical characteristics of the formed thin film field effect transistor increases. That is, it was difficult to omit the wet cleaning step (simplify the manufacturing steps) without deteriorating the electrical characteristics of the thin film field effect transistor.

Further, in order to omit the wet cleaning step,
The underlayer film 102 and the amorphous silicon film are plasma-C
A method of continuously forming using the VD method is also conceivable. By doing so, it is considered that the possibility that foreign matter adheres to the base film 102 can be reduced, so that it is possible to suppress the foreign matter from entering the amorphous silicon film even if the wet cleaning step is omitted. However, in this case, since the amorphous silicon film is formed by the plasma CVD method, there is a problem that the mobility in the channel region of the formed thin film field effect transistor is relatively reduced due to the film quality of the amorphous silicon film.

As described above, it has conventionally been difficult to simplify the manufacturing process without deteriorating the electrical characteristics of the thin film field effect transistor.

[0015] The present invention has been made to solve the above-mentioned problems, and one object of the present invention is to provide:
An object of the present invention is to provide a semiconductor device capable of simplifying a manufacturing process without deteriorating electrical characteristics of a thin film field effect transistor, and a method for manufacturing the same.

Another object of the present invention is to provide a liquid crystal display device capable of simplifying the manufacturing process without deteriorating the electrical characteristics of a thin film field effect transistor constituting a pixel or the like, and a method of manufacturing the same. It is to be.

[0017]

According to one aspect of the present invention, there is provided a semiconductor device including a thin film field effect transistor including a channel region. The semiconductor device includes a transparent substrate, a single-layer underlayer, and an upper layer. Prepare. The single-layer base film is formed on a transparent substrate. The upper layer includes a polysilicon film formed in contact with the single-layer base film and serving as a channel region of the thin-film field-effect transistor.

This makes it possible to reduce the number of film forming steps for forming the base film as compared with the conventional case where a two-layer film of a silicon nitride film and a silicon oxide film is used as the base film. As a result, the manufacturing cost of the semiconductor device can be reduced.

In the semiconductor device according to the first aspect, the single-layer base film is preferably made of a silicon nitride film.

In this case, by using a silicon nitride film as the single-layer underlayer film, the electrical characteristics of the thin-film field-effect transistor can be degraded without performing a wet cleaning step before forming the upper amorphous silicon film. Can be prevented. In other words, when an amorphous silicon film is formed on a silicon oxide film as in the prior art, a polysilicon film formed by annealing the amorphous silicon film is used unless the surface of the silicon oxide film is wet-cleaned in advance. The electric characteristics of the thin film field effect transistor sometimes fluctuated. However, when an amorphous silicon film is formed on the surface of the silicon nitride film, even if the cleaning process is not performed on the surface of the silicon nitride film,
It has been empirically known that the electrical characteristics of a thin film field effect transistor using a polysilicon film obtained by annealing this amorphous silicon film as a channel region have no variation and are relatively excellent. This is presumably because foreign substances are less likely to adhere to the surface of the silicon nitride film than to the surface of the silicon oxide film, and consequently the amount of foreign substances that enter the amorphous silicon film is reduced.
For this reason, if the single-layer base film is formed of a silicon nitride film, the number of film forming steps can be reduced as compared with the related art, and the electrical characteristics of the thin-film field-effect transistor are not degraded.
The conventionally required wet cleaning step can be omitted.

In the semiconductor device according to the first aspect, the single-layer base film is preferably a film formed by a chemical vapor deposition method using a source gas containing a silane gas and an ammonia gas. In the above, the partial pressure ratio of the ammonia gas to the silane gas is preferably 2 or more (claim 3).

In this case, the content of nitrogen in the silicon nitride film formed by using this chemical vapor deposition method can be increased. If the content of nitrogen in the silicon nitride film can be increased, it is possible to suppress variations in the electrical characteristics of the thin film field effect transistor formed on the single-layer base film made of the silicon nitride film. When the partial pressure ratio of the ammonia gas to the silane gas in the source gas of the chemical vapor deposition method is set to 2 or more as described above, the nitrogen content in the silicon nitride film can be made a sufficient value.
Variations in the electrical characteristics of the thin film field effect transistor can be reliably suppressed.

Here, a case is considered in which an amorphous silicon film to be an upper layer is formed by annealing on a silicon nitride film as a single-layer base film. In this case, the adhesion between the amorphous silicon film and the silicon nitride film as described above is superior to the adhesion between the amorphous silicon film and the silicon oxide film. Can be suppressed.

In the semiconductor device according to the first aspect, it is preferable that the refractive index of the single-layer underlying film is 1.90 or less (claim 4).

In this case, as will be described later, when the partial pressure ratio of ammonia gas to silane gas in the source gas when forming the silicon nitride film by the chemical vapor deposition method increases, the refractive index of the formed silicon nitride film decreases. .
When the content of nitrogen in the silicon nitride film is set to a sufficient value as described above (when the partial pressure ratio of ammonia gas to silane gas in the source gas is 2 or more),
The refractive index of the silicon nitride film is 1.90 or less. Therefore, by measuring the refractive index of the formed silicon nitride film, it can be easily determined whether or not the content of nitrogen in the silicon nitride film has a sufficient value. If the refractive index of the silicon nitride film is 1.90 or less, the variation in the electrical characteristics of the thin film field effect transistor when the thin film field effect transistor is formed on the silicon nitride film is surely reduced. Can be suppressed.

In the semiconductor device according to the first aspect, B
It is preferable that the etching rate of the single-layer underlayer film when the HF solution is used is 100 nm / min or more (claim 5).

In this case, as described later, when the partial pressure ratio of ammonia gas to silane gas in the source gas when forming a silicon nitride film by chemical vapor deposition increases, the etching rate of the formed silicon nitride film with a BHF solution can be increased. Becomes larger. In addition, as a BHF solution,
A solution under the condition of HF: NH ₄ F = 1: 10 is used.
When the nitrogen content in the silicon nitride film is sufficiently increased as described above (when the partial pressure ratio of ammonia gas to silane gas in the source gas is set to 2 or more)
The etching rate of the silicon nitride film with the BHF solution becomes 100 nm / min or more. Therefore, by measuring the etching rate of the formed silicon nitride film, it can be easily determined whether or not the nitrogen content in the silicon nitride film has a sufficient value. If the etching rate of the silicon nitride film is 100 nm / min or more, the variation in the electrical characteristics of the thin film field effect transistor when the thin film field effect transistor is formed on the silicon nitride film is ensured. Can be suppressed.

A liquid crystal display according to another aspect of the present invention includes the semiconductor device according to the first aspect (claim 6).

In the display pixel area of the liquid crystal display device,
In order to improve the uniformity of the display screen, it is required to make the electrical characteristics of semiconductor devices such as thin film field effect transistors used uniform. Therefore, by applying the semiconductor device according to the present invention to a display pixel region or the like of a liquid crystal display device, a liquid crystal display device having excellent display characteristics can be realized.

In a method of manufacturing a semiconductor device according to another aspect of the present invention, one layer of a base film is formed on a transparent substrate. An amorphous silicon film is formed so as to be in contact with the base film. By annealing the amorphous silicon film, a polysilicon film including a region to be a channel region of the thin film field effect transistor is formed (claim 7).

Thus, the semiconductor device according to the present invention can be easily manufactured. In addition, since the base film is a single-layer base film composed of one layer, the number of manufacturing steps can be reduced as compared with the conventional case where a two-layer film is used as the base film. As a result, the manufacturing cost of the semiconductor device can be reduced.

In the method of manufacturing a semiconductor device according to another aspect, it is preferable that the base film includes a silicon nitride film.

In this case, a silicon nitride film, which is considered to have less foreign matter adhering to the surface than the silicon oxide film, is used as a base film. For this reason, even if a wet cleaning step is not performed before forming the amorphous silicon film, the invasion of foreign substances into the amorphous silicon film can be suppressed, and thus the electrical characteristics of the thin film field effect transistor can be prevented from deteriorating. That is, it is possible to omit the conventionally required wet cleaning step without deteriorating the electrical characteristics of the thin film field effect transistor.

In the method for manufacturing a semiconductor device according to the above another aspect, in the step of forming the base film, the base film is preferably formed by a chemical vapor deposition method using a source gas containing silane gas and ammonia gas. In the gas, the partial pressure ratio of the ammonia gas to the silane gas is preferably 2 or more (claim 9).

In this case, the content of nitrogen in the silicon nitride film formed by using this chemical vapor deposition method can be increased. If the content of nitrogen in the silicon nitride film can be increased, it is possible to suppress variations in the electrical characteristics of the thin film field effect transistor formed on the underlying film made of the silicon nitride film. When the partial pressure ratio of the ammonia gas to the silane gas in the source gas of the chemical vapor deposition method is set to 2 or more as described above, the nitrogen content in the silicon nitride film can be made a sufficient value. Variations in the electrical characteristics of the thin film field effect transistor can be reliably suppressed.

A method of manufacturing a liquid crystal display device according to another aspect of the present invention uses the method of manufacturing a semiconductor device according to the above another aspect.

Thus, a liquid crystal display device including the semiconductor device according to the present invention can be easily manufactured.

[0038]

Embodiments of the present invention will be described below with reference to the drawings. In the drawings below, the same or corresponding portions have the same reference characters allotted, and description thereof will not be repeated.

FIG. 1 is a schematic sectional view showing an embodiment of a liquid crystal display device according to the present invention. The liquid crystal display will be described with reference to FIG.

Referring to FIG. 1, the liquid crystal display device includes a glass substrate 1 as a substrate, an upper glass substrate 21, and a liquid crystal 20 held between the glass substrate 1 and the upper glass substrate 21. A base film 2 as a single-layer base film made of a silicon nitride film is formed on a glass substrate 1.

In the drive circuit region of the glass substrate 1, a p-type thin film field effect transistor 17 is formed on the underlayer 2. The p-type thin film field effect transistor 17
Source region 6a, drain region 6b, channel region 7, insulating film 8 acting as a gate insulating film, and gate electrode 9a
And On the base film 2, a source region 6a, a drain region 6b, and a channel region 7 formed using a semiconductor film are formed. A p-type conductive impurity such as boron (B) is implanted into the source region 6a and the drain region 6b. An insulating film 8 acting as a gate insulating film is formed on the channel region 7. In the region located on the channel region 7, a gate electrode 9 a made of a chromium film is formed on the insulating film 8. As a gate electrode, an aluminum alloy film, a tantalum film, or the like may be used. PECV is formed on the gate electrode 9a and the insulating film 8.
A protective film 11 made of a D silicon oxide film is formed. In the regions located on the source region 6a and the drain region 6b, contact holes 12a and 12b are formed by removing a part of the protective film 11 and the insulating film 8. A source electrode 13a and a drain electrode 13b as conductive films extend from inside the contact holes 12a and 12b to above the upper surface of the protective film 11.
Are formed respectively. Source electrode 13a and drain electrode 13b are connected to source region 6a and drain region 6b, respectively. An insulating film 14 is formed on the source electrode 13a and the drain electrode 13b.

In the display pixel area of the glass substrate 1,
As described above, the base film 2 is formed on the glass substrate 1, and the n-type thin film field effect transistor 18 and the storage capacitor 19 are formed on the base film 2. The n-type thin-film field-effect transistor 18 includes a source region 4a, a drain region 4b, a channel region 5, and an insulating film 8 acting as a gate insulating film.
And a gate electrode 9b.

On the base film 2, a source region 4a, a drain region 4b, and a channel region 5 are formed using a semiconductor film. The source region 4a and the drain region 4
An n-type conductive impurity such as phosphorus (P) ion is implanted in b. On the channel region 5, an insulating film 8 acting as a gate insulating film is formed. In a region located on the channel region 5, a gate electrode 9b is formed on the insulating film 8. On the gate electrode 9b and the insulating film 8, a protective film 11 is formed similarly to the drive circuit region. Source region 4a and drain region 4
In the region located above the contact hole 12b, a part of the protective film 11 and the insulating film 8 is removed.
c and 12d are formed. Contact hole 12
A source electrode 13c and a drain electrode 13d extending from the inside of c and 12d to the upper surface of the protective film 11 and connected to the source region 4a and the drain region 4b, respectively, are formed.

On the underlying film 2, a source region 4a,
The lower electrode 3 formed of the same layer as the semiconductor film forming the drain region 4b and the channel region 5 is formed at a distance from the n-type thin film field effect transistor 18. On this lower electrode 3, an insulating film 8 as a dielectric film is formed. The portion of the insulating film 8 located on the lower electrode 3 functions as a dielectric film of the storage capacitor 19. Then, in a region located on the lower electrode 3,
A common electrode 10 as an upper electrode is formed on the insulating film 8. A protective film 11 is formed on the common electrode 10 and the insulating film 8.
Are formed. By removing a part of the protective film 11 and a part of the insulating film 8, a contact hole 12e is formed. An electrode 13e is formed to extend from inside contact hole 12e to the upper surface of protective film 11. An insulating film 14 is formed on the protective film 11, the source electrode 13c, the drain electrode 13d, and the electrode 13e.

A contact hole 15 is formed in the insulating film 14 in a region located on the drain electrode 13d. An ITO (tin-added indium oxide) pixel electrode 16 electrically connected to the drain electrode 13a is formed so as to extend from the inside of the contact hole 15 to the upper surface of the insulating film. An alignment film 36a is formed on the ITO pixel electrode 16 and the insulating film 14.

The p-type thin film field effect transistor 17,
N-type thin film field effect transistor 18 and storage capacitor 19
The upper glass substrate 21 is arranged so as to face the surface of the glass substrate 1 on which is formed. A color filter 23 is formed on a surface of the upper glass substrate 21 facing the glass substrate 1. A counter electrode 22 is formed on a surface of the color filter 23 facing the glass substrate 1. An alignment film 36 is provided on the surface of the counter electrode 22 facing the glass substrate 1.
b is formed. The liquid crystal 20 is held between the alignment films 36a and 36b.

As described above, when a single-layered underlayer made of a silicon nitride film is used as the underlayer 2, as shown in the manufacturing process described later, the conventional underlayer 2 is formed of a silicon nitride film and a silicon oxide film. Compared to using a two-layer film,
The number of film forming steps for forming the base film 2 can be reduced. As a result, the manufacturing cost of the liquid crystal display device can be reduced.

Further, by using a silicon nitride film as the base film 2, the channel regions 5, 7 are formed on the base film 2.
Even if the wet cleaning step is not performed before forming the amorphous silicon film, the electrical characteristics of the p-type thin film field effect transistor 17 and the n-type thin film field effect transistor 18 can be prevented from deteriorating.

The base film 2 is preferably a film formed by a chemical vapor deposition method using a source gas containing a silane gas and an ammonia gas. The partial pressure ratio is preferably 2 or more. In this case, the base film 2
The nitrogen content in the silicon nitride film can be increased. If the nitrogen content in the silicon nitride film as the base film 2 can be increased, the electrical characteristics of the p-type thin film field effect transistor 17 and the n-type thin film field effect transistor 18 formed on the base film 2 can be improved. Variation can be suppressed.

It is preferable that the refractive index of the base film 2 is 1.90 or less. Further, it is preferable that the etching rate of the base film 2 in the case of using the BHF solution is 100 nm / min or more. The BHF solution is HF: NH
₄ F = 1: 10 using a solution of condition that. As described later, according to the knowledge of the inventors, when the partial pressure ratio of the ammonia gas to the silane gas in the source gas increases, the refractive index of the formed silicon nitride film as the base film 2 decreases, as described below. The etching rate of the base film 2 when the BHF solution is used increases. That is, by measuring the refractive index of the silicon nitride film or the etching rate with the BHF solution, the nitrogen content of the silicon nitride film can be estimated. When the nitrogen content in the silicon nitride film is set to a sufficiently large value as described above (the partial pressure ratio of the ammonia gas to the silane gas in the source gas is set to 2).
In this case, the refractive index of the silicon nitride film is 1.
90 or less, and the etching rate becomes 100 nm / min or more. Therefore, by measuring the refractive index of the silicon nitride film serving as the base film 2 or the above-described etching rate, it can be easily determined whether or not the nitrogen content in the silicon nitride film has a sufficient value. If the refractive index of the base film 2 is 1.90 or less, the p-type thin film field effect transistor 17 and the n-type thin film field effect transistor 1
8 can be reliably suppressed from varying.

FIGS. 2 to 7 are schematic sectional views for explaining a method of manufacturing the liquid crystal display device shown in FIG. Figures 2-7
With reference to, a method for manufacturing a liquid crystal display device will be described.

First, as shown in FIG. 2, a base film 2 made of a silicon nitride film is formed on a glass substrate 1 by using, for example, PECVD. The film thickness of the base film 2 is 200 nm. The conditions for forming the underlayer 2 are as follows: silane (SiH ₄ ) gas as a source gas is 0.12 liter / minute (12
0 sccm), ammonia (NH ₃ ) gas at 0.12 liter / min (120 sccm), hydrogen (H ₂ ) gas at 1
Liter / minute (1000 sccm), nitrogen (N ₂ ) gas is supplied at 4 liter / minute (4000 sccm), the pressure of the reaction chamber is 130 Pa, the RF power is 800 W, and the temperature is 3
A condition of 10 ° C. can be used. The partial pressure ratio of ammonia gas to silane gas in the source gas is 2
It is preferable that it is above. This makes it possible to increase the nitrogen content in the silicon nitride film as the base film 2. As a result, as described later, the n-type thin film field effect transistor 18 formed on the underlayer 2,
Variations in the electrical characteristics of the p-type thin film field effect transistor 17 can be suppressed.

Further, since the base film 2 is a single-layer silicon nitride film, the number of manufacturing steps can be reduced as compared with the conventional case where a two-layer film is used as the base film 2. As a result, the manufacturing cost of the liquid crystal display device can be reduced.

Next, as shown in FIG. 3, an amorphous silicon film 24 is formed on the underlayer 2 by low pressure CVD or PECVD. When the amorphous silicon film 24 is formed on the silicon nitride film, the amorphous silicon film 24 is formed on the base film 2 without forming the surface of the silicon nitride film by wet cleaning before forming the amorphous silicon film 24. The electrical characteristics of the thin film field effect transistor do not deteriorate. For this reason, the wet cleaning step that was required when forming an amorphous silicon film on a silicon oxide film as in the related art can be omitted. As a result, the number of manufacturing steps can be reduced.

The polysilicon film is generated by annealing this amorphous silicon film 24 using, for example, an excimer laser. Then, a resist film is formed on the polysilicon film. Using this resist film as a mask, the polysilicon film is partially removed by dry etching, so that the source regions 4a, 6a,
Polysilicon film 25a to be drain regions 4b, 6b, channel regions 7, 5, and lower electrode 3 (see FIG. 1)
To 25c (see FIG. 4). After that, the resist film is removed. Thus, a structure as shown in FIG. 4 is obtained.

Next, a resist film is formed in a region other than the region where the semiconductor film to be the lower electrode 3 is located. Then, phosphorus ions are implanted into the polysilicon film 25a to be the lower electrode 3. Thus, the lower electrode 3 is formed. Then, the above-described resist film is removed. Next, an insulating film 8 (see FIG. 5) made of a silicon oxide film acting as a gate insulating film and a dielectric film is formed. This insulating film 8 is formed by using the PECVD method. Thereafter, a chromium film is formed on the insulating film 8 by using a sputtering method or the like. An aluminum alloy film or a tantalum film may be formed instead of the chromium film. A resist film is formed on the chromium film. Using this resist film as a mask, the chromium film is partially removed by etching,
Gate electrodes 9a and 9b and common electrode 10 (see FIG. 5)
To form A storage capacitor 19 is formed from the common electrode 10, the lower electrode 3, and the insulating film 8. After that, the gate electrode 9b
Is used as a mask to implant phosphorus ions into predetermined regions of the semiconductor film 25b, thereby forming the source region 4a, the drain region 4b, and the channel region 5. Further, boron ions are applied to the semiconductor film 25c using the gate electrode 9a as a mask.
Of the source region 6a,
A drain region 6b and a channel region 7 are formed. Thus, a structure as shown in FIG. 5 is obtained.

Next, as shown in FIG.
A protective film 11 is formed on a, 9b and the common electrode 10. This protective film 11 is a silicon oxide film,
It is formed using the D method. After that, activation annealing is performed. The heating temperature in this activation annealing treatment is 400 ° C. Next, the hydrogen in the channel regions 5 and 7 is hydrogenated by performing a hydrogen plasma process.

Next, a resist film (not shown) is formed on the protective film 11. Using this resist film as a mask, the protective film 11 and the insulating film 8 are partially removed by dry etching to form contact holes 12a to 12e (FIG. 7).
Reference). After that, the resist film is removed. Contact holes 12a to 12e on the upper surface of protective film 11
A conductor film is formed inside and inside the substrate by using a sputtering method. As the conductor film, for example, a chromium film, an aluminum alloy film, or the like can be used. A resist film is formed on the conductor film. By performing wet etching using this resist film as a mask, electrodes 13a to 13e (see FIG. 7) made of a conductive film are formed.
The insulating film 1 is formed on the electrodes 13a to 13e by using the PECVD method.
4 is formed. The insulating film 1 which is the passivation film
As 4, a silicon nitride film is used.

In this manner, the p-type thin film field effect transistor 17 is formed in the drive circuit area of the glass substrate 1.
Further, an n-type thin film field effect transistor 1 is provided in the display pixel region.
8 and the storage capacitor 19 are formed. Further, in the drive circuit region, an n-type thin film field effect transistor may be formed in another region not shown. Further, a p-type thin film field effect transistor may be formed in another region in the display pixel region. Then, in the drive circuit area,
A drive circuit is constituted by combining the p-type thin film field effect transistor 17 and the n-type thin film field effect transistor. In the display pixel region, a display pixel is formed by combining the n-type thin film field effect transistor 18 with a transparent electrode such as the ITO pixel electrode 16 (see FIG. 1).

That is, after the step shown in FIG. 7, the upper surface of the insulating film 14 is flattened. Thereafter, a contact hole 15 (see FIG. 1) is formed in the insulating film 14 in a region located on the electrode 13d. Then, an ITO pixel electrode 16 is formed so as to extend from inside the contact hole 15 onto the upper surface of the insulating film 14. Then, ITO
An alignment film 36a is formed on the pixel electrode 16.

Further, as shown in FIG. 1, an upper glass substrate 21 on which a color filter 23, a counter electrode 22, and an alignment film 36b are formed is prepared. This upper glass substrate 21
And the glass substrate 1 are arranged and fixed so as to face each other. Then, by injecting and sealing the liquid crystal 20 between the glass substrate 1 and the upper glass substrate 21 (between the alignment films 36a and 36b), a liquid crystal display device as shown in FIG. 1 is obtained.

Thus, the liquid crystal display device according to the present invention can be easily obtained. In the method of manufacturing a liquid crystal display device according to the present invention, since the thin-film field-effect transistor is formed on the single-layer base film 2 made of the silicon nitride film, the thin-film field-effect transistor with little variation in characteristics and excellent electrical characteristics The effect transistor can be applied to a liquid crystal display device. As a result, a liquid crystal display device having excellent display characteristics can be easily realized.

[0063]

EXAMPLES (Example 1) The inventors conducted the following tests to confirm the effects of the present invention.

First, as a sample of the example of the present invention, a single-layer underlayer made of a silicon nitride film was formed on a glass substrate. As the formation conditions, the conditions described in the above embodiment mode were used. The thickness of the single-layer underlayer is 200 nm. On this single-layer base film, a thin-film field-effect transistor used for a liquid crystal display device according to the present invention was formed. The forming step includes the p-type thin film field effect transistor 17 in the above-described liquid crystal display device,
This is the same as the step of forming the n-type thin film field effect transistor 18. Further, as a sample of the comparative example, a two-layer base film in which the lower layer was a silicon nitride film and the upper layer was a silicon oxide film was formed on a glass substrate. The lower layer has a thickness of 50 nm, and the upper layer has a thickness of 100 nm. A thin-film field-effect transistor was formed on the underlayer consisting of the two-layer film in the same manner as in the example. Each of the thin film field effect transistors in the example and the comparative example has a gate width of 10 μm and a gate length of 5 μm.
m, the thickness of the gate insulating film is 75 nm, and the channel thickness is 5
0 nm, source / drain region dose is 5 × 1
0 ^15, the dose of the LDD in the n-type thin film field effect transistor is 3 × 10 ^13, LDD length is 1 [mu] m.

In the above Examples and Comparative Examples, TFT
Characteristics (relationship between gate voltage (Vg) and drain current (Id)) were measured. The measurement results are shown in FIGS. FIG. 8 is a graph showing the relationship between the gate voltage and the drain current of the sample of Example 1 of the semiconductor device according to the present invention, and FIG. 9 is a graph showing the relationship between the gate voltage and the drain current of the sample of the comparative example. It is. FIGS. 8 and 9 show the results of a characteristic test on a p-type thin film field effect transistor using a sample in which a p-type thin film field effect transistor is formed on a base film. The measurement conditions were such that Ids = −5 V and Vg = −10 V to 5 V.

Referring to FIGS. 8 and 9, it can be seen that the value of I _offmin is smaller in the embodiment of the present invention.

(Example 2) Next, two types of samples having different manufacturing conditions for a single-layer underlying film made of a silicon nitride film as an example of the present invention were prepared. The conditions for forming the underlayer film on the two types of samples (samples 1 and 2) are basically the same as the conditions described in the above embodiment.
The partial pressure ratio (NH ₃ / SiH ₄ ratio) of ammonia gas to silane gas in the source gas was set to 3. Sample 2
The NH ₃ / SiH ₄ ratio was set to 1. Then, for the samples 1 and 2, thin-film field-effect transistors similar to those of the example 1 were formed on the base film. In Samples 1 and 2, a plurality of thin film field effect transistors are formed on a glass substrate.

For the samples 1 and 2, the BT (Bias Tempe) was used to evaluate the reliability of the thin film field effect transistor.
rature) A stress test was performed. The stress conditions were 200 ° C. for 5 minutes, and the bias electric field was V _GS = ± 2 MV.
/ Cm, V _DS = 0. The gate voltage (Vg) and the drain current (Id) of the thin-film field-effect transistor before and after the BT stress test at predetermined locations of the samples 1 and 2
Was measured. The results are shown in FIGS.
10 to 15 are graphs showing the results of the BT stress test on Samples 1 and 2 of Example 2 of the present invention. FIGS. 10 to 15 show the results of a characteristic test on the n-type thin film field-effect transistors using samples 1 and 2 each having an n-type thin film field-effect transistor formed on a base film. 10 to 12 show, for Sample 1, the central part of the glass substrate, the peripheral part 1 (upper left part of the substrate),
The test results at three locations in the peripheral portion 2 (lower right portion of the substrate) are shown. 13 to 15 show the test results of the sample 2 at three locations: the central portion of the glass substrate, the peripheral portion 1 (upper left portion of the substrate), and the peripheral portion 2 (lower right portion of the substrate).

Referring to FIGS. 10 to 15, sample 1 has
Changes and variations in electrical characteristics of the thin film field effect transistor in the glass substrate surface before and after the BT stress test are small, and it is understood that the electrical characteristics are excellent.

This is presumed to be as follows.
That is, NH ₃ /
If the SiH ₄ ratio is large, the content of nitrogen in the silicon nitride film can be increased. It is considered that such a high nitrogen content affects the level at the interface between the polysilicon film formed from the amorphous silicon film and the silicon nitride film. It is considered that the change in the level at this interface causes a difference in the electrical characteristics of the thin film field effect transistor. The effect of suppressing the variation in the electrical characteristics of the thin film field effect transistor is due to NH ₃ /
It becomes remarkable when the SiH ₄ ratio is 2 or more.

As shown in FIGS. 16 and 17, the NH ₃ / SiH ₄ ratio in the source gas for forming the silicon nitride film and the refractive index and etching rate of the formed silicon nitride film are correlated as shown in FIGS. There is. FIG.
5 is a graph showing a relationship between an H ₃ / SiH ₄ ratio and a refractive index of a silicon nitride film as a single-layer underlying film. Also, FIG.
₄ is a graph showing the relationship between the NH ₃ / SiH ₄ ratio and the etching rate of a silicon nitride film with a BHF solution.

Referring to FIG. 16, the horizontal axis is NH ₃ / SiH _4.
The vertical axis indicates the refractive index. The measurement of the refractive index was performed using a light source having a wavelength of 625 nm. As is clear from FIG. 16, it is understood that the refractive index decreases as the NH ₃ / SiH ₄ ratio increases. And NH ₃ / Si
When the H ₄ ratio is 2 or more, the refractive index becomes 1.9 or less.

Referring to FIG. 17, the horizontal axis represents NH ₃ /
The vertical axis indicates the SiH ₄ ratio, and the vertical axis indicates the etching rate of the base film made of the silicon nitride film with the BHF solution. BHF
As the solution, a solution under the condition of HF: NH ₄ F = 1: 10 is used. As is clear from FIG. 17, NH ₃ /
It can be seen that the higher the SiH ₄ ratio, the higher the etching rate. When the NH ₃ / SiH ₄ ratio is 2 or more, the etching rate is 100 nm / min (1000 ° C.).
/ Min) or more.

The embodiments and examples disclosed this time are to be considered in all respects as illustrative and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the embodiments and examples, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

[0075]

As described above, according to the present invention, the manufacturing process can be simplified without deteriorating the electrical characteristics of the thin film field effect transistor by using a single-layer base film as the base film. Semiconductor device and liquid crystal display device can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing an embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a first view of a manufacturing process of the liquid crystal display device shown in FIG.
FIG. 4 is a schematic cross-sectional view for explaining a process.

FIG. 3 is a second view of the manufacturing process of the liquid crystal display device shown in FIG. 1;
FIG. 4 is a schematic cross-sectional view for explaining a process.

FIG. 4 is a third view of the manufacturing process of the liquid crystal display device shown in FIG. 1;
FIG. 4 is a schematic cross-sectional view for explaining a process.

FIG. 5 is a fourth view of the manufacturing process of the liquid crystal display device shown in FIG. 1;
FIG. 4 is a schematic cross-sectional view for explaining a process.

FIG. 6 is a fifth view of the manufacturing process of the liquid crystal display device shown in FIG. 1;
FIG. 4 is a schematic cross-sectional view for explaining a process.

FIG. 7 is a sixth view of the manufacturing process of the liquid crystal display device shown in FIG. 1;
FIG. 4 is a schematic cross-sectional view for explaining a process.

FIG. 8 is a graph showing the relationship between the gate voltage and the drain current for the sample of Example 1 of the semiconductor device according to the present invention.

FIG. 9 is a graph showing a relationship between a gate voltage and a drain current of a sample of a comparative example.

FIG. 10 is a graph showing the results of a BT stress test at the center of the substrate in Sample 1 of Example 2 of the present invention.

FIG. 11 is a graph showing a result of a BT stress test on an upper left portion of a substrate in Sample 1 of Example 2 of the present invention.

FIG. 12 is a graph showing the results of a BT stress test on the lower right part of the substrate in Sample 1 of Example 2 of the present invention.

FIG. 13 is a graph showing the results of a BT stress test at the center of the substrate in Sample 2 of Example 2 of the present invention.

FIG. 14 is a graph showing the results of a BT stress test on the upper left part of the substrate in Sample 2 of Example 2 of the present invention.

FIG. 15 is a graph showing the result of a BT stress test on the lower right part of the substrate in Sample 2 of Example 2 of the present invention.

FIG. 16 shows the relationship between the partial pressure ratio of ammonia gas to silane gas (NH ₃ / SiH ₄ ratio) and the refractive index of a silicon nitride film in forming a single-layer underlayer film in Example 2 of the present invention. It is a graph.

FIG. 17 shows the partial pressure ratio (NH ₃ / SiH ₄ ratio) of ammonia gas to silane gas used for forming a single-layer underlayer film and B of silicon nitride film in Example 2 of the present invention.
6 is a graph showing a relationship with an etching rate by an HF solution.

FIG. 18 is a schematic sectional view showing a conventional liquid crystal display device.

[Explanation of symbols]

1 glass substrate, 2 underlayer, 3 lower electrode, 4a, 6
a source region, 4b, 6b drain region, 5, 7
Channel region, 8, 14 insulating film, 9a, 9b gate electrode, 10 common electrode, 11 protective film, 12a to 12e,
15 contact holes, 13a and 13c source electrodes, 13b and 13d drain electrodes, 16 pixel electrodes,
17 p-type thin film field effect transistor, 18 n-type thin film field effect transistor, 19 storage capacitor, 20 liquid crystal, 21 upper glass substrate, 22 counter electrode, 23 color filter, 24 amorphous silicon film, 25a ~
25c polysilicon film, 36a, 36b alignment film.

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Ichiro Murai 3-3-5 Yamato, Suwa-shi, Nagano F-term in Seiko Epson Corporation (Reference) 2H092 GA59 HA28 JA25 JA33 JA35 JA38 JA39 JB64 JB69 KA04 KA05 KA10 KA18 KA19 KB24 MA05 MA18 MA27 MA30 MA37 NA18 NA24 NA27 PA08 5F058 BA20 BB07 BC08 BF02 BF07 BF23 BF30 BF37 BJ10 5F110 AA06 AA16 BB02 BB04 CC02 DD02 DD14 EE04 EE06 EE44 FF02 FF30 GG02 GG13 GG13 GG25 GG13 GG25 GG13 PP03 QQ08 QQ19 QQ25

Claims (10)

[Claims] 1. A semiconductor device comprising a thin-film field-effect transistor including a channel region, comprising: a transparent substrate; a single-layer base film formed on the transparent substrate; And an upper layer including a polysilicon film to be a channel region of the thin film field effect transistor. 2. The semiconductor device according to claim 1, wherein said single-layer base film is made of a silicon nitride film. 3. The single-layer underlayer film is a film formed by a chemical vapor deposition method using a source gas containing a silane gas and an ammonia gas, wherein the source gas contains the ammonia gas with respect to the silane gas. 3. The semiconductor device according to claim 2, wherein the partial pressure ratio is 2 or more. 4. The semiconductor device according to claim 2, wherein the refractive index of the single-layer underlayer is 1.90 or less. 5. The semiconductor device according to claim 2, wherein an etching rate of said single-layer base film when using a BHF solution is 100 nm / min or more. 6. A liquid crystal display device comprising the semiconductor device according to claim 1. 7. A thin film field effect by forming a single layer of a base film on a transparent substrate, forming an amorphous silicon film in contact with the base film, and annealing the amorphous silicon film. Forming a polysilicon film including a region to be a channel region of the transistor. 8. The method of manufacturing a semiconductor device according to claim 7, wherein said base film includes a silicon nitride film. 9. In the step of forming the base film, the base film is formed by a chemical vapor deposition method using a source gas containing a silane gas and an ammonia gas. The method for manufacturing a semiconductor device according to claim 8, wherein a partial pressure ratio is 2 or more. 10. A method of manufacturing a liquid crystal display device using the method of manufacturing a semiconductor device according to claim 7.