JP2001267444A - Package for containing semiconductor element - Google Patents

Package for containing semiconductor element

Info

Publication number
JP2001267444A
JP2001267444A JP2000070315A JP2000070315A JP2001267444A JP 2001267444 A JP2001267444 A JP 2001267444A JP 2000070315 A JP2000070315 A JP 2000070315A JP 2000070315 A JP2000070315 A JP 2000070315A JP 2001267444 A JP2001267444 A JP 2001267444A
Authority
JP
Japan
Prior art keywords
semiconductor element
glass
lid
insulating base
filler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000070315A
Other languages
Japanese (ja)
Inventor
Hiroshige Ikegami
裕成 池上
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2000070315A priority Critical patent/JP2001267444A/en
Publication of JP2001267444A publication Critical patent/JP2001267444A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73253Bump and layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem that a noise enters a semiconductor element to cause erroneous operation. SOLUTION: The package for containing a semiconductor element comprises an insulating basic body 1 and a cover body 2 and has an inner cavity for containing a semiconductor element 3. The cover body 2 is formed of copper or a metal principally comprising copper and the insulating basic body 1 is formed of sintered glass ceramic composed of 20-80 vol.% of glass containing 5-60 wt.% of BaO and 80-20 vol.% of filler having coefficient of thermal expansion of 6 ppm/ deg.C or above at 40-400 deg.C wherein the glass and/or filler contains 0.1-30 wt.% of a Zr compound expressed in terms of ZrO2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体集積回路素
子などの半導体素子を収納する半導体素子収納用パッケ
ージに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package for housing a semiconductor device such as a semiconductor integrated circuit device.

【0002】[0002]

【従来の技術】従来、半導体素子を収容するための半導
体素子収納用パッケージは、酸化アルミニウム質焼結体
やムライト質焼結体、窒化アルミニウム質焼結体等の電
気絶縁材料から成り、上面に半導体素子を収納するため
の凹部を有する絶縁基体と、該絶縁基体の凹部底面また
はその周辺から外周縁または下面にかけて被着導出され
たタングステン、モリブデン、マンガン等の高融点金属
粉末から成る複数個のメタライズ配線層と、内部に収容
する半導体素子を外部電気回路に接続するために前記メ
タライズ配線層に取着されたリード端子や半田ボール等
の外部接続端子と、蓋体とから構成されており、絶縁基
体内に半導体素子を収容するとともに該半導体素子の各
電極をボンディングワイヤ、金属バンプ等の導電性接続
部材を介してメタライズ配線層に電気的に接続し、しか
る後、絶縁基体と蓋体とから成る容器内部に半導体素子
を気密に収容することによって製品としての半導体装置
となる。
2. Description of the Related Art Conventionally, a semiconductor element housing package for housing a semiconductor element is made of an electrically insulating material such as an aluminum oxide sintered body, a mullite sintered body, or an aluminum nitride sintered body. An insulating base having a recess for accommodating a semiconductor element, and a plurality of high melting point metal powders such as tungsten, molybdenum, and manganese, which are attached and led out from the bottom surface of the recess or its periphery to the outer peripheral edge or lower surface. A metallized wiring layer, an external connection terminal such as a lead terminal or a solder ball attached to the metallized wiring layer for connecting a semiconductor element housed therein to an external electric circuit, and a lid; A semiconductor element is accommodated in an insulating base, and each electrode of the semiconductor element is connected to a metal via a conductive connection member such as a bonding wire or a metal bump. Electrically connected to the size wiring layer, and thereafter, the semiconductor device as a product by housing the semiconductor element hermetically in the container interior made of an insulating base and the lid.

【0003】なお、上述の半導体素子収納用パッケージ
においては、蓋体が鉄−ニッケル合金や鉄−ニッケル−
コバルト合金により形成されており、該鉄−ニッケル合
金や鉄−ニッケル−コバルト合金は、その熱膨張係数
(約5ppm/℃)が絶縁基体を形成する酸化アルミニ
ウム質焼結体等の熱膨張係数に近似する(約4〜7pp
m/℃)ことから、半導体素子の作動時に発する熱によ
り蓋体と絶縁基体との間に大きな熱応力が発生すること
はなく、該熱応力により絶縁基体に割れやクラックが発
生し容器の気密封止が破れる、ということを有効に防止
することができ、半導体素子を長期にわたって気密に収
容することを可能としている。
In the above-described semiconductor device housing package, the lid is made of an iron-nickel alloy or an iron-nickel alloy.
The iron-nickel alloy and the iron-nickel-cobalt alloy have a thermal expansion coefficient (approximately 5 ppm / ° C.) that is lower than that of an aluminum oxide sintered body forming an insulating base. Approximate (about 4-7pp
m / ° C.), heat generated during the operation of the semiconductor element does not generate a large thermal stress between the lid and the insulating base, and the thermal stress causes cracks and cracks in the insulating base, resulting in airtightness of the container. Breaking of the hermetic seal can be effectively prevented, and the semiconductor element can be hermetically housed for a long period of time.

【0004】また前記絶縁基体に配されたメタライズ配
線層は、その露出表面にニッケル、金等のめっき層が所
定厚みに被着形成されており、該ニッケル、金等のめっ
き層によってメタライズ配線層は酸化腐食を受けるのが
有効に防止され、同時にメタライズ配線層に対するボン
ディングワイヤや金属バンプ、外部リード端子の接続が
良好なものとなっている。
The metallized wiring layer provided on the insulating substrate has a plated layer of nickel, gold or the like deposited on the exposed surface thereof to a predetermined thickness, and the metallized wiring layer is formed by the plated layer of nickel, gold or the like. Is effectively prevented from undergoing oxidative corrosion, and at the same time, the connection of bonding wires, metal bumps and external lead terminals to the metallized wiring layer is good.

【0005】[0005]

【発明が解決しようとする課題】しかしながら、この従
来の半導体素子収納用パッケージでは、蓋体が鉄−ニッ
ケル合金や鉄−ニッケル−コバルト合金で形成されてお
り、該蓋体を形成するニッケル、コバルトが強磁性体で
あることから、蓋体が外部から磁化されやすく、半導体
素子収納用パッケージの周囲に存在している磁束の透過
が容易となるため蓋体の周辺では磁束密度が高くなって
しまい、その結果、絶縁基体と蓋体とから成る容器内部
に収容された半導体素子が、蓋体で密度が高められた磁
束により誘起される電圧等のノイズの影響を受け、誤作
動等の不具合を生じてしまうという問題があった。
However, in this conventional package for accommodating a semiconductor element, the lid is formed of an iron-nickel alloy or an iron-nickel-cobalt alloy. Is a ferromagnetic material, the lid is easily magnetized from the outside, and the magnetic flux existing around the semiconductor element housing package is easily transmitted, so that the magnetic flux density increases around the lid. As a result, the semiconductor element housed inside the container consisting of the insulating base and the lid is affected by noise such as voltage induced by the magnetic flux whose density is increased by the lid, causing malfunction such as malfunction. There was a problem that would occur.

【0006】特に、近時、半導体素子の高集積化や作動
電圧の低電圧化、半導体装置の小型化にともない、絶縁
基体と蓋体とから成る容器内に収容された半導体素子が
蓋体部分の高磁束密度化に起因するノイズの影響を受け
やすくなっているため、上記ノイズによる半導体素子の
誤作動の危険性は顕著なものとなっている。
In particular, recently, as the integration of semiconductor elements becomes higher, the operating voltage becomes lower, and the size of the semiconductor device becomes smaller, the semiconductor element housed in a container consisting of an insulating base and a lid is replaced with a lid part. Is more susceptible to noise caused by the increase in magnetic flux density, and the risk of malfunction of the semiconductor element due to the noise has become significant.

【0007】本発明は上記欠点に鑑み案出されたもの
で、その目的はノイズの発生が有効に防止され、内部に
収容する半導体素子を常に正常、かつ安定に作動させる
ことができる、高信頼性かつ安価な半導体素子収納用パ
ッケージを提供することにある。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned drawbacks, and has as its object the generation of noise can be effectively prevented, and the semiconductor element housed therein can always be operated normally and stably, and a high reliability is achieved. An object of the present invention is to provide a flexible and inexpensive semiconductor element storage package.

【0008】[0008]

【課題を解決するための手段】本発明は、絶縁基体と蓋
体とから成り、内部に半導体素子を収納するための空所
を有する半導体素子収納用パッケージであって、前記蓋
体は、銅もしくは銅を主成分とする金属で形成され、か
つ前記絶縁基体は、BaOを5〜60重量%含有するガ
ラス20〜80体積%と、40〜400℃における熱膨
張係数が6ppm/℃以上であるフィラー80〜20体
積%とから成り、前記ガラス及び/又はフィラー中にZ
r化合物をZrO2換算で0.1〜30重量%含有して
いるガラスセラミック焼結体で形成されていることを特
徴とするものである。
According to the present invention, there is provided a semiconductor element housing package comprising an insulating base and a lid, and having a space for accommodating a semiconductor element therein, wherein the lid is made of copper. Alternatively, the insulating base is formed of a metal containing copper as a main component, and the insulating base contains 20 to 80% by volume of glass containing 5 to 60% by weight of BaO, and has a thermal expansion coefficient of 6 ppm / ° C. or more at 40 to 400 ° C. 80-20% by volume of a filler, wherein Z is contained in the glass and / or the filler.
It is characterized by being formed of a glass ceramic sintered body containing 0.1 to 30% by weight of an r compound in terms of ZrO 2 .

【0009】本発明の半導体素子収納用パッケージによ
れば、蓋体を銅もしくは銅を主成分とする金属で形成し
銅が磁性をほとんど有しないことから、蓋体が外部の磁
界で磁化されることはほとんどなく、磁束の高密度化に
よるノイズの発生が効果的に防止され、その結果、半導
体素子を常に正常、かつ安定に作動させることができ
る。
According to the package for accommodating a semiconductor element of the present invention, since the lid is made of copper or a metal containing copper as a main component and copper has almost no magnetism, the lid is magnetized by an external magnetic field. This rarely occurs, and the generation of noise due to the high density of the magnetic flux is effectively prevented. As a result, the semiconductor element can always be operated normally and stably.

【0010】また同時に本発明の半導体素子収納用パッ
ケージによれば、半導体素子を収納する容器の絶縁基体
を、5〜60重量%のBaOを含有するガラス20〜8
0体積%と、40〜400℃における熱膨張係数が6p
pm/℃以上であるフィラー80〜20体積%とから成
り、前記ガラス及び/又はフィラー中にZr化合物をZ
rO2換算で0.1〜30重量%含有しているガラスセ
ラミック焼結体で形成したことから絶縁基体の40〜4
00℃における熱膨張係数を8.5〜18.5ppm/
℃として銅もしくは銅を主成分とする金属から成る蓋体
の熱膨張係数(銅:17ppm/℃)に近似させること
ができ、その結果、絶縁基体と蓋体の各々に半導体素子
が作動時に発生する熱等が印加されたとしても絶縁基体
と蓋体との間には大きな熱応力が発生することはなく、
これによって前記熱応力により蓋体が絶縁基体から剥離
したり、絶縁基体に割れやクラック等が発生する、とい
うことが有効に防止され、容器内部の半導体素子を長期
にわたり確実に気密封止することができ、半導体素子を
より一層確実に安定、かつ正常に作動させることが可能
となる。
Further, according to the package for housing a semiconductor element of the present invention, the insulating base of the container for housing the semiconductor element is made of glass 20 to 8 containing 5 to 60% by weight of BaO.
0% by volume and a thermal expansion coefficient of 6p at 40 to 400 ° C.
pm / ° C. or higher, and 80 to 20% by volume of a filler.
Since it is formed of a glass ceramic sintered body containing 0.1 to 30% by weight in terms of rO 2 , the insulating substrate has a thickness of 40 to 4%.
The thermal expansion coefficient at 00 ° C. is 8.5 to 18.5 ppm /
The temperature can be approximated to the thermal expansion coefficient (copper: 17 ppm / ° C.) of a lid made of copper or a metal containing copper as a main component. As a result, semiconductor elements are generated on the insulating base and the lid during operation. Even if heat or the like is applied, no large thermal stress is generated between the insulating base and the lid,
This effectively prevents the lid from peeling off from the insulating base due to the thermal stress, and the occurrence of cracks, cracks, and the like in the insulating base, and reliably hermetically seals the semiconductor element inside the container for a long time. Thus, the semiconductor element can be more reliably stably and normally operated.

【0011】また同時に、前記ガラスセラミック焼結体
は、BaOを5〜60重量%含有するガラスのヤング率
が50〜80GPaと低いため絶縁基体のヤング率も約
50〜80GPaと低いものとなっている。そのため絶
縁基体と蓋体との間に両者の熱膨張係数の相異に起因し
て若干の熱応力が発生したとしても該熱応力は絶縁基体
を適度に変形させることによって効果的に吸収、緩和さ
れ、絶縁基体に割れやクラック等が発生するのが有効に
防止されて、半導体素子収納用パッケージとしての信頼
性がより一層優れたものとなる。
At the same time, in the glass ceramic sintered body, the Young's modulus of the glass containing 5 to 60% by weight of BaO is as low as 50 to 80 GPa, and the Young's modulus of the insulating base is as low as about 50 to 80 GPa. I have. Therefore, even if a slight thermal stress is generated between the insulating base and the lid due to a difference in thermal expansion coefficient between the two, the thermal stress is effectively absorbed and relaxed by appropriately deforming the insulating base. As a result, the occurrence of cracks, cracks, and the like in the insulating base is effectively prevented, and the reliability as a semiconductor element storage package is further improved.

【0012】更に本発明の半導体素子収納用パッケージ
によれば、前記ガラスセラミック焼結体のガラス及び/
又はフィラー中にZr化合物をZrO2換算で0.1〜
30重量%含有させたことからガラスセラミック焼結体
の耐薬品性を大きく向上させることができ、その結果、
絶縁基体に設けたメタライズ配線層にニッケル、金等の
めっき層を被着させる際、絶縁基体を酸性、アルカリ性
等の薬液に浸漬したとしても絶縁基体に酸化、腐食等が
生じることもほとんどなく、半導体素子収納用パッケー
ジとしての信頼性を高いものとなすことができる。
Further, according to the package for housing a semiconductor element of the present invention, the glass and / or
Or 0.1 a Zr compound in terms of ZrO 2 in the filler
By containing 30% by weight, the chemical resistance of the glass ceramic sintered body can be greatly improved, and as a result,
When depositing a plating layer of nickel, gold, etc. on a metallized wiring layer provided on an insulating substrate, even if the insulating substrate is immersed in a chemical solution such as acidic or alkaline, oxidation, corrosion, etc. hardly occur on the insulating substrate, The reliability as a package for housing a semiconductor element can be made high.

【0013】[0013]

【発明の実施の形態】次に本発明を添付図面に基づき詳
細に説明する。図1は本発明の半導体素子収納用パッケ
ージの一実施例を示し、1は絶縁基体、2は蓋体であ
る。この絶縁基体1と蓋体2とで半導体素子3を収容す
る容器4が構成される。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described in detail with reference to the accompanying drawings. FIG. 1 shows an embodiment of a package for accommodating a semiconductor element according to the present invention, wherein 1 is an insulating base, and 2 is a lid. The insulating base 1 and the lid 2 constitute a container 4 for housing the semiconductor element 3.

【0014】前記絶縁基体1はその上面に半導体素子3
を収容するための空所を形成する凹部1aが設けてあ
り、該凹部1a底面には半導体素子3が載置され、ガラ
ス、樹脂、ロウ材等の接着材を介して接着固定される。
The insulating substrate 1 has a semiconductor element 3 on its upper surface.
The semiconductor element 3 is placed on the bottom surface of the concave portion 1a, and is fixedly adhered thereto via an adhesive such as glass, resin, brazing material, or the like.

【0015】前記絶縁基体1は、BaOを5〜60重量
%含有するガラス20〜80体積%と、40〜400℃
における熱膨張係数が6ppm/℃以上であるフィラー
80〜20体積%とから成り、前記ガラス及び/又はフ
ィラー中にZr化合物をZrO2換算で0.1〜30重
量%含有しているガラスセラミック焼結体で形成されて
おり、例えば、BaO含有ガラス、フィラー、Zr化合
物等の原料粉末に適当な有機バインダー、溶剤等を添加
混合して泥漿物を作るとともに、該泥漿物をドクターブ
レード法やカレンダーロール法を採用することによって
グリーンシート(生シート)と成し、しかる後、前記グ
リーンシートに適当な打ち抜き加工を施すとともにこれ
を複数枚積層し、約850〜1300℃の温度で焼成す
ることによって製作される。
The insulating substrate 1 is composed of 20 to 80% by volume of glass containing 5 to 60% by weight of BaO and 40 to 400 ° C.
And a filler having a thermal expansion coefficient of not less than 6 ppm / ° C. in the glass ceramic and / or filler containing 0.1 to 30% by weight in terms of ZrO 2 in the glass and / or filler. For example, a slurry is formed by adding an appropriate organic binder, a solvent, and the like to raw material powder such as a BaO-containing glass, a filler, and a Zr compound to form a slurry, and the slurry is subjected to a doctor blade method or a calendar. By forming a green sheet (raw sheet) by adopting the roll method, a suitable punching process is performed on the green sheet, and a plurality of the green sheets are laminated and fired at a temperature of about 850 to 1300 ° C. Be produced.

【0016】また前記絶縁基体1は凹部1a周辺から外
周縁にかけて複数個のメタライズ配線層5が被着形成さ
れており、該メタライズ配線層5の凹部1a周辺部には
半導体素子3の各電極がボンディングワイヤ6を介して
電気的に接続され、また絶縁基体1の上面外周縁に導出
された部位には外部電気回路と接続される外部リード端
子7が低融点ロウ材等のロウ材を介してロウ付け取着さ
れている。
A plurality of metallized wiring layers 5 are formed on the insulating substrate 1 from the periphery of the concave portion 1a to the outer peripheral edge thereof. Each electrode of the semiconductor element 3 is formed around the concave portion 1a of the metallized wiring layer 5. An external lead terminal 7 electrically connected via a bonding wire 6 and connected to an external electric circuit at a portion led out to the outer peripheral edge of the upper surface of the insulating base 1 has a brazing material such as a low melting point brazing material. Brazed and attached.

【0017】前記メタライズ配線層5は半導体素子3の
各電極を外部電気回路に接続する際の導電路として作用
し、銅、銀、ニッケル、パラジウム等の金属材料により
形成されている。
The metallized wiring layer 5 functions as a conductive path for connecting each electrode of the semiconductor element 3 to an external electric circuit, and is formed of a metal material such as copper, silver, nickel, and palladium.

【0018】前記メタライズ配線層5は銅、銀、ニッケ
ル等の金属粉末に適当な有機バインダー、溶剤等を添加
混合して得た金属ペーストを絶縁基体1となるグリーン
シートに予め従来周知のスクリーン印刷法により所定パ
ターンに印刷塗布しておくことによって絶縁基体1の凹
部1a周辺から外周縁にかけて被着形成される。
The metallized wiring layer 5 is prepared by screen-printing a metal paste obtained by adding a suitable organic binder, a solvent and the like to a metal powder of copper, silver, nickel or the like onto a green sheet serving as the insulating substrate 1 in advance. By printing and applying a predetermined pattern by a method, the insulating substrate 1 is formed so as to adhere from the periphery to the outer peripheral edge of the concave portion 1a.

【0019】また前記メタライズ配線層5はその露出す
る表面にニッケル、金等の耐蝕性に優れ、かつロウ材と
の濡れ性に優れる金属を1μm〜20μmの厚みにめっ
き法により被着させておくと、メタライズ配線層5の酸
化腐蝕を有効に防止することができるとともにメタライ
ズ配線層5への外部リード端子7のロウ付けを強固とな
すことができる。従って、前記メタライズ配線層5は、
その露出する表面にニッケル、金等の耐蝕性に優れ、か
つロウ材との濡れ性に優れる金属を1μm〜20μmの
厚みに被着させておくことが好ましい。
On the exposed surface of the metallized wiring layer 5, a metal having excellent corrosion resistance, such as nickel and gold, and excellent wettability with a brazing material is applied to a thickness of 1 μm to 20 μm by plating. Thus, the oxidation corrosion of the metallized wiring layer 5 can be effectively prevented, and the brazing of the external lead terminals 7 to the metallized wiring layer 5 can be strengthened. Therefore, the metallized wiring layer 5
It is preferable that a metal having excellent corrosion resistance, such as nickel and gold, and having excellent wettability with a brazing material is applied to the exposed surface to a thickness of 1 μm to 20 μm.

【0020】なお、前記メタライズ配線層5は、銅、銀
等の低電気抵抗の金属で形成しておくとメタライズ配線
層5を伝搬する電気信号に減衰が生じず、半導体素子3
に電気信号を確実、かつ正確に入力することができる。
従って、前記メタライズ配線層5は銅、銀等の低電気抵
抗の金属で形成しておくことが好ましい。
If the metallized wiring layer 5 is made of a metal having a low electric resistance such as copper or silver, the electric signal propagating through the metallized wiring layer 5 will not be attenuated.
An electric signal can be input reliably and accurately.
Therefore, it is preferable that the metallized wiring layer 5 is formed of a metal having a low electric resistance such as copper or silver.

【0021】更に前記メタライズ配線層5には外部リー
ド端子7がロウ材を介してロウ付け取着されており、該
外部リード端子7は容器4内部に収容する半導体素子3
の各電極を外部電気回路に電気的に接続する作用をな
し、外部リード端子7を外部電気回路に接続することに
よって容器4内部に収容される半導体素子3はメタライ
ズ配線層5及び外部リード端子7を介して外部電気回路
に接続されることとなる。
Further, external lead terminals 7 are brazed and attached to the metallized wiring layer 5 through a brazing material.
The semiconductor element 3 housed inside the container 4 by connecting the external lead terminals 7 to the external electric circuit is electrically connected to the external electric circuit, thereby forming the metallized wiring layer 5 and the external lead terminals 7. To the external electric circuit via the.

【0022】前記外部リード端子7は鉄−ニッケルーコ
バルト合金や鉄−ニッケル合金等の金属材料から成り、
例えば、鉄−ニッケルーコバルト合金等の金属から成る
インゴット(塊)に圧延加工法や打ち抜き加工法等、従
来周知の金属加工法を施すことによって所定の形状に形
成される。
The external lead terminal 7 is made of a metal material such as an iron-nickel-cobalt alloy or an iron-nickel alloy.
For example, an ingot made of a metal such as an iron-nickel-cobalt alloy is formed into a predetermined shape by applying a conventionally known metal working method such as a rolling method or a punching method.

【0023】また前記蓋体2は、絶縁基体1の凹部1a
を気密に塞ぐ作用をなし、凹部1a内に半導体素子を収
容した後、絶縁基体1の上面に凹部1aを塞ぐようにし
て取着することにより、絶縁基体1と蓋体2とから成る
容器内部に半導体素子3が気密に収容され、半導体素子
3を長期にわたり安定、かつ正常に作動させるようにし
ている。
The lid 2 is provided with a concave portion 1a of the insulating base 1.
And a semiconductor element is accommodated in the concave portion 1a, and is then attached to the upper surface of the insulating base 1 so as to close the concave portion 1a, so that the inside of the container comprising the insulating base 1 and the lid 2 is formed. The semiconductor element 3 is housed in an airtight manner so that the semiconductor element 3 operates stably and normally for a long period of time.

【0024】前記銅または銅を主成分とする金属材料か
らなる蓋体2は、銅または銅を主成分とする金属材料に
圧延加工法や打ち抜き加工法等、従来周知の金属加工法
を施すことによって、板状等の所定の形状に形成され
る。
The cover 2 made of copper or a metal material containing copper as a main component is obtained by subjecting a metal material containing copper or copper as a main component to a conventionally known metal working method such as a rolling method or a punching method. Thereby, it is formed in a predetermined shape such as a plate shape.

【0025】かくして上述の半導体素子収納用パッケー
ジによれば、絶縁基体1の凹部1a底面に半導体素子3
をガラス、樹脂、ロウ材等から成る接着剤を介して接着
固定するとともに該半導体素子3の各電極をボンディン
グワイヤ6を介して所定のメタライズ配線層5に接続さ
せ、しかる後、前記絶縁基体1の上面に蓋体2をガラ
ス、樹脂、ロウ材等から成る封止材を介して接合させ、
絶縁基体1と蓋体2とから成る容器4内部に半導体素子
3を気密に収容することによって製品としての半導体装
置となる。
Thus, according to the above-described package for accommodating a semiconductor element, the semiconductor element 3
Is bonded and fixed via an adhesive made of glass, resin, brazing material or the like, and each electrode of the semiconductor element 3 is connected to a predetermined metallized wiring layer 5 via a bonding wire 6. The lid 2 is joined to the upper surface of the device via a sealing material made of glass, resin, brazing material, or the like,
A semiconductor device as a product is obtained by hermetically housing the semiconductor element 3 inside a container 4 including the insulating base 1 and the lid 2.

【0026】本発明においては、絶縁基体1を、酸化バ
リウム(BaO)を5〜60重量%含有するガラス20
〜80体積%と、40〜400℃における熱膨張係数が
6ppm/℃以上であるフィラー80〜20体積%とか
ら成り、かつ前記酸化バリウム含有ガラス及び/又はフ
ィラー中にZr化合物をZrO2換算で0.1〜30重
量%含有しているガラスセラミック焼結体で形成してお
くことが重要である。
In the present invention, the insulating substrate 1 is made of glass 20 containing 5 to 60% by weight of barium oxide (BaO).
And 80 to 20% by volume of a filler having a coefficient of thermal expansion at 40 to 400 ° C. of 6 ppm / ° C. or more, and a Zr compound in the barium oxide-containing glass and / or filler in terms of ZrO 2 . It is important to form a glass ceramic sintered body containing 0.1 to 30% by weight.

【0027】前記絶縁基体1を、上述のガラスセラミッ
ク焼結体で形成すると絶縁基体1の40〜400℃にお
ける熱膨張係数が8.5〜18.5ppm/℃となつて
銅もしくは銅を主成分とする金属から成る蓋体2の熱膨
張係数(銅:17ppm/℃)に近似し、その結果、絶
縁基体1と蓋体2の各々に半導体素子3が作動時に発生
する熱等が印加されたとしても絶縁基体1と蓋体2との
間には大きな熱応力が発生することはなく、これによっ
て蓋体2の絶縁基体1からの剥離、絶縁基体1の割れや
クラック等の発生が有効に防止されて容器4内部の半導
体素子3を確実に気密封止することができ、半導体素子
3を長期にわたり安定、かつ正常に作動させることが可
能となる。
When the insulating substrate 1 is formed of the above-mentioned sintered glass ceramic, the coefficient of thermal expansion of the insulating substrate 1 at 40 to 400 ° C. becomes 8.5 to 18.5 ppm / ° C., and copper or copper is the main component. Is approximated to the thermal expansion coefficient (copper: 17 ppm / ° C.) of the lid 2 made of a metal, and as a result, heat or the like generated when the semiconductor element 3 is operated is applied to each of the insulating base 1 and the lid 2. However, no large thermal stress is generated between the insulating base 1 and the lid 2, thereby effectively removing the lid 2 from the insulating base 1 and generating cracks and cracks in the insulating base 1. As a result, the semiconductor element 3 inside the container 4 can be securely hermetically sealed, and the semiconductor element 3 can be operated stably and normally for a long time.

【0028】また前記絶縁基体1を構成するガラスセラ
ミック焼結体に酸化バリウム(BaO)を5〜60重量
%含有するガラスを用いるのは該酸化バリウム含有ガラ
スは低軟化点であり、比較的高い熱膨張係数を有してい
るためにガラス量を少なく、かつ高熱膨張のフィラーを
多く添加することが可能であり、銅や銅を主成分とする
金属材料からなる蓋体2の熱膨張係数に近似する高い熱
膨張係数を有するガラスセラミック焼結体が容易に得ら
れるためであり、酸化バリウムの量を5〜60重量%の
範囲とするのは、5重量%より少ないとガラスの低軟化
点化が困難となり、60重量%より多いとガラス化が困
難で特性が不安定となりやすく、また耐薬品性が著しく
低下してしまうためである。特に酸化バリウムの量は2
0〜40重量%が望ましい。
The reason why the glass containing 5 to 60% by weight of barium oxide (BaO) is used for the glass ceramic sintered body constituting the insulating substrate 1 is that the glass containing barium oxide has a low softening point and is relatively high. Since it has a thermal expansion coefficient, the amount of glass is small, and it is possible to add a large amount of filler having high thermal expansion, and the thermal expansion coefficient of the lid 2 made of copper or a metal material containing copper as a main component is reduced. This is because a glass-ceramic sintered body having a similar high coefficient of thermal expansion can be easily obtained, and the amount of barium oxide is set in the range of 5 to 60% by weight. This is because if it is more than 60% by weight, vitrification is difficult, the characteristics are likely to be unstable, and the chemical resistance is significantly reduced. In particular, the amount of barium oxide is 2
0 to 40% by weight is desirable.

【0029】前記酸化バリウム含有ガラスとしては、例
えば、 SiO2−BaO−B23−Al23−CaO SiO2−BaO−B23−Al23−TiO2−SrO SiO2−BaO−B23−CaO−Al23−MgO
−ZrO2 SiO2−BaO−B23−CaO−Al23−MgO 等の組成物も好適に使用される。
As the barium oxide-containing glass, for example, SiO 2 —BaO—B 2 O 3 —Al 2 O 3 —CaO SiO 2 —BaO—B 2 O 3 —Al 2 O 3 —TiO 2 —SrO SiO 2 —BaO—B 2 O 3 —CaO—Al 2 O 3 —MgO
A composition such as —ZrO 2 SiO 2 —BaO—B 2 O 3 —CaO—Al 2 O 3 —MgO is also preferably used.

【0030】なお、このような酸化バリウム含有ガラス
は、そのヤング率が50〜80GPaと低いため、ガラ
スセラミック焼結体からなる絶縁基体1のヤング率も約
50〜80GPaと低い変形がしやすいものとなってい
る。そのため絶縁基体1と蓋体2との間に両者の熱膨張
係数の相異に起因して若干の熱応力が発生したとしても
該熱応力は絶縁基体1を適度に変形させることによって
効果的に吸収、緩和され、絶縁基体1に割れやクラック
等が発生するのが有効に防止されて、半導体素子収納用
パッケージとしての信頼性がより一層優れたものとな
る。
Since such a barium oxide-containing glass has a low Young's modulus of 50 to 80 GPa, the insulating substrate 1 made of a glass ceramic sintered body also has a Young's modulus of about 50 to 80 GPa, which is easily deformable. It has become. Therefore, even if a slight thermal stress is generated between the insulating base 1 and the lid 2 due to a difference in thermal expansion coefficient between the insulating base 1 and the lid 2, the thermal stress can be effectively reduced by appropriately deforming the insulating base 1. Absorption and relaxation are effectively prevented from generating cracks and cracks in the insulating substrate 1, and the reliability as a semiconductor element storage package is further improved.

【0031】また、前記酸化バリウム含有ガラスの屈伏
点は、400〜800℃、特に400〜700℃である
ことが望ましい。これは酸化バリウム含有ガラスおよび
フィラーからなる混合物を成形する場合、有機樹脂等の
成形用バインダーを添加するが、このバインダーを効率
的に除去するとともに絶縁基体1と同時に焼成されるメ
タライズ配線層5との焼成条件のマッチングを図るため
必要であり、屈伏点が400℃より低いとガラスが低い
温度で焼結が開始されるために、例えば、銀(Ag)、
銅(Cu)等の焼結開始温度が600〜800℃のメタ
ライズ配線層5との同時焼成ができず、また成形体の緻
密化が低温で開始するためにバインダーは分解揮散でき
なくなりバインダー成分が残留し特性に影響を及ぼす結
果になるためである。また屈伏点が800℃より高いと
ガラス量を多くしないと焼結しにくくなるため、高価な
ガラスを大量に必要とするために焼結体のコストを高め
ることになる。
The sag point of the barium oxide-containing glass is preferably from 400 to 800 ° C., particularly preferably from 400 to 700 ° C. This is because when a mixture of barium oxide-containing glass and a filler is formed, a molding binder such as an organic resin is added, and the binder is efficiently removed and the metallized wiring layer 5 baked simultaneously with the insulating substrate 1 is formed. It is necessary to match the firing conditions of the above. If the yield point is lower than 400 ° C., the glass starts sintering at a low temperature. For example, silver (Ag),
Simultaneous firing with the metallized wiring layer 5 having a sintering start temperature of 600 to 800 ° C. such as copper (Cu) cannot be performed, and the densification of the molded body starts at a low temperature. This is because the residual characteristics are adversely affected. If the yield point is higher than 800 ° C., sintering becomes difficult unless the amount of glass is increased, so that a large amount of expensive glass is required, which increases the cost of the sintered body.

【0032】一方、前記ガラスと組み合わせるフィラー
としては、ガラスセラミック焼結体の熱膨張係数を銅や
銅を主成分とする金属材料からなる蓋体2に近似させる
ために40〜400℃における熱膨張係数が6ppm/
℃以上のものとしておくことが重要である。熱膨張係数
が6ppm/℃以上のフィラーを含有させないとガラス
セラミック焼結体の熱膨張係数は8.5ppm/℃以上
に高めることができない。
On the other hand, as a filler to be combined with the glass, a thermal expansion coefficient at 40 to 400 ° C. is used in order to approximate the thermal expansion coefficient of the glass ceramic sintered body to the lid 2 made of copper or a metal material containing copper as a main component. The coefficient is 6 ppm /
It is important to keep the temperature above ° C. Unless a filler having a thermal expansion coefficient of 6 ppm / ° C. or more is contained, the thermal expansion coefficient of the glass ceramic sintered body cannot be increased to 8.5 ppm / ° C. or more.

【0033】このような熱膨張係数が6ppm/℃以上
のフィラーとしては、クリストバライト(SiO2)、
クオーツ(SiO2)、トリジマイト(SiO2)、フォ
ルステライト(2MgO・SiO2)、スピネル(2M
gO・Al23)、ウオラスナイト(CaO・Si
2)、モンティセラナイト(CaO・MgO・Si
2)、ネフエリン(Na2O・Al23・SiO2)、
ジオプサイト(CaO・MgO・2SiO2)、メルビ
ナイト(3CaO・MgO・2SiO2)、アケルマイ
ト(2CaO・MgO・2SiO2)、マグネシア(M
gO)、アルミナ(Al2 3)、カーネギアイト(Na
2O・Al23・2SiO2)、エンスタタイト(MgO
・SiO2)、ホウ酸マグネシウム(MgO・B
23)、セルシアン(BaO・Al23・2Si
2)、B23・2MgO・2SiO2、ガーナイト(Z
nO・Al23)の群から選ばれる少なくとも一種以上
が挙げられる。これらの中でも、クリストバライト、ク
オーツ、トリジマイト等のSiO2系材料やフォルステ
ライト、エンスタタイトの群から選ばれる一種が高熱膨
張化を図る上で望ましい。
Such a coefficient of thermal expansion is not less than 6 ppm / ° C.
Cristobalite (SiO 2)Two),
Quartz (SiOTwo), Tridymite (SiOTwo), Pho
Lusterite (2MgO ・ SiOTwo), Spinel (2M
gO · AlTwoOThree), Wollastonite (CaO.Si)
OTwo), Monticellanite (CaO.MgO.Si)
OTwo), Nepheline (NaTwoO ・ AlTwoOThree・ SiOTwo),
Diopsite (CaO ・ MgO ・ 2SiOTwo), Melby
Knight (3CaO.MgO.2SiO)Two), Akermai
(2CaO.MgO.2SiO)Two), Magnesia (M
gO), alumina (AlTwoO Three), Carnegieite (Na
TwoO ・ AlTwoOThree・ 2SiOTwo), Enstatite (MgO)
・ SiOTwo), Magnesium borate (MgOB
TwoOThree), Celsian (BaO.Al)TwoOThree・ 2Si
OTwo), BTwoOThree・ 2MgO ・ 2SiOTwo, Garnite (Z
nO · AlTwoOThree) At least one selected from the group
Is mentioned. Among them, Cristobalite, C
SiO such as oats and tridymiteTwoSystem material and forster
One selected from the group of light and enstatite has high thermal expansion
This is desirable for tensioning.

【0034】前記ガラスとフィラーは、焼成温度や最終
的に得られるガラスセラミック焼結体の熱膨張特性など
の目的に応じて適当な比率で混合される。前記酸化バリ
ウム含有ガラスは、フィラー無添加では収縮開始温度は
700℃以下で、850℃以上では溶融してしまい、メ
タライズ配線層5等を配設することができない。しか
し、フィラーを混合することにより焼成過程において結
晶の析出が起こり、フィラーを液相焼結させるための液
相を適切な温度で形成させることができる。また、成形
体全体の収縮開始温度を上昇させることができるため、
このフィラーの含有量の調整によりメタライズ配線層5
との同時焼成条件のマッチングを図ることができる。
The glass and filler are mixed at an appropriate ratio depending on the purpose such as the firing temperature and the thermal expansion characteristics of the finally obtained glass ceramic sintered body. The barium oxide-containing glass has a shrinkage onset temperature of 700 ° C. or lower when no filler is added, and melts at 850 ° C. or higher, so that the metallized wiring layer 5 and the like cannot be provided. However, by mixing the filler, crystals are precipitated in the firing process, and a liquid phase for liquid phase sintering of the filler can be formed at an appropriate temperature. Also, since the shrinkage start temperature of the entire molded body can be increased,
By adjusting the content of the filler, the metallized wiring layer 5 is formed.
And the simultaneous firing conditions can be matched.

【0035】前記ガラスセラミック焼結体の酸化バリウ
ム含有ガラスとフィラーの比率は、酸化バリウム含有ガ
ラスが20〜80体積%、フイラーが80〜20体積%
に特定される。この酸化バリウム含有ガラスとフイラー
の量を上記の範囲とするのは酸化バリウム含有ガラスの
量が20体積%より少ない、言い換えればフィラーが8
0体積%より多いと液相焼結することができずに高温で
焼成する必要があり、その場合に、例えば銅を主成分と
するメタライズ配線層5を絶縁基体1と同時焼成によっ
て絶縁基体1の所定位置に被着形成させることができな
くなる危険性があり、また酸化バリウム含有ガラスが8
0体積%より多い、言い換えるとフィラーが20体積%
より少ないとガラスセラミック焼結体の焼結開始温度が
低くなるためにメタライズ配線層5と同時焼成ができな
くなる危険性があるためである。
The ratio of the barium oxide-containing glass and the filler in the glass ceramic sintered body is 20 to 80% by volume for the barium oxide-containing glass and 80 to 20% by volume for the filler.
Is specified. The reason why the amounts of the barium oxide-containing glass and the filler are within the above ranges is that the amount of the barium oxide-containing glass is less than 20% by volume.
If the content is more than 0% by volume, liquid phase sintering cannot be performed and firing must be performed at a high temperature. In this case, for example, the metallized wiring layer 5 containing copper as a main component is co-fired with the insulating base 1 to form the insulating base 1. There is a danger that it will not be possible to form a coating at a predetermined position, and the barium oxide-containing glass
More than 0% by volume, in other words, 20% by volume of filler
If the amount is smaller than this, the sintering start temperature of the glass ceramic sintered body is lowered, and there is a risk that simultaneous firing with the metallized wiring layer 5 cannot be performed.

【0036】また、フィラーの量は、酸化バリウムの屈
伏点に応じ、その量を適宜調整することが望ましい。す
なわち、ガラスの屈伏点が400〜700℃と低い場
合、低温での焼結性が高まるためフィラーの含有量は4
0〜80体積%と比較的多く配合できる。これに対し
て、ガラスの屈伏点が700〜800℃と高い場合、焼
結性が低下するためフィラーの含有量は20〜50体積
%と比較的少なく配合することが望ましい。
It is desirable that the amount of the filler is appropriately adjusted according to the yield point of barium oxide. That is, when the yield point of the glass is as low as 400 to 700 ° C., the sinterability at a low temperature is enhanced, so that the content of the filler is 4%.
A relatively large amount of 0 to 80% by volume can be blended. On the other hand, when the yield point of the glass is as high as 700 to 800 ° C., the sinterability is reduced. Therefore, the content of the filler is desirably relatively low, that is, 20 to 50% by volume.

【0037】更に前記ガラスセラミック焼結体は、前記
フィラー中および/またはガラス中にジルコニウム化合
物(Zr化合物)を酸化ジルコニウム(ZrO2)換算
で0.1〜30重量%の割合で含有させておくことが重
要である。
Further, in the above-mentioned glass ceramic sintered body, a zirconium compound (Zr compound) is contained in the filler and / or the glass in a ratio of 0.1 to 30% by weight in terms of zirconium oxide (ZrO 2 ). This is very important.

【0038】前記Zr化合物の含有はガラスセラミック
焼結体の耐酸化性を高めるためであり、メタライズ配線
層5の露出表面にニッケル、金等のめっき層を被着させ
るためのめっき前処理液、めっき液等の酸性、アルカリ
性の液に絶縁基体1が接触したとしても絶縁基体1が酸
化、腐食するのを有効に防止することができ、これによ
って半導体素子収納用パッケージの信頼性を確保するこ
とができる。
The content of the Zr compound is to enhance the oxidation resistance of the glass ceramic sintered body. A plating pretreatment liquid for applying a plating layer of nickel, gold, or the like to the exposed surface of the metallized wiring layer 5 is provided. Even if the insulating substrate 1 comes into contact with an acidic or alkaline solution such as a plating solution, the insulating substrate 1 can be effectively prevented from being oxidized and corroded, thereby ensuring the reliability of the package for accommodating the semiconductor element. Can be.

【0039】前記Zr化合物としては、例えば、ZrO
2、ZrSiO2、CaO・ZrO2、ZrB2、ZrP2
7、ZrBの群から選ばれる少なくとも一種が挙げら
れる。
As the Zr compound, for example, ZrO
2, ZrSiO 2, CaO · ZrO 2, ZrB 2, ZrP 2
At least one selected from the group consisting of O 7 and ZrB is exemplified.

【0040】このZr化合物は化合物粉末としてフィラ
ー中の一成分として混合する。この場合、添加時のZr
化合物、特にZrO2のBET比表面積によって、ガラ
スセラミック焼結体の耐薬品性が変化する傾向にあり、
BET比表面積が25m2/g以上であることが望まし
く、BET比表面積が25m2/gよりも小さいと耐薬
品性の改善効果が小さくなる傾向にある。また他の配合
形態としては、ガラス粉末として酸化バリウム(Ba
O)以外の成分として酸化ジルコニウム(ZrO 2)を
含有するガラスを用いてもよい。
This Zr compound is used as a compound powder as a filler.
Mix as one of the ingredients. In this case, Zr at the time of addition
Compounds, especially ZrOTwoOf BET specific surface area
The chemical resistance of sintered ceramics tends to change,
BET specific surface area is 25mTwo/ G or more
And BET specific surface area is 25mTwoLess than / g
The effect of improving the quality tends to be small. Also other formulations
As a form, barium oxide (Ba) is used as glass powder.
O), zirconium oxide (ZrO) Two)
Glass containing glass may be used.

【0041】なお、前記Zr化合物は酸化バリウム含有
ガラス及び/又はフィラーへの添加量がZrO2換算で
0.1重量%未満であると、ガラスセラミック焼結体の
耐薬品性を改善する効果が不十分となり、絶縁基体1が
ニッケル、金等のめっき液や、フッ酸等のめっき前処理
液等で酸化腐食され、外観不良やメタライズ配線層5の
被着強度の劣化が生じてしまい、30重量%を超える
と、ガラスセラミック焼結体の熱膨張係数が8.5pp
m/℃よりも低くなり、絶縁基体1と蓋体2との熱膨張
係数の差が大きくなり、この熱膨張係数差に起因して生
じる熱応力によって絶縁基体1に、短期間で、機械的な
破壊を生じたり、絶縁基体1から蓋体2が剥離してしま
う。従って、Zr化合物の酸化バリウム含有ガラス及び
/又はフィラーへの添加量はZrO2換算で0.1〜3
0重量%の範囲に特定され、0.2〜10重量%の範囲
がより一層好ましい。
When the amount of the Zr compound added to the barium oxide-containing glass and / or the filler is less than 0.1% by weight in terms of ZrO 2 , the effect of improving the chemical resistance of the glass ceramic sintered body is reduced. As a result, the insulating substrate 1 is oxidized and corroded by a plating solution such as nickel or gold, or a plating pretreatment solution such as hydrofluoric acid, etc., resulting in poor appearance and deterioration of the adhesion strength of the metallized wiring layer 5. If it exceeds 10% by weight, the thermal expansion coefficient of the glass ceramic sintered body is 8.5 pp.
m / ° C., the difference in the thermal expansion coefficient between the insulating base 1 and the lid 2 increases, and the thermal stress generated due to the difference in the thermal expansion coefficient causes the insulating base 1 to have a short-term mechanical Such a destruction may occur, or the lid 2 may be separated from the insulating substrate 1. Therefore, the amount of the Zr compound added to the barium oxide-containing glass and / or filler is 0.1 to 3 in terms of ZrO 2.
It is specified in the range of 0% by weight, and the range of 0.2 to 10% by weight is even more preferable.

【0042】前記ガラスセラミック焼結体は、所定の量
に秤量された酸化バリウム含有ガラス、フィラー、Zr
化合物に、適当な成形の有機樹脂バインダーを添加した
後、ドクターブレード法や圧延法、金型プレス法等の成
形手段により任意の形状、例えば、シート状に成形し、
しかる後、焼成することによって製作される。
The glass-ceramic sintered body is composed of barium oxide-containing glass, filler, Zr
To the compound, after adding an organic resin binder of a suitable molding, doctor blade method and rolling method, by molding means such as a mold pressing method, molded into an arbitrary shape, for example, a sheet,
Thereafter, it is manufactured by firing.

【0043】また、前記ガラスセラミック焼結体からな
る絶縁基体1へのメタライズ配線層5の被着は、前記シ
ート状成形体に対して、銅(Cu)や銀(Ag)等の金
属粉末に有機バインダー、可塑剤、溶剤を添加混合して
得た金属ペーストを予めスクリーン印刷法により所定パ
ターンに印刷塗布しておくことによって行われる。
The metallized wiring layer 5 is applied to the insulating substrate 1 made of the glass ceramic sintered body by applying a metal powder such as copper (Cu) or silver (Ag) to the sheet-like molded body. This is performed by printing and applying a metal paste obtained by adding and mixing an organic binder, a plasticizer, and a solvent in a predetermined pattern by a screen printing method in advance.

【0044】更に焼成に当たっては、まず、成形のため
に添加した有機樹脂バインダーを除去する。有機樹脂バ
インダーの除去は、700℃前後の大気雰囲気中で行な
われるが、メタライズ配線層5として銅を主成分とする
金属を用いる場合には、水蒸気を含有する100〜70
0℃の窒素雰囲気中で行われる。
Further, in firing, first, the organic resin binder added for molding is removed. The removal of the organic resin binder is performed in an air atmosphere at about 700 ° C. However, when a metal containing copper as a main component is used as the metallized wiring layer 5, the metallized wiring layer 5 contains water vapor containing 100 to 70%.
This is performed in a nitrogen atmosphere at 0 ° C.

【0045】焼成は、850℃〜1300℃の酸化雰囲
気中で行われ、これにより相対密度90%以上まで緻密
化される。この時の焼成温度が850℃より低いと緻密
化することができず、1300℃を超えるとメタライズ
配線層5の同時焼成でメタライズ配線層5が溶融してし
まう。ただし、メタライズ配線層5として銅を主成分と
する金属を用いる場合には、850〜1050℃の非酸
化性雰囲気中で行われる。
The sintering is performed in an oxidizing atmosphere at 850 ° C. to 1300 ° C., whereby the relative density is increased to 90% or more. If the firing temperature at this time is lower than 850 ° C., densification cannot be achieved, and if it exceeds 1300 ° C., the metallized wiring layer 5 is melted by simultaneous firing of the metallized wiring layer 5. However, when a metal containing copper as a main component is used as the metallized wiring layer 5, the metallization wiring layer 5 is formed in a non-oxidizing atmosphere at 850 to 1050C.

【0046】なお、本発明は上述の実施例に限定される
ものではなく、本発明の要旨を逸脱しない範囲であれば
種々の変更は可能であり、例えば、図2に示すような、
半導体素子が収容される凹部11a底面から絶縁基体1
1下面にかけてメタライズ配線層15が形成され、この
メタライズ配線層15の凹部1a底面に露出した部位に
半導体素子13の電極が金バンプ等の金属バンプ16を
介して接続されるとともに、絶縁基体11下面に露出し
た部位に半田ボール17等の外部接続端子が接続され、
蓋体12と半導体素子13との間に樹脂層18を充填す
ることにより半導体素子13を気密に収容するような構
造の半導体素子収納用パッケージにも適用可能である。
It should be noted that the present invention is not limited to the above-described embodiment, and various modifications can be made without departing from the scope of the present invention. For example, as shown in FIG.
Insulating base 1 from the bottom of concave portion 11a in which a semiconductor element is accommodated
A metallized wiring layer 15 is formed over the lower surface of the semiconductor substrate 13, and an electrode of the semiconductor element 13 is connected to a portion of the metallized wiring layer 15 exposed on the bottom surface of the concave portion 1 a via a metal bump 16 such as a gold bump. An external connection terminal such as a solder ball 17 is connected to the exposed portion,
By filling the resin layer 18 between the lid 12 and the semiconductor element 13, the semiconductor element 13 can also be applied to a semiconductor element housing package having a structure in which the semiconductor element 13 is airtightly housed.

【0047】この場合も、絶縁基体11を、BaOを5
〜60重量%含有するガラス20〜80体積%と、40
〜400℃における熱膨張係数が6ppm/℃以上であ
るフィラー80〜20体積%とから成り、前記ガラス及
び/又はフィラー中にZr化合物をZrO2換算で0.
1〜30重量%含有しているガラスセラミック焼結体で
形成しておけば絶縁基体11の熱膨張係数が銅もしくは
銅を主成分とする金属材料からなる蓋体12の熱膨張係
数に近似し、絶縁基体11と蓋体12の各々に半導体素
子13が作動時に発生する熱等が印加されたとしても、
絶縁基体11と蓋体12との間には大きな熱応力が発生
することはなく、これによって蓋体12の絶縁基体11
からの剥離、絶縁基体11での割れやクラック等の発生
が有効に防止されて容器内部の半導体素子13を長期に
わたって確実に気密封止することができ、半導体素子1
3を安定、かつ正常に作動させることが可能となる。
Also in this case, the insulating substrate 11 is
20 to 80% by volume of glass containing 60 to 60% by weight;
Thermal expansion coefficient at to 400 ° C. consists filler 80-20% by volume and is 6 ppm / ° C. or more, 0 Zr compound in terms of ZrO 2 in the glass and / or filler.
If it is formed of a glass ceramic sintered body containing 1 to 30% by weight, the thermal expansion coefficient of the insulating base 11 is close to the thermal expansion coefficient of the lid 12 made of copper or a metal material containing copper as a main component. Even if heat or the like generated when the semiconductor element 13 operates is applied to each of the insulating base 11 and the lid 12,
No large thermal stress is generated between the insulating base 11 and the lid 12, so that the insulating base 11 of the lid 12
And the occurrence of cracks and cracks in the insulating substrate 11 can be effectively prevented, and the semiconductor element 13 inside the container can be hermetically sealed for a long period of time.
3 can be operated stably and normally.

【0048】[0048]

【発明の効果】本発明の半導体素子収納用パッケージに
よれば、蓋体を銅もしくは銅を主成分とする金属で形成
し銅が磁性をほとんど有しないことから、蓋体が外部の
磁界で磁化されることはほとんどなく、磁束の高密度化
によるノイズの発生が効果的に防止され、その結果、半
導体素子を常に正常、かつ安定に作動させることができ
る。
According to the package for housing a semiconductor element of the present invention, since the lid is formed of copper or a metal containing copper as a main component and copper has almost no magnetism, the lid is magnetized by an external magnetic field. The occurrence of noise due to the high density of the magnetic flux is effectively prevented, and as a result, the semiconductor element can always be operated normally and stably.

【0049】また同時に本発明の半導体素子収納用パッ
ケージによれば、半導体素子を収納する容器の絶縁基体
を、5〜60重量%のBaOを含有するガラス20〜8
0体積%と、40〜400℃における熱膨張係数が6p
pm/℃以上であるフィラー80〜20体積%とから成
り、前記ガラス及び/又はフィラー中にZr化合物をZ
rO2換算で0.1〜30重量%含有しているガラスセ
ラミック焼結体で形成したことから絶縁基体の40〜4
00℃における熱膨張係数を8.5〜18.5ppm/
℃として銅もしくは銅を主成分とする金属から成る蓋体
の熱膨張係数(銅:17ppm/℃)に近似させること
ができ、その結果、絶縁基体と蓋体の各々に半導体素子
が作動時に発生する熱等が印加されたとしても絶縁基体
と蓋体との間には大きな熱応力が発生することはなく、
これによって前記熱応力により蓋体が絶縁基体から剥離
したり、絶縁基体に割れやクラック等が発生する、とい
うことが有効に防止され、容器内部の半導体素子を長期
にわたり確実に気密封止することができ、半導体素子を
より一層確実に安定、かつ正常に作動させることが可能
となる。
According to the semiconductor device housing package of the present invention, the insulating base of the container housing the semiconductor device is made of glass 20-8 containing BaO of 5-60% by weight.
0% by volume and a thermal expansion coefficient of 6p at 40 to 400 ° C.
pm / ° C. or higher, and 80 to 20% by volume of a filler.
Since it is formed of a glass ceramic sintered body containing 0.1 to 30% by weight in terms of rO 2 , the insulating substrate has a thickness of 40 to 4%.
The thermal expansion coefficient at 00 ° C. is 8.5 to 18.5 ppm /
The temperature can be approximated to the thermal expansion coefficient (copper: 17 ppm / ° C.) of a lid made of copper or a metal containing copper as a main component. As a result, semiconductor elements are generated on the insulating base and the lid during operation. Even if heat or the like is applied, no large thermal stress is generated between the insulating base and the lid,
This effectively prevents the lid from peeling off from the insulating base due to the thermal stress, and the occurrence of cracks, cracks, and the like in the insulating base, and reliably hermetically seals the semiconductor element inside the container for a long time. Thus, the semiconductor element can be more reliably stably and normally operated.

【0050】また同時に、前記ガラスセラミック焼結体
は、BaOを5〜60重量%含有するガラスのヤング率
が50〜80GPaと低いため絶縁基体のヤング率も約
50〜80GPaと低いものとなっている。そのため絶
縁基体と蓋体との間に両者の熱膨張係数の相異に起因し
て若干の熱応力が発生したとしても該熱応力は絶縁基体
を適度に変形させることによって効果的に吸収、緩和さ
れ、絶縁基体に割れやクラック等が発生するのが有効に
防止されて、半導体素子収納用パッケージとしての信頼
性がより一層優れたものとなる。
At the same time, in the glass ceramic sintered body, the Young's modulus of the glass containing 5 to 60% by weight of BaO is as low as 50 to 80 GPa, and the Young's modulus of the insulating substrate is as low as about 50 to 80 GPa. I have. Therefore, even if a slight thermal stress is generated between the insulating base and the lid due to a difference in thermal expansion coefficient between the two, the thermal stress is effectively absorbed and relaxed by appropriately deforming the insulating base. As a result, the occurrence of cracks, cracks, and the like in the insulating base is effectively prevented, and the reliability as a semiconductor element storage package is further improved.

【0051】更に本発明の半導体素子収納用パッケージ
によれば、前記ガラスセラミック焼結体のガラス及び/
又はフィラー中にZr化合物をZrO2換算で0.1〜
30重量%含有させたことからガラスセラミック焼結体
の耐薬品性を大きく向上させることができ、その結果、
絶縁基体に設けたメタライズ配線層にニッケル、金等の
めっき層を被着させる際、絶縁基体を酸性、アルカリ性
等の薬液に浸漬したとしても絶縁基体に酸化、腐食等が
生じることもほとんどなく、半導体素子収納用パッケー
ジとしての信頼性を高いものとなすことができる。
Further, according to the package for accommodating a semiconductor element of the present invention, the glass and / or
Or 0.1 a Zr compound in terms of ZrO 2 in the filler
By containing 30% by weight, the chemical resistance of the glass ceramic sintered body can be greatly improved, and as a result,
When depositing a plating layer of nickel, gold, etc. on a metallized wiring layer provided on an insulating substrate, even if the insulating substrate is immersed in a chemical solution such as acidic or alkaline, oxidation, corrosion, etc. hardly occur on the insulating substrate, The reliability as a package for housing a semiconductor element can be made high.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の実施の一形態を示す概略的な断面図で
ある。
FIG. 1 is a schematic sectional view showing one embodiment of the present invention.

【図2】本発明の実施の他の形態の概略的な断面図であ
る。
FIG. 2 is a schematic sectional view of another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1、11・・絶縁基体 2、12・・蓋体 3、13・・半導体素子 4・・・・・容器 5、15・・メタライズ配線層 6・・・・・ボンディングワイヤ 7・・・・・外部リード端子 16・・・・金属バンプ 17・・・・半田ボール 18・・・・樹脂層 1, 11 ... insulating base 2, 12 ... lid 3, 13 ... semiconductor element 4 ... container 5, 15 ... metallized wiring layer 6 ... bonding wire 7 ... External lead terminals 16 Metal bumps 17 Solder balls 18 Resin layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】絶縁基体と蓋体とから成り、内部に半導体
素子を収納するための空所を有する半導体素子収納用パ
ッケージであって、 前記蓋体は、銅もしくは銅を主成分とする金属で形成さ
れ、かつ前記絶縁基体は、BaOを5〜60重量%含有
するガラス20〜80体積%と、40〜400℃におけ
る熱膨張係数が6ppm/℃以上であるフィラー80〜
20体積%とから成り、前記ガラス及び/又はフィラー
中にZr化合物をZrO 2換算で0.1〜30重量%含
有しているガラスセラミック焼結体で形成されているこ
とを特徴とする半導体素子収納用パッケージ。
1. A semiconductor device comprising: an insulating base; a lid;
Semiconductor element storage pad having a space for storing elements
The lid is formed of copper or a metal containing copper as a main component.
And the insulating substrate contains 5 to 60% by weight of BaO.
20-80% by volume of glass to be heated and at 40-400 ° C
Filler having a thermal expansion coefficient of at least 6 ppm / ° C.
20% by volume and the glass and / or filler
Zr compound in ZrO Two0.1 to 30% by weight conversion
Being formed of a glass ceramic sintered body
And a package for housing a semiconductor element.
JP2000070315A 2000-03-14 2000-03-14 Package for containing semiconductor element Pending JP2001267444A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2000070315A JP2001267444A (en) 2000-03-14 2000-03-14 Package for containing semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000070315A JP2001267444A (en) 2000-03-14 2000-03-14 Package for containing semiconductor element

Publications (1)

Publication Number Publication Date
JP2001267444A true JP2001267444A (en) 2001-09-28

Family

ID=18589069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000070315A Pending JP2001267444A (en) 2000-03-14 2000-03-14 Package for containing semiconductor element

Country Status (1)

Country Link
JP (1) JP2001267444A (en)

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