JP2001264994A - Method for producing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the accuracy of photolithography which is carried out on a silicon nitride layer. SOLUTION: The method for producing a semiconductor device has (a) a step for forming a silicon nitride layer 12 on a substrate 100, (b) a step for forming a photoresist layer 13 on the silicon nitride layer 12 and selectively exposing the photoresist layer 13 with light for exposure and (c) a step for developing the exposed photoresist layer 13 to obtain a patterned photoresist layer 13P. The coefficient k of the imaginary number part of the complex index (n+ik) of refraction of the silicon nitride layer 12 at the wavelength of the light for exposure is >=0.1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device capable of improving the accuracy of photolithography performed on a photoresist layer formed on a silicon nitride layer. Related to a manufacturing method.

[0002]

2. Description of the Related Art In a semiconductor process, for example, a polishing stop layer when an insulating film is buried by a polishing method in a groove formed in a semiconductor substrate, or an element isolation region is formed by selectively oxidizing the semiconductor substrate. There is a process in which a patterned silicon nitride layer is used as a thermal oxidation mask when performing this process. As a method for forming a patterned silicon nitride layer, generally, first, a silicon nitride layer is formed on a substrate, then a photoresist layer is formed on the silicon nitride layer, and photolithography is performed using exposure light. By selectively exposing the resist layer and then developing the exposed photoresist layer, a patterned photoresist layer is obtained, and the silicon nitride layer is removed using the photoresist layer by, for example, an etching method. The method has been adopted.

Conventionally, as a method of forming a silicon nitride layer, since a relatively excellent film thickness uniformity and a film forming rate can be achieved, a mixture of dichlorosilane (SiCl ₂ H ₂ ) / ammonia (NH ₃ ) is used. A low pressure CVD method using a gas system is widely adopted. Typical deposition conditions are SiCl ₂ H ₂
Flow rate = 10-100 SCCM, NH ₃ flow rate = 100-1
000 SCCM (however, the flow ratio of SiCl ₂ H ₂ to NH ₃ is approximately 5 to 10), pressure = 10 to 100 Pa, and film formation temperature = 750 to 800 ° C.

[0004]

By the way, in the generation of semiconductor devices having a design rule of 0.25 μm, a wavelength of 2.48 × 10 ⁻⁷ m is used as exposure light for photolithography.
(248 nm) KrF excimer laser light is used. However, when the photoresist layer is selectively exposed to light using KrF excimer laser light on the above-described conventional silicon nitride layer and developed, the dimensions and shape of the patterned photoresist layer are not as designed. There is. This is due to the K
This is because the absorption of the rF excimer laser light is insufficient, and the amount of exposure of the photoresist layer is locally excessive due to the reflected light from the silicon nitride layer. This problem will be described with reference to FIGS.

FIG. 6 shows that a groove is formed in a semiconductor substrate 30.
An insulating film (specifically, a silicon oxide film) is buried in the trench by a polishing method to form an element isolation region.
So-called shallow trench isolation (STI)
Assuming the above process, a state where the photoresist layer 33 formed on the silicon nitride layer 32 is selectively exposed is schematically illustrated. The process leading to exposure will be briefly described.

First, a pad oxide film 31 of about 1 × 10 ⁻⁸ m (10 nm) made of silicon oxide SiO ₂ is formed on a semiconductor substrate 30 made of, for example, a silicon semiconductor substrate by wet oxidation. This pad oxide film 31
Semiconductor substrate 30 and silicon nitride layer 3 formed in the next step
2 is formed to alleviate the stress difference between the semiconductor substrate 30 and the semiconductor substrate 30 to prevent defects from occurring. Next, a silicon nitride layer 32 is formed on the pad oxide film 31 by performing low-pressure CVD under the above-described film forming conditions. This silicon nitride layer 32 is a layer that plays a role as a polishing stop layer in polishing of an insulating film performed in a later step. next,
A photoresist layer 33 is formed on the silicon nitride layer 32, and a wavelength of 2.48 ×
Selective exposure with exposure light of 10 ⁻⁸ m (= 248 nm) is performed. Thus, an exposed portion 33A is formed in a portion of the photoresist layer 33 irradiated with the exposure light (see FIG. 6A).

As a typical value of the complex refractive index (n + ik) of the silicon nitride layer 32 at a wavelength of 2.48 × 10 ⁻⁸ m, 2.3 + 0.018i is obtained. here,
The imaginary part coefficient k of the complex refractive index (n + ik) is also called an absorption coefficient or an extinction coefficient, and is a value serving as an index of light absorption. Incidentally, the real number part n is a value usually called “refractive index”. Hereinafter, the real part n and the imaginary part coefficient k are expressed as
They may be collectively referred to as “optical constants n and k”. When the imaginary part coefficient k is on the order of 10 ^-2 as described above, the exposure light is hardly absorbed by the silicon nitride layer 32, but is mainly reflected at the interface between the silicon nitride layer 32 and the photoresist layer 33, and It is absorbed by the portion of the photoresist layer 33 in the vicinity. That is, as shown in an enlarged manner in FIG. 6B, the exposure amount of the photoresist layer 33 becomes locally excessive near the interface with the silicon nitride layer 32.

When the photoresist layer 33 is made of a positive photoresist material, an excessive exposure promotes the decomposition of the photoresist material and causes the line width of the photoresist layer obtained after development to be reduced. (See FIG. 7A). In particular, as the bottom dimension of the photoresist layer 33P is reduced, as shown in the figure,
P may collapse. In this case, the silicon nitride layer 32 and the pad oxide film 31 are etched using the photoresist layer 33P as a mask in the subsequent steps,
It becomes impossible to form a groove by etching the semiconductor substrate 30. On the other hand, when the photoresist layer 33 is made of a negative photoresist material, the excessive exposure promotes the crosslinking of the photoresist material and causes the line width of the photoresist layer 33N obtained after development to be increased ( (See FIG. 7B). When a negative photoresist material is used, unlike the positive photoresist material, there is little danger of the photoresist layer 33N collapsing. However, since the bottom dimension of the photoresist layer 33N is increased, the fineness of the circuit pattern of the semiconductor device is reduced. It is disadvantageous for high integration and eventually high integration.

As a measure for avoiding the above-mentioned problem,
An antireflection film made of an organic material or an inorganic material having a large light absorption at the wavelength of the exposure light is formed on the silicon nitride layer 3.
2 is conceivable. Above all, silicon oxynitride (SiON), which is one of the inorganic materials, shows relatively large light absorption characteristics at the wavelength of the excimer laser, and furthermore, the optical constants n and k can be relatively widened by controlling the film forming conditions. Because it can be changed, it is regarded as a useful antireflection film material in a manufacturing process of a semiconductor device of the 0.25 μm generation. However, in such a measure using an additional film, the number of steps and materials used in the semiconductor process increase, and there is a great possibility that productivity and economic efficiency are reduced. Thus, in order to avoid an increase in the number of steps and materials used, for example, the above-described silicon nitride layer 32 may be replaced with a layer made of silicon oxynitride. However, silicon oxynitride has a polishing rate equivalent to that of silicon oxide. However, it is impossible to expect this layer to function as a polishing stop layer,
It is no longer a realistic process.

Accordingly, the present invention provides a method of manufacturing a semiconductor device capable of improving the accuracy of photolithography performed on a silicon nitride layer while using the silicon nitride layer in a conventional manner without replacing it with another material layer. The purpose is to provide.

[0011]

According to the present invention, there is provided a method of manufacturing a semiconductor device, the method comprising: (a) forming a silicon nitride layer on a substrate; and (b) forming a silicon nitride layer on the silicon nitride layer. Forming a photoresist layer and selectively exposing the photoresist layer using exposure light, and (c) developing a photoresist layer after exposure to obtain a patterned photoresist layer. A method of manufacturing a semiconductor device having a silicon nitride layer in which, in step (a), an imaginary part coefficient k of a complex refractive index (n + ik) at the wavelength of exposure light is 0.1 or more. . The upper limit of the imaginary part coefficient k is not particularly limited, and may be a value that can be naturally achieved according to the film forming conditions of the silicon nitride layer and the quality of the obtained film.

The exposure light typically has a wavelength of 2.48 × 1.
It is an excimer laser beam of 0 ^-7 m (248 nm). This wavelength is the emission wavelength of the KrF exciton. In the present invention, the fact that the value of the imaginary part coefficient k at the wavelength of 2.48 × 10 ⁻⁷ m is 0.1 or more means that the imaginary part coefficient of the silicon nitride layer obtained by the above-mentioned conventional general film forming conditions is used. It means that it is one digit larger than the value of k. Therefore, the silicon nitride layer used in the present invention has a wavelength of 2.4.
Excimer laser light of 8 × 10 ⁻⁷ m (248 nm) can be sufficiently absorbed, and no extra reflected light is generated toward the photoresist layer on the silicon nitride layer. For this reason,
It is possible to prevent the problem that the exposure amount of the photoresist layer becomes locally excessive, so that the design dimensions and the design shape can be obtained even when the photoresist layer is formed using a positive type or a negative type photoresist material. It is possible to perform the same resist patterning. The photoresist layer is
Regardless of whether it is a positive type or a negative type, it can be formed using a known photoresist material.

In order to form a silicon nitride layer having the above imaginary part coefficient k, in the step (a), a low pressure CVD method in which a ratio of a flow rate of a silane (SiH ₄ ) gas to a flow rate of an ammonia (NH ₃ ) gas is controlled. Is preferably performed. Hereinafter, the ratio of the silane gas flow rate / ammonia gas flow rate may be simply referred to as the flow rate ratio. The optical constants n and k of the silicon nitride layer are correlated with the silicon content in the film within a certain range, and it is known that the optical constants n and k tend to increase as the silicon content increases. That is, in the above gas system, the optical constants n and k tend to increase as the silane gas flow rate increases with respect to the ammonia gas flow rate. As for the optical constants n and k of the silicon nitride layer, the change of the real part n and the change of the imaginary part coefficient k are substantially linked. Although the flow rate of each gas actually supplied to the CVD apparatus varies depending on the apparatus, it is preferable to select both the silane gas flow rate and the ammonia gas flow rate within a range of approximately 100 to 1000 SCCM. In the present invention, when the above-mentioned silane / ammonia mixed gas system is used, the film forming temperature is generally in the range of 600 to 650 ° C., and the pressure is generally in the range of 10 to 100 Pa. The above film formation temperature is 50 to 200 ° C. lower than the film formation temperature when a conventional dichlorosilane / ammonia mixed gas system is used.
And is also preferable from the viewpoint of lowering the temperature of the semiconductor process. Incidentally, the silane / ammonia mixed gas system used in the present invention may contain nitrogen gas as a carrier gas, and He or Ar for the purpose of obtaining a cooling effect or a dilution effect.
And other rare gases.

In the method of manufacturing a semiconductor device according to the present invention, after the step (c), (d) removing the silicon nitride layer using the patterned photoresist layer to obtain a patterned silicon nitride layer. It is practically preferable to further have Here, when the base is a semiconductor substrate, the method for manufacturing a semiconductor device of the present invention includes:
As a configuration having high practicality, there are a first configuration and a second configuration described below.

In the method of manufacturing a semiconductor device according to the first structure, after the step (d), (e) removing a part of the semiconductor substrate by using the patterned silicon nitride layer, thereby forming a groove in the semiconductor substrate. Further comprising the step of forming
This groove is a portion that becomes an element isolation region by burying an insulating film in a later step, and the obtained groove-type element isolation region or a process of forming such an element isolation region is formed by a shallow trench isolation. (ST
I) It is commonly called the law. The silicon nitride layer in the first structure functions as a polishing stop layer when the insulating film is buried in the groove by the polishing method, or functions as an etching stop layer when the insulating film is buried in the groove by the etch-back method.

In the method of manufacturing a semiconductor device according to the second configuration, after the step (d), (f) a step of removing the photoresist layer, and (g) a step of removing the semiconductor substrate by using the patterned silicon nitride layer. The method further includes a step of forming an element isolation region made of an oxide (an oxide of a substance constituting a semiconductor substrate) by oxidation. The silicon nitride layer in the second structure functions as a mask for covering a region where the semiconductor substrate is not oxidized. The process for forming the element isolation region in this manner is a selective oxidation isolation process or LOCOS (local oxidation of silicon).
It is commonly called a process.

In the first and second configurations, if a silicon nitride layer is provided directly on a semiconductor substrate, a defect may occur in the semiconductor substrate due to a difference between the two stresses. It is preferable to provide a stress relaxation layer between the layers. That is, it is preferable to use a semiconductor substrate having a stress relaxation layer on the surface as a base. When the semiconductor substrate is made of a silicon semiconductor substrate, the stress relaxation layer is typically made of silicon oxide, and is generally called a pad oxide film. The stress relaxation layer made of silicon oxide can be formed by a known dry oxidation method or wet oxidation method. Other examples of the substrate include an insulating layer and a conductor layer formed on a semiconductor substrate.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described based on embodiments of the present invention (hereinafter abbreviated as embodiments) with reference to the drawings.

(Embodiment 1) In Embodiment 1, the first
The shallow trench isolation method to which the method of manufacturing a semiconductor device according to the above configuration is applied will be described with reference to FIGS.

[Step-100] FIG.
A silicon nitride layer 12 is formed on
12 shows a state in which a photoresist layer 13 is further formed on
are doing. The base 100 is, for example, a silicon semiconductor substrate.
A semiconductor substrate 10 made of
For example, formed by performing wet oxidation
About 1 × 10 in thickness ^-8m (10 nm) pad oxide film 11
Consisting of Pad oxide film 11 functions as a stress relaxation layer.
Film. The silicon nitride layer 12 is formed by a low pressure CVD method.
About 1.5 × 10^-7~ 2.0 × 10^-7m (150-20
0 nm). In addition, silane (SiH
_Four) / Ammonia (NH_Three) SiH using mixed gas system
_FourFlow rate (R₁) For 400 SCCM, NH_ThreeFlow rate (R_Two) To 4
00 SCCM. That is, the silane gas flow rate R₁And Ann
Monia gas flow rate R_TwoRatio R₁/ R_TwoWas set to 1. Also,
As carrier gas, N_Two(Flow rate: 200 SCCM)
Was. Waves of the silicon nitride layer 12 formed under these conditions
Length 2.48 × 10^-7Complex refraction at m (248 nm)
The rate (n + ik) is 2.6 + 0.62i. That is,
The imaginary part coefficient k = 0.62. Photoresist layer 13
For example, use a novolak positive photoresist material
Apply to the silicon nitride layer 12 by pin coating
It is formed by baking.

[Step-110] Next, the photoresist layer 13 is selectively exposed through a photomask (not shown). As exposure light, Kr having a wavelength of 2.48 × 10 ⁻⁷ m is used.
An F excimer laser beam is used. The portion of the photoresist layer 13 irradiated with the exposure light becomes the exposed portion 13A (see FIG. 1B). Here, since the photoresist layer 13 is configured using a positive photoresist material,
In the exposed portion 13A, a reaction of reducing the molecular weight of the photoresist material is in progress.

[Step-120] Next, the photoresist layer 13 after the exposure is developed to obtain a patterned photoresist layer 13P (a suffix P indicates that the patterning has been performed, the same applies hereinafter) (FIG. 1). 2 (A)). The obtained photoresist layer 13P has dimensions and shapes as designed, and there is no narrowing of the bottom dimension, which has been a problem in the past, and no collapse of the photoresist layer due to this. This is because, as shown in FIG. 2B, even if the exposure light transmitted through the photoresist layer 13 is incident on the silicon nitride layer 12, the value of the imaginary part coefficient k of the silicon nitride layer 12 is larger than in the related art. This is because the exposure light was absorbed and hardly reflected toward the photoresist layer 13 side, and thus the photoresist layer 13 was not locally overexposed.

[Step-130] Next, the silicon nitride layer 12 is formed using the patterned photoresist layer 13P.
Is removed by, for example, a dry etching method to obtain a patterned silicon nitride layer 12P. Subsequently, the exposed portion of the pad oxide film 11 is also removed by a dry etching method to obtain a patterned pad oxide film 11P (see FIG. 3A). At this time, the dry etching of the silicon nitride layer 12 and the pad oxide film 11 can be performed using, for example, a magnetron RIE (reactive ion etching) apparatus and a fluorocarbon-based gas.

[Step-140] Next, a groove 14 is formed in the semiconductor substrate 10 by removing a part of the semiconductor substrate 10 by, for example, a dry etching method using the patterned silicon nitride layer 12P (FIG. 3). (B)). When forming the groove 14 by dry etching, the photoresist layer 13P may be removed and dry etching may be performed using the patterned silicon nitride layer 12P as a mask.

[Step-150] Next, the photoresist layer 13 is formed under ordinary ashing conditions using oxygen plasma.
P is removed, and then the insulating layer 1
5 (see FIG. 4A). Here, the insulating layer 15 made of silicon oxide is formed by, for example, a low pressure CVD method.

[Step-160] Next, the upper surface of the insulating layer 15 is formed on the substrate 1 by a chemical / mechanical polishing method (CMP method).
The insulating layer 15 is removed until the height of the insulating layer 15 becomes substantially equal to that of the surface 00. The portion of the insulating layer 15 remaining in the groove 14 becomes the element isolation region 15A (see FIG. 4B). The silicon nitride layer 12P is a layer that should originally function as a polishing stopper layer. However, at present, the polishing conditions for polishing the silicon nitride layer 12P at a certain speed must be adopted. In (B), the expression that the silicon nitride layer 12P and the insulating layer 15 are removed at the same time is used.
Although FIG. 4B shows a state in which the silicon nitride layer 12P slightly remains on the base 100, the silicon nitride layer 12P does not have to remain. In fact,
Since the polishing rate of the silicon nitride layer 12P is higher in a region where the groove portions 14 are sparsely than in a region where the groove portions 14 are densely, the silicon nitride layer 12P hardly remains.

[Step-170] Finally, the pad oxide film 1
1P is removed using a dilute hydrofluoric acid aqueous solution. At this time, the silicon nitride layer 12 remaining on the pad oxide film 11P
P is removed together with the removal of the pad oxide film 11P (see FIG. 4C).

Here, the characteristics of the silicon nitride layer 12P and a conventional general silicon nitride layer will be compared and studied. The comparison items were dry etching selectivity for silicon, CMP selectivity for silicon oxide, and
It is a wet etching selectivity to silicon oxide. The dry etching selectivity to silicon is such that the dry etching for forming the groove 14 in the semiconductor substrate 10 in the above [Step-140] is performed by the silicon nitride layer 12.
When P is used as a mask, it is an index for evaluating the performance of the mask (that is, dry etching resistance). The CMP selectivity to silicon oxide is an index for evaluating the performance of the silicon nitride layer 12P as a polishing stopper layer (ie, CMP resistance) in the above [Step-160]. The results are shown in Table 1 below. The silicon nitride layer 12P used in the present invention is different from a conventional general silicon nitride layer.
Although the dry etching selectivity for silicon and the CMP selectivity for silicon oxide are slightly reduced,
It has been clarified that the practicality is no different from the conventional general silicon nitride layer.

[Table 1]

(Embodiment 2) In Embodiment 2, the second
The process of selective oxidation separation to which the method of manufacturing a semiconductor device according to the above configuration is applied will be described with reference to FIG.

[Step-200] FIG.
FIG. 3 shows a state in which a silicon nitride layer 22 is formed on the silicon nitride layer 00, a photoresist layer 23 is further formed on the silicon nitride layer 22, and the photoresist layer 23 is selectively exposed. The base 200 includes a semiconductor substrate 20 made of, for example, a silicon semiconductor substrate, and a thickness of about 1 × 1 formed by performing, for example, wet oxidation on the surface of the semiconductor substrate 20.
It is composed of a pad oxide film 21 of ^0-8 m (10 nm). The pad oxide film 21 is a film that functions as a stress relaxation layer.
The wavelength of the obtained silicon nitride layer 22 is 2.48 × 10 ⁻⁷ m.
The complex refractive index (n + ik) at (248 nm) is
2.6 + 0.62i, which is the same as that of the silicon nitride layer 12 obtained in the first embodiment. Photoresist layer 23
Can be formed in the same manner as the photoresist layer 13 of the first embodiment. Exposure is performed using a KrF excimer laser beam having a wavelength of 2.48 × 10 ⁻⁷ m via a photomask (not shown). The portion of the photoresist layer 23 irradiated with the exposure light becomes the exposed portion 23A. Here, since the photoresist layer 23 is formed using a positive-type photoresist material, a low-molecular-weight reaction of the photoresist material is progressing in the exposed portion 23A.

[Step-210] Next, the patterned photoresist layer 23P is obtained by developing the exposed photoresist layer 23. The obtained photoresist layer 23P has the dimensions and shape as designed, and there is no narrowing of the bottom dimension and the collapse of the photoresist layer caused by this, which has been a problem in the past. Furthermore, the patterned silicon nitride layer 22P is obtained by removing the silicon nitride layer 22 using, for example, a dry etching method using the patterned photoresist layer 23P. Subsequently, the exposed portion of the pad oxide film 21 is also removed by a dry etching method to obtain a patterned pad oxide film 21P (see FIG. 5B). At this time, the dry etching of the silicon nitride layer 22 and the pad oxide film 21 is performed, for example, by magnetron RIE.
(Reactive ion etching) can be performed using an apparatus and a fluorocarbon-based gas.

[Step-220] Next, normal ashing using oxygen plasma is performed to form a photoresist layer 23P.
(See FIG. 5C).

[Step-230] Next, the exposed portion of the semiconductor substrate 20 is oxidized by using the patterned silicon nitride layer 22P to form an element isolation region 20A made of an oxide of the semiconductor substrate 20 (here, silicon oxide). (FIG. 5)
(D)). The oxidation can be performed under ordinary selective oxidation conditions.

The present invention has been described based on the embodiments of the present invention, but the present invention is not limited to these embodiments. The details of the configuration of the semiconductor device, the processing conditions in the method of manufacturing the semiconductor device, the details of the materials used, and the like are merely examples, and can be appropriately changed, selected, and combined.

[0036]

As is clear from the above description, according to the method of manufacturing a semiconductor device of the present invention, even when photolithography is performed on a silicon nitride layer, the silicon nitride layer at the wavelength of the exposure light is used. Complex refractive index of (n + ik)
Since the imaginary part coefficient k is 0.1 or more, the exposure light transmitted through the photoresist layer is substantially absorbed by the silicon nitride layer, and does not generate extra reflected light toward the photoresist layer. Therefore, local overexposure of the photoresist layer is prevented, and highly accurate photolithography can be performed. The present invention is particularly applicable to light having a wavelength of 2.
The use of an excimer laser beam of 48 × 10 ⁻⁷ m has a remarkable effect on the improvement of photolithography accuracy, whereby, for example, a fine element isolation region can be formed accurately.

[Brief description of the drawings]

FIG. 1 is a process chart conceptually showing a shallow trench isolation process to which a method of manufacturing a semiconductor device according to a first configuration of the present invention is applied.

FIG. 2 is a conceptual process diagram of a process following FIG. 1;

FIG. 3 is a conceptual process diagram of a process following FIG. 2;

FIG. 4 is a conceptual process diagram of a process following FIG. 3;

FIG. 5 is a process chart conceptually showing a selective oxidation separation process to which a method of manufacturing a semiconductor device according to a second configuration of the present invention is applied.

FIG. 6 is a conceptual diagram showing an exposure step in a conventional shallow trench isolation process.

FIG. 7 is a conceptual diagram for describing a problem in a conventional shallow trench isolation process.

[Explanation of symbols]

10, 20 ... semiconductor substrate, 11, 21 ... pad oxide film, 12, 12P, 22, 22P ... silicon nitride layer, 13, 13P, 23, 23P ... photoresist layer, 13A, 23A ... Exposure part, 14 ... Groove part,
15: insulating layer, 15A, 20A: element isolation region, 100, 200: base

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H01L 21/94 A F term (Reference) 2H025 AA02 AB16 AC04 AC08 DA21 DA34 DA40 4M108 AA01 AA20 AB13 5F032 AA13 AA35 AA44 DA03 DA23 DA33 5F046 PA04 5F058 BA20 BC08 BF04 BF23 BF30 BF37 BH12 BJ01

Claims (6)

[Claims] (A) forming a silicon nitride layer on a substrate; and (b) forming a photoresist layer on the silicon nitride layer.
(C) a step of selectively exposing the photoresist layer using exposure light; and (c) a step of obtaining a patterned photoresist layer by developing the exposed photoresist layer.
In the step (a), the complex refractive index (n) at the wavelength of the exposure light is
+ Ik). A method of manufacturing a semiconductor device, comprising forming a silicon nitride layer having an imaginary part coefficient k of 0.1 or more. 2. The method according to claim 1, wherein the exposure light is excimer laser light having a wavelength of 2.48 × 10 ⁻⁷ m. 3. The method according to claim 1, wherein in the step (a), the silicon nitride layer is formed by a low pressure CVD method in which a ratio of a flow rate of a silane gas to a flow rate of an ammonia gas is controlled. 4. The method according to claim 1, further comprising, after the step (c), (d) removing the silicon nitride layer using the patterned photoresist layer to obtain a patterned silicon nitride layer. The method for manufacturing a semiconductor device according to claim 1. 5. A step of forming a groove in the semiconductor substrate after the step (d) by removing a part of the semiconductor substrate using the patterned silicon nitride layer after the step (d). 5. The method for manufacturing a semiconductor device according to claim 4, further comprising: 6. The substrate is a semiconductor substrate. After the step (d), (f) removing the photoresist layer; and (g) oxidizing the semiconductor substrate using the patterned silicon nitride layer. 5. The method according to claim 4, further comprising the step of forming an element isolation region made of an oxide.