JP2001251007A - Semiconductor optical device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To lower a photo regeneration rate and increase an alignment accuracy in a lithography process by introducing a process of forming a protective film such as an insulation film for an alignment mark to prevent an alignment deviation in the lithography process in addition to the conventional manufacturing processes and manufacture a semiconductor optical device with a high yield as instructed by design specification and also provide a method of manufacturing the same. SOLUTION: By protecting the alignment mark section by the protective film such as an insulation film as shown in Figure 4E, an influence by crystal growth (buried growth) or etching which can be a cause for the damage of the alignment mark can be prevented. Thereby, the photo regeneration rate can be reduced to 0% and a ±0.5 μm alignment accuracy can be achieved. Furthermore, a semiconductor optical device can be manufactured as instructed by design specification.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor optical device relating to the field of optical communication and the like, and a method of manufacturing the same.

[0002]

2. Description of the Related Art Semiconductor optical devices are manufactured by crystal growth,
There are a number of steps such as an element isolation step and an impurity implantation step, and the base step is a photo etching step. The photo-etching process is a fine processing technology for forming a planar structure pattern and a vertical structure pattern of a designed device on a wafer, and may require a dimensional accuracy of ± 0.1 μm. Photoetching includes a lithography step, an etching step, and a resist removal step. These steps are repeated a plurality of times, and a fine semiconductor element is manufactured by overlapping a complicated pattern on the surface and in the vertical direction. In pattern superposition, a registration mark is formed on the wafer surface, and the pattern is superimposed using the front and rear registration marks in the lithography process.If the registration mark is damaged or changes in shape due to a process such as crystal growth, etc. Due to misalignment, direct pattern matching until the alignment accuracy meets the required specifications
It was necessary to perform a regenerating process in the lithography process (for example, by assembling the object). In particular, when the alignment accuracy of ± 0.5 μm is required, it is difficult to satisfy the design specifications, which causes a reduction in yield.

[0003]

SUMMARY OF THE INVENTION The present invention prevents a misalignment in a lithography process by introducing a process of forming a protective film such as an insulating film for an alignment mark in addition to a conventional manufacturing process. An object of the present invention is to reduce the reproduction rate and increase alignment accuracy in a lithography process. It is a further object of the present invention to manufacture a semiconductor optical device having a high yield and a design specification, and to provide a manufacturing method thereof.

[0004]

In order to achieve the above-mentioned object, the present inventors protect the alignment mark portion with a protective film such as an insulating film as shown in FIG. The influence of the crystal growth (embedded growth) and the etching can be avoided. As a result, the photoreproduction ratio is reduced to 0%, and the alignment accuracy of ± 0.5 μm is realized, and a semiconductor optical device centered on design specifications and a method of manufacturing the same are provided.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to embodiments.

Embodiment 1 In a BH type laser, formation of a stripe structure and burying growth technology are important for reducing the oscillation threshold current and stabilizing the transverse mode of the laser. FIG. 1 shows an example of a manufacturing process of an InP-based BH type laser as an example. To form a stripe structure, the uppermost layer is a cap layer, a u-InP layer (thickness
m) on a multi-layer wafer grown up to ~ 300 nm CVD oxide film (S
(referred to as an iO2 film) (FIG. 1A), and etched with BHF for 60 s using a resist as a mask to form a SiO2 mask for forming a mesa having a width of 5.05.0 μm (FIG. 1B). Organic cleaning of resist,
After peeling off with S502A, the layer is etched to a depth of 3 μm or more by wet or dry using Br / methanol as an etchant to form a mesa having an active layer width of 2.0 μm (FIG. 1C). Thereafter, in order to form a window structure, Fe-InP is buried in the mesa side by 6 μm or more by burying growth to form a BH structure (FIG. 1D). Along with this series of processes, the alignment mark portion goes through the same process. Stripe spacing ~ 500
μm, the pattern spacing in the alignment mark is ~
Since it is as narrow as 10 μm, abnormal growth occurs such as unevenness in buried growth after mesa etching, and alignment marks are damaged, so that alignment of ± 1 μm becomes difficult in subsequent steps. FIG. 2 is a cross-sectional view of the cross-shaped alignment mark after the buried growth, and FIG. 3 is a top view thereof. The minimum unit of the vernier next to the alignment mark is 1.0 μm.

Therefore, after forming the alignment mark of the crystal pattern, a new photo-etching step is provided to protect the alignment mark with a SiO2 film. FIG. 4 shows a flow chart of the manufacturing process of the cross-shaped alignment mark with the SiO2 protective film. Note that, since no process change is involved in the device portion in the wafer, the region other than the alignment mark portion is blackened out with a photomask, and is covered with a resist after development as shown in FIG. Hereinafter, the process for only the alignment mark portion will be described in detail. After forming ~ 300nm SiO2 film
(FIG. 4A), etching is performed by BHF for 60 s using the resist as a mask to form an alignment mark mask (FIG. 4B). After the resist is stripped, the underlying InP
The layer is selectively etched with an etchant of HCl: H3PO4 = 1: 4 for 30 s (FIG. 4C) to form alignment marks for the crystal pattern. After the entire surface of the SiO2 mask is removed by etching with BHF for 60 s, an SiO2 film of about 300 nm is formed on the entire surface of the wafer by a thermal CVD method as in the conventional process. Then use the resist as a mask
An alignment mark with a SiO2 protective film is formed (FIG. 4D). After removing the resist and performing mesa etching, burying growth of Fe-InP of 6.0 μm or more is performed (FIG. 4E). However, since the alignment mark portion is protected by the SiO2 film, Fe-InP is selectively grown. It does not grow on the alignment mark. Therefore, as shown in FIG. 6, the alignment mark remains in a normal state without being affected by crystal etching or multilayer growth.

According to the present embodiment, the photo reproduction rate can be reduced from 40% to 0% to 0%, and the alignment accuracy can be improved from ± 5.0 μm to ± 0.5 μm. .

In this embodiment, the alignment mark as shown in FIG. 6 has been described as an example of the alignment mark, but other alignment marks as shown in FIG. 7 (Micralign, SVG, USA)
(Used in Model), and does not limit the shape of the alignment mark.

Embodiment 2 Embodiment 2 is a case where an SiN film is used as a protective film. In this case as well, damage and deformation of the alignment mark can be prevented by a method substantially similar to that of the first embodiment.

Embodiment 3 Embodiment 3 is a case in which an insulating film such as SiO2 is used for the alignment mark in substantially the same manner as in Embodiment 1. In this case, by forming a SiN film that is different from the SiO2 film as a protective film, the alignment mark can be identified without being affected by multilayer growth or crystal etching (FIG. 8). It is also possible to use a SiN film for the alignment mark and a SiO2 film for the protective film in a similar manner.

Embodiment 4 By providing a registration pattern with a protective film in an optical element pattern, a registration mark can be formed by a method substantially similar to that of the first embodiment. FIG. 9 shows a diagram of a single optical element having a round alignment mark having a diameter of about 10 μm. This makes it possible to increase the alignment accuracy of a single element, and also allows lots to be output when defects occur partially in the wafer surface during the process or when photo alignment was impossible due to wafer cracking. Process can be continued without

Embodiment 5 Although Embodiment 1 is an example of a BH type laser formed by embedding Fe-InP, a pnp junction BH type laser in which 6 μm or more such as p-InP or n-InP is buried after forming a mesa is also used. Since the alignment mark is damaged after the embedding, the alignment mark can be prevented from being damaged or deformed by a method substantially similar to the alignment mark protective film forming process of the first embodiment. The material is InP
GaAs, InGaAsP, InGa
It can be applied to a semiconductor optical device including a process of embedding a mesa side surface using another material system such as P, GaAlAs, InGaAlP, and InGaAlAs, and has versatility.

[0014]

By using the manufacturing method according to the present invention, misalignment in the lithography process can be prevented, and the cost can be reduced from ST reduction by reducing the photo reproduction rate to 0%. In addition, since the alignment accuracy of ± 0.5 μm can be realized, the yield of the semiconductor optical device manufactured according to the present invention is dramatically improved by being close to the center of the design specification.

[Brief description of the drawings]

FIG. 1 is a manufacturing process flow chart of mesa formation of an InP-based BH laser showing a conventional example.

FIG. 2 is a cross-sectional view of a cross-shaped alignment mark after embedded growth showing a conventional example.

FIG. 3 is a top view of a cross-shaped alignment mark after embedded growth showing a conventional example.

FIG. 4 is a flow chart showing a manufacturing process of an alignment mark of a crystal pattern and an SiO2 protective film according to an embodiment of the present invention.

FIG. 5 shows φ50 m after a lithography step in a process of forming an alignment mark with a SiO 2 protective film according to an embodiment of the present invention.
It is a top view of m wafer.

FIG. 6 is a top view of a cross-shaped alignment mark with a SiO2 protective film showing one embodiment of the present invention.

FIG. 7 shows an alignment mark (US SVG) showing an embodiment of the present invention.
FIG.

FIG. 8 is a manufacturing process flow chart showing an example of the present invention, in which an SiO2 film and a SiN film are used as a combination of an alignment mark and a protective film.

FIG. 9 is a top view of a semiconductor optical device having a round alignment mark with a SiO2 protective film according to an embodiment of the present invention.

[Explanation of symbols]

1 ... SiO2 film, 2 ... u-InP layer, 3 ... p-InGaAs layer, 4 ... p-InP
Layer, 5 resist, 6 active layer, 7 n-InP layer, 8 Fe-In
P layer, 9: vernier, 10: 50 mm wafer, 11: alignment mark, 12: alignment mark on wafer side (Micralign, SVG, USA)
Model use), 13 ... Photomask alignment mark (US SVG
14 ... SiO2 film or SiN film, 1
5: SiN film or SiO2 film, 16: round alignment mark with protective film, 17: semiconductor optical element, 18: electrode.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Masahiko Kawata 216 Totsuka-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture F-term in the Communications Division, Hitachi, Ltd. 5F041 AA36 CA61 CA74 CA77 CB11 5F045 AB09 AB12 AB33 CA12 DB02 5F073 AA22 AA89 BA01 CA12 CB02 DA22 DA35

Claims (5)

[Claims] 1. A semiconductor optical device comprising: forming a alignment mark for lithography on a semiconductor crystal; and forming a protective film on the alignment mark in order to prevent deformation and damage of the alignment mark during a process. And its manufacturing method. 2. The semiconductor optical device according to claim 1, further comprising an insulating film as a protective film on the alignment mark of the crystal pattern formed by etching the semiconductor crystal, and a method of manufacturing the same. 3. The semiconductor optical device according to claim 1, further comprising a different type of transparent insulating film such as a SiO2 film and a SiN film as a combination of the alignment mark and the protective film, and a method of manufacturing the same. 4. A semiconductor optical device according to claim 1, wherein said optical device has a matching pattern. 5. A multi-layer structure is formed on a III-V compound substrate, and the multi-layer structure is etched in a stripe shape, and is manufactured by a manufacturing process including a step of embedding a mesa side surface with one or more semiconductor layers. Claims 1 to 1 characterized by the
5. The semiconductor optical device according to claim 4 and a method for manufacturing the same.