JP2001250875A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To raise the connection reliability of elements, simplify the process and contribute to reduction of the manufacturing cost. SOLUTION: The semiconductor device 10 comprises a mesh substrate 1, semiconductor element 14 mounted on one surface of the substrate 1, insulation film 17 formed as a protective film on the other surface of the substrate 11, and outer connection terminals 18 provided on the other surface of the substrate 11. The mesh substrate 11 comprises a support 12 of mesh-like woven insulative fibers F and a conductive part 13 for electrically connecting both surfaces through the gaps of the mesh of the support. Electrode terminals 15 of the semiconductor element 14 are connected to the outer connection terminals 18 through the conductive part 13 of the substrate 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a BGA (ball grid grid).
The present invention relates to a technique useful for improving the connection reliability of elements in a semiconductor device having a package structure such as an array.

[0002]

2. Description of the Related Art Conventionally, a wiring board provided as a semiconductor package includes, for example, an insulating resin substrate such as a polyimide resin or an epoxy resin, or a surface of a glass-epoxy resin substrate or a glass BT resin substrate. ) Is used. A semiconductor chip such as an LSI element is mounted on a substrate so as to be connected to the wiring pattern. External connection terminals such as solder bumps used for mounting the substrate on a motherboard or the like are provided on the surface of the wiring substrate opposite to the side on which the semiconductor chip is mounted. Therefore, in order to electrically connect the electrode terminals of the semiconductor chip to be mounted and the external connection terminals,
A through hole penetrating the wiring board is provided.

[0003] Such a semiconductor package (wiring board)
Is produced as one method, for example, as follows. First, a copper foil is adhered to the surface of the resin substrate via an adhesive, and a photosensitive resist is further applied thereon. Then, exposure and development are performed, and unnecessary portions of the copper foil are removed by etching to obtain a required pattern. Is formed, and then a through hole is formed at a necessary portion of the pattern portion by drilling or the like,
Metal plating is applied to the inner wall surface to make the front and back patterns conductive. Thereafter, solder bumps and the like are joined so as to conduct to the wiring pattern on one side of the wiring board. Further, a semiconductor chip is mounted so as to be connected to the wiring pattern on the other side of the wiring board to obtain a semiconductor device.

[0004]

As described above, the conventional semiconductor device has a problem that the copper foil (wiring pattern) adhered to the resin substrate is easily peeled off due to, for example, mechanical stress or thermal stress generated during circuit operation. was there. This lowers the connection reliability between the wiring pattern and the mounted element.

On the other hand, it is conceivable to strengthen the adhesive in order to prevent "peeling" of the wiring pattern. However, if this is done, the conductivity will be rather deteriorated, and eventually the connection reliability of the element will be reduced. become. In addition, the conduction of the front and back patterns is achieved by drilling (forming through holes) and plating the inner wall surface with metal plating. However, such work is extremely troublesome and requires a considerable amount of time. (That is, the manufacturing process becomes complicated).

[0006] Further, the drilling process by drilling or the like has a disadvantage that the production cost is increased. SUMMARY OF THE INVENTION The present invention has been made in view of the problems in the related art, and enhances the connection reliability of an element, simplifies a process, and contributes to reduction of a manufacturing cost, and a manufacturing method of the semiconductor device. The aim is to provide a method.

[0007]

According to a first aspect of the present invention, there is provided a support in which insulating fibers are knitted in a mesh shape. A mesh substrate provided with a conductive portion penetrating through the gap, a semiconductor element electrically connected to and mounted on the conductive portion on one surface of the mesh substrate, and the conductive portion on the other surface of the mesh substrate; A semiconductor device, comprising: an insulating film formed by exposing the insulating film; and an external connection terminal electrically connected to the conductive portion on the surface on which the insulating film is formed. You.

According to the semiconductor device of the first embodiment, a mesh substrate is used as a substrate on which a semiconductor element is mounted, and both surfaces are electrically connected to each other through a gap between meshes of a support formed by knitting insulating fibers into a mesh. A conductive portion (wiring pattern) is formed so as to conduct. In other words, since the conductive portion (wiring pattern) is formed so as to be entangled with the mesh, it is possible to eliminate the inconvenience that the wiring pattern is easily peeled off due to thermal stress or the like as in the related art. This makes it possible to enhance the connection reliability between the mounted semiconductor element and the conductive portion (wiring pattern).

Further, since the electrical conduction between the front and back patterns is ensured by the conductive portions (wiring patterns), it is not necessary to perform a boring process (formation of through holes) in the wiring board as in the prior art. . As a result, the process can be simplified, and it is possible to contribute to a reduction in manufacturing cost. According to the second aspect of the present invention, the conductive member for the semiconductor element penetrating through the gap of the mesh and the conductive member for the semiconductor element are electrically connected to the support made of the insulating fibers woven in a mesh shape. And a mesh substrate on which a conductive portion for external connection terminals penetrating through the gap of the mesh is formed, and both surfaces of the mesh substrate are electrically connected to each other via the conductive portion for the semiconductor element. A mounted semiconductor element, an insulating film formed by exposing the mounting portion of the semiconductor element and the conductive portion for the external connection terminal on both surfaces of the mesh substrate, and at least one surface on which the insulating film is formed And an external connection terminal electrically connected to the conductive portion for an external connection terminal.

According to the semiconductor device of the second embodiment, in addition to the advantages obtained by the semiconductor device of the first embodiment, since the semiconductor elements are mounted on both sides of the mesh substrate, the height of the semiconductor device is increased. Functionalization can be achieved. Furthermore, according to another aspect of the present invention, the first
And a method for manufacturing a semiconductor device according to the second embodiment.

A manufacturing method according to a first embodiment is a step of forming a mesh substrate by forming a conductive portion penetrating through a gap between the meshes on a support formed by knitting insulating fibers in a mesh shape. Forming a dielectric film on the first surface of the mesh substrate by exposing the conductive portion;
Attaching an anisotropic conductive film to the second surface of the mesh substrate so as to cover the conductive portion, and aligning the semiconductor element such that an electrode terminal of the semiconductor element corresponds to the conductive portion. Heating and pressurizing to electrically connect an electrode terminal of the semiconductor element to the conductive portion via the anisotropic conductive film; and the conductive portion exposed from a surface on which the insulating film is formed. Forming an external connection terminal electrically connected to the conductive portion.

[0012] Further, the manufacturing method according to the second embodiment is characterized in that a support formed by knitting insulating fibers in a mesh shape is provided.
Manufacturing a mesh substrate by forming a conductive portion for a semiconductor element penetrating through the gap of the mesh and a conductive portion for an external connection terminal electrically connected to the conductive portion for the semiconductor element and penetrating through the gap of the mesh; Forming an insulating film by exposing the semiconductor element mounting portion and the external connection terminal conductive portion on both surfaces of the mesh substrate; and forming the semiconductor element conductive portion on one surface of the mesh substrate. Attaching an anisotropic conductive film so as to cover the semiconductor element and aligning the semiconductor element so that the electrode terminal of the first semiconductor element and the conductive part for the semiconductor element correspond to each other;
An anisotropic conductive film is attached to the other surface of the mesh substrate so as to cover the conductive portion for the semiconductor element, and the electrode terminal of the second semiconductor element and the conductive portion for the semiconductor element correspond to each other. A step of aligning the semiconductor element, and applying heat and pressure to electrically connect the electrode terminals of the first and second semiconductor elements to the conductive portion for the semiconductor element via the corresponding anisotropic conductive films. And connecting the external connection terminal electrically connected to the external connection terminal conductive portion to the external connection terminal conductive portion exposed from the insulating film on at least one surface of the mesh substrate. And forming.

[0013]

FIG. 1 schematically shows the structure of a semiconductor device according to a first embodiment of the present invention. The semiconductor device 10 according to the present embodiment basically includes a mesh substrate 11 provided as a semiconductor package, a semiconductor element (chip) 14 mounted on one surface of the mesh substrate 11, and a mesh substrate 11. It is provided with an insulating film 17 as a protective film formed on the other surface, and a solder bump 18 as an external connection terminal provided on the other surface side of the mesh substrate 11.

The mesh substrate 11 is a sheet-like support 1
2 and a plurality of conductive portions or conductive patterns (also referred to as “pads”) 13 for electrically connecting both surfaces of the support. As shown schematically in FIG. 1B, the sheet-shaped support 12 is formed by knitting insulating fibers F in a mesh shape (in the illustrated example, in a direction perpendicular to the paper surface). ing. The conductive portion (pad) 13 is formed so that both the front and back surfaces are electrically conductive through the gap of the mesh of the support 12. As the insulating fibers constituting the support 12, for example, chemical fibers such as a liquid crystal polymer and Teflon (registered trademark) are used. As a material of the conductive portion (pad) 13, copper (Cu) is typically used.

The semiconductor chip 14 is flip-chip mounted on one surface of the mesh substrate 11 such that the electrode terminals 15 are electrically connected to the conductive portions (pads) 13. As the flip-chip mounting, ACF mounting using an anisotropic conductive film (ACF) 16 is performed. As the electrode terminal 15 of the semiconductor chip 14, for example, a gold (Au) bump is used. Further, as the ACF 16, for example, a thermosetting resin such as an epoxy resin containing conductive particles such as a silver (Ag) filler is used.

In the present embodiment, the thickness of the semiconductor device 10 is reduced by employing the sheet-like mesh substrate 11, but in order to further promote the reduction in thickness, the thickness of the semiconductor chip 14 to be mounted is also reduced. Use as thin a material as possible. With current technology, 50μ
A semiconductor chip having a thickness of about m to 100 μm is provided, and it is technically sufficiently possible to mount the semiconductor chip having such a thickness on the mesh substrate 11 of the present embodiment. In consideration of this, in the present embodiment, the semiconductor chip 1
As 4, a thin one having a thickness of about 50 μm is used.

Further, the insulating film 17 is formed on the other surface of the mesh substrate 11 so as to cover a portion other than the conductive portion (pad) 13, that is, to have an opening in a portion corresponding to the conductive portion (pad) 13. Is formed. The conductive portion (pad) 1 exposed from the opening of the insulating film 17
A solder bump (external connection terminal) 18 is provided so as to be electrically connected to 3. The solder bumps (external connection terminals) 18 are used for mounting the device 10 on a mounting board such as a motherboard.

Hereinafter, a method of manufacturing the semiconductor device 10 of the present embodiment will be described with reference to FIGS. In the first step (Fig. 2
(A)), a mesh substrate 1 which is a feature of the present invention.
Prepare 1 In other words, as schematically shown in FIG. 1B, a conductive portion (a conductive member) is formed on a support 12 formed by knitting an insulating fiber F in a mesh shape so that both surfaces are electrically connected to each other through a gap of the mesh. The mesh substrate 11 is obtained by forming the pad 13. The thickness of the mesh substrate 11 is selected to be about 40 μm.

Each conductive portion (pad) 13 can be formed by using, for example, a full additive method or a semi-additive method. These methods are not specifically shown because they are well-known conductor pattern forming methods to those skilled in the art.
For example, the following method can be used. As one method, a photosensitive plating resist is applied to the surface of the support 12, and further, exposure and development (patterning of a plating resist layer) are performed so as to follow a required conductor pattern (pad) shape. After forming an opening in the corresponding portion of the plating resist layer, electroless plating of Cu is grown only in the opening, thereby forming a conductive portion (pad) 13.

As another method, the surface of the support 12 is
u was subjected to electroless plating to form a metal thin film, a photosensitive plating resist was further applied thereon, and the plating resist layer was patterned, and an opening was formed in a portion of the plating resist layer corresponding to the pad. Thereafter, a conductive portion (pad) 13 is formed by growing Cu electrolytic plating on the opening using the metal thin film as a plating power supply layer. After the electrolytic plating, the metal thin film is removed.

In the next step (see FIG. 2B), an insulating film 17 as a protective film is formed on the mesh substrate 11 (on the side to which the external connection terminals 18 are finally joined) by patterning. In the present embodiment, a photosensitive solder resist is used as a material forming the insulating film 17. That is, a photosensitive solder resist is applied to one surface of the mesh substrate 11, and further, exposure and development (patterning of the solder resist layer) are performed so as to conform to the shape of the conductive portion (pad) 13. An opening is formed in a portion of the solder resist layer corresponding to the above. As a result, a conductive portion (pad) is formed on one surface of the mesh substrate 11.
13 is exposed, and a portion other than the conductive portion (pad) 13 is covered with the solder resist layer (protective film) 17. The thickness of the solder resist layer (protective film) 17 is selected to be about 10 μm.

In the next step (see FIG. 2C), the mesh substrate 11 on which the solder resist layer 17 has been formed is placed on the suction jig 20 with the side on which the solder resist layer 17 is formed facing down. After the holding, an anisotropic conductive film (ACF) 16 serving as an adhesive is attached on the mesh substrate 11 (on the side opposite to the side on which the solder resist layer 17 is formed). However, at this stage, the ACF 16 is in an uncured state.

In the next step (see FIG. 3A), the ACF
The semiconductor chip 14 is arranged on the semiconductor substrate 16, and the electrode terminals (for example, Au bumps) 15 are appropriately aligned so as to correspond to the positions of the conductive portions (pads) 13 on the mesh substrate 11. As described above, the thin semiconductor chip 14 having a thickness of about 50 μm is used, and the electrode terminal 15 having a diameter of about 30 μm is used.

In the next step (see FIG. 3B), the mesh substrate 11 and the semiconductor chip 14 which have been aligned
About 200 ° C. using a heating and pressing jig 21
, And pressurize as shown by the arrow in the figure. As a result, the ACF 16 as an adhesive is cured, and the semiconductor chip 14 is electrically connected to the mesh substrate 11 via the ACF 16 (mounting of the semiconductor chip 14).

Thereafter, the mesh substrate 11 on which the semiconductor chip 14 is mounted and the solder resist layer 17 is formed is once removed from the jigs 20 and 21, and the mesh substrate 11 is turned upside down (ie, the semiconductor chip 14 with the side on which 14 is mounted)
And hold again. In the last step (see FIG. 3C),
Solder bumps (external connection terminals) are formed on the surface of the mesh substrate 11 on the side where the solder resist layer 17 is formed so as to be electrically connected to the exposed conductive portions (pads) 13.
18 are formed. The diameter of the solder bump 18 is 150μ.
m.

That is, a solder ball having a diameter of about 150 μm is arranged in an opening formed in the solder resist layer 17 and joined by reflow. As a result, the solder ball fills the opening and conducts to the conductive portion (pad) 13, and a ball-shaped solder bump (external connection terminal) 18 is formed below the solder resist layer 17. Thereafter, the completed component (semiconductor device 10) is removed from the jig 20 for suction.

As described above, according to the semiconductor device 10 and the method of manufacturing the same according to the present embodiment, the mesh substrate 11 is used as the substrate on which the semiconductor chip 14 is mounted, and the insulating fibers F are knitted into a mesh. A conductive portion (pad) 13, that is, a wiring pattern is formed so that both surfaces are electrically connected to each other through a gap of the mesh of the support 12.

That is, since the conductive portion (pad) 13 is formed so as to be entangled with the mesh, it is possible to solve the inconvenience (the problem that the wiring pattern is easily peeled off due to thermal stress or the like) as seen in the prior art. it can. This contributes to improving the connection reliability between the semiconductor chip 14 and the conductive portion (pad) 13. Further, the electrical continuity of the patterns on both sides of the mesh substrate 11 is determined by a conductive portion (pad).
13, it is possible to eliminate the necessity of a drilling process for forming a through hole as in the prior art. This contributes to simplifying the manufacturing process and reducing the manufacturing cost.

FIG. 4 schematically shows a configuration of a semiconductor device according to a second embodiment of the present invention. In the first embodiment, the semiconductor chip 1 is provided only on one side of the mesh substrate 11.
4 has been described (see FIG. 1), but the second embodiment is characterized in that the semiconductor chips 34a and 34b are mounted on both surfaces of the mesh substrate 31.

Hereinafter, a method of manufacturing the semiconductor device 30 of the present embodiment will be described with reference to FIGS. In the first step (FIG. 5
(See FIG. 2A), and a mesh substrate 31 is prepared in the same manner as the process performed in the step of FIG. However, in the present embodiment, two types of pads, that is, a pad (chip pad) 33a for connecting the semiconductor chips 34a and 34b as a conductive portion for electrically connecting both surfaces of the support 32 of the mesh substrate 31 and an external portion are provided. A pad (pad for external connection terminal) 33b for connecting the connection terminal 38 is formed. At this time, although not specifically shown, the chip pad 33a and the external connection terminal pad 33b are formed so as to be electrically connected to each other by a conductive pattern.

In the next step (see FIG. 5B), FIG.
Similarly to the processing performed in the step (b), insulating films (solder resist layers) 37a and 37b as protective films are formed on both surfaces of the mesh substrate 31, respectively. However, in the present embodiment, each of the solder resist layers 37a and 37b is provided with the semiconductor chips 34a and 34b on both sides of the mesh substrate 31.
Is formed so as to cover other portions except for the external connection terminal pad 33b formed in the surrounding area.

In the next step (see FIG. 5C), FIG.
In the same manner as the process performed in the step (c), the mesh substrate 3 having the solder resist layers 37a and 37b formed on both surfaces is formed.
The semiconductor chip 34a is mounted on the mesh substrate 31 after one side of the semiconductor chip 1 is held down (in the illustrated example, the side on which the solder resist layer 37b is formed is down) with the jig 40 for suction. Part (that is, the chip pad 33a)
(A region including) is attached to an anisotropic conductive film (ACF) 36a serving as an adhesive. However, at this stage,
The ACF 36a is in an uncured state.

In the next step (see FIG. 5D), FIG.
In the same manner as in the process performed in the step (a), the ACF 36a
The semiconductor chip 34a is disposed on the semiconductor chip 34, and the electrode terminals 35a made of, for example, Au bumps are appropriately aligned so as to correspond to the positions of the chip pads 33a. In the next step (see FIG. 6 (a)), the same processing as the processing performed in the steps of FIGS. 5 (c) and 5 (d) is performed on the other surface (the solder resist layer 37b) of the mesh substrate 31. Side).

That is, the mesh substrate 31 is once removed from the jig 40 in a state where the semiconductor chip 34a that has been aligned in the step of FIG.
After the mesh substrate 31 is turned upside down (that is, the side on which the semiconductor chip 34a is disposed downward) and held again by the jig 40, the ACF 36b (uncured state) is attached, and the semiconductor chip is placed on the ACF 36b. 34b,
The electrode terminals 35b are aligned with the chip pads 33a.

At this time, the upper semiconductor chip 34b and the lower semiconductor chip 34a are positioned so as to overlap each other when viewed in a plan view with the mesh substrate 31 interposed therebetween.
In the next step (see FIG. 6B), the semiconductor chips 34a and 34b and the mesh substrate 31 that have been aligned are heated and heated in the same manner as the processing performed in the step of FIG. 3B. Using a pressing jig 41, heating is performed at a temperature of about 200 ° C. and pressing is performed as indicated by arrows in the figure. Thus, the ACFs 36a, 36a on both sides of the mesh substrate 31
6b is cured, and the semiconductor chips 34a and 34b are electrically connected to the mesh substrate 31 via the ACF (mounting of the semiconductor chips 34a and 34b).

Thereafter, the semiconductor chips 34a and 34b are mounted and the solder resist layers (protective films) 37a and 37b
The mesh substrate 31 on which is formed is removed from the heating / pressing jig 41 while being held by the suction jig 40. In the last step (see FIG. 6C), the exposed surface of the mesh substrate 31 on the side where the solder resist layer 37b is formed is similar to the processing performed in the step of FIG. 3C. The solder bump 38 is formed so as to be electrically connected to the external connection terminal pad 33b. Thereafter, the completed structure (semiconductor device 30) is removed from the suction jig 40.

Also in the present embodiment, the same effects (improvement of element connection reliability, simplification of process, and reduction of manufacturing cost) as in the first embodiment can be obtained. Further, according to the present embodiment, since the semiconductor chips 34a and 34b are mounted on both surfaces of the mesh substrate 31, the first
The function as the semiconductor device 30 can be enhanced as compared with the semiconductor device 10 according to the embodiment.

Further, according to the present embodiment, the solder bumps (external connection terminals) 38 are formed on the mesh substrate 31 except for the portion where the semiconductor chips 34a and 34b are mounted.
Are formed, so that two or more semiconductor devices 30 can be stacked in multiple stages via the external connection terminals 38 as necessary. One example is shown in FIG. The illustrated example shows a configuration in which two semiconductor devices 30 are stacked.

With such a structure that can be connected in multiple stages, it is possible to further enhance the functions. Although not specifically illustrated, as a modification of the configuration example illustrated in FIG. 7, a semiconductor device in which a semiconductor chip is mounted on only one surface thereof can be stacked in multiple stages. This form is effective when it is desired to keep the stack height low.

In the manufacturing method according to the second embodiment (see the step of FIG. 6A), the upper semiconductor chip 34b and the lower semiconductor chip 34a with the mesh substrate 32 interposed therebetween.
Are aligned so as to overlap each other (that is, they are connected so as to share the same chip pad 33a). However, depending on the design of the semiconductor chip, such alignment is not always performed. Not necessarily.

For example, as shown in a plan view of FIG. 8, an embodiment in which the upper semiconductor chip 34b and the lower semiconductor chip 34a are mounted with their positions shifted from each other is also conceivable. 35a and 35b are each chip 34
The electrode terminals a and 34b are schematically shown. In the above embodiments, each semiconductor chip (14, 34a, 34)
As a method for connecting b) to the mesh substrate (11, 31), the case where flip-chip mounting by ACF (16, 36a, 36b) is performed has been described, but the form of flip-chip mounting is not limited to this. It is.

For example, it is also possible to carry out flip chip mounting using solder bumps. However, in this case, the chip pads 3 are also provided on the chip mounting surface side of the mesh substrate.
Except for the portion 3a, it is necessary to apply a solder resist.

[0043]

As described above, according to the present invention, the connection reliability of the mounted element can be improved,
It is possible to simplify the manufacturing process and reduce the manufacturing cost.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view (part 1) illustrating the method for manufacturing the semiconductor device of FIG. 1;

FIG. 3 is a sectional view (part 2) illustrating the method for manufacturing the semiconductor device of FIG. 1;

FIG. 4 is a cross-sectional view illustrating a configuration of a semiconductor device according to a second embodiment of the present invention.

FIG. 5 is a sectional view (part 1) illustrating the method for manufacturing the semiconductor device of FIG. 4;

FIG. 6 is a sectional view (part 2) illustrating the method for manufacturing the semiconductor device of FIG. 4;

FIG. 7 is a cross-sectional view showing an example of a configuration when the semiconductor devices of FIG. 4 are stacked.

FIG. 8 is an explanatory diagram of a modified example of the process performed in the step of FIG.

[Description of Signs] 10, 30: Semiconductor device 11, 31, Mesh substrate 12, 32: Sheet-like support 13, 33a, 33b: Conductive portion (pad) 14, 34a, 34b: Semiconductor element (chip) 15, 35a, 35b ... electrode terminals (gold bumps) 16, 36a, 36b ... anisotropic conductive films (ACF) 17, 37a, 37b ... insulating films (solder resist layers) 18, 38 ... external connection terminals (solder bumps or gold bumps) 20, 21, 40, 41: Jig (for suction, heating / pressing) F: Insulating fiber

Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat II (reference) H01L 25/18

Claims (5)

[Claims] 1. A mesh substrate in which a conductive portion penetrating through a gap of the mesh is formed on a support formed by knitting an insulating fiber in a mesh shape; and a conductive portion on one surface of the mesh substrate. A semiconductor element electrically connected and mounted; an insulating film formed by exposing the conductive portion on the other surface of the mesh substrate; and an electrically conductive film on the conductive portion on the surface on which the insulating film is formed. And an external connection terminal connected to the semiconductor device. 2. A step of forming a conductive portion penetrating through a gap between the meshes on a support formed by knitting an insulating fiber into a mesh shape to form a mesh substrate; Forming an insulating film by exposing the conductive portion on the surface of the mesh substrate; and bonding an anisotropic conductive film on the second surface of the mesh substrate so as to cover the conductive portion; And positioning the semiconductor element so that the semiconductor element corresponds to the conductive part. By heating and pressing, the electrode terminal of the semiconductor element is electrically connected to the conductive part via the anisotropic conductive film. Connecting, to the conductive portion exposed from the surface on which the insulating film is formed,
Forming an external connection terminal electrically connected to the conductive portion. 3. A conductive member for a semiconductor element penetrating through a gap of the mesh on a support formed by knitting an insulating fiber into a mesh, and electrically connected to the conductive member for the semiconductor element and the mesh. A mesh substrate on which a conductive portion for an external connection terminal that penetrates through the gap is formed; a semiconductor element electrically connected to and mounted on both surfaces of the mesh substrate via the conductive portion for a semiconductor element; An insulating film formed by exposing the semiconductor element mounting portions and the external connection terminal conductive portions on both surfaces of the mesh substrate; and the external connection terminal conductive portions on at least one surface on which the insulating film is formed. And an external connection terminal electrically connected to the semiconductor device. 4. A semiconductor device comprising a plurality of the semiconductor devices according to claim 3, wherein each of the semiconductor devices is electrically connected to one another via the external connection terminal and stacked. 5. A conductive member for a semiconductor element penetrating through a gap of the mesh on a support formed by knitting an insulating fiber into a mesh, and electrically connected to the conductive member for a semiconductor element. Forming a conductive portion for an external connection terminal penetrating through the gap of the mesh to produce a mesh substrate; and exposing and insulating the mounting portion of the semiconductor element and the conductive portion for the external connection terminal on both surfaces of the mesh substrate. Forming a film; attaching an anisotropic conductive film to one surface of the mesh substrate so as to cover the semiconductor element conductive portion; and forming an electrode terminal of a first semiconductor element and the semiconductor element conductive portion. A step of aligning the semiconductor element so as to correspond to the step of: bonding an anisotropic conductive film to the other surface of the mesh substrate so as to cover the conductive part for the semiconductor element; Positioning the semiconductor element so that the electrode terminal of the semiconductor element and the conductive portion for the semiconductor element correspond to each other; and heating and pressing to correspond the electrode terminals of the first and second semiconductor elements, respectively. Electrically connecting to the conductive portion for the semiconductor element via the anisotropic conductive film; and the conductive portion for the external connection terminal exposed from the insulating film on at least one surface of the mesh substrate. Forming an external connection terminal electrically connected to the conductive portion for an external connection terminal.