JP2001237543A - Printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing multilayered printed wiring board by which the surface of an interlayer insulating resin layer can be flattened even when the conductor circuits of an internal layer have uneven surfaces. SOLUTION: This method for manufacturing printed wiring board includes a step (1) of forming the interlayer insulating resin layer 2 on the conductor circuits 5 of a substrate 1, a step (2) of flattening the surface of the resin layer by heating and pressing the resin layer, and a step (3) of forming conductor circuits on the flattened interlayer insulating resin layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer printed wiring board, and more particularly to a method for advantageously preventing surface irregularities of an interlayer resin insulating layer due to surface irregularities of a conductor circuit formed by a semi-additive method. It is a proposal about.

[0002]

2. Description of the Related Art In recent years, so-called build-up multilayer wiring boards have been receiving attention due to a demand for higher density of the multilayer wiring boards. This build-up multilayer wiring board is manufactured by a method disclosed in, for example, Japanese Patent Publication No. 4-55555. That is, on the core substrate, an interlayer resin insulating agent made of a photosensitive electroless plating adhesive is applied, dried and exposed and developed to form an interlayer resin insulating layer having an opening for a via hole. Then, after the surface of the interlayer resin insulating layer is roughened by a treatment with an oxidizing agent or the like, a plating resist obtained by exposing and developing a photosensitive resin layer on the roughened surface is provided. By performing electroless plating on the portion to form a conductive circuit pattern including via holes and repeating such a process a plurality of times, a multilayered build-up wiring board can be obtained.

The build-up multilayer wiring board manufactured by such a method has poor adhesion at the interface between the plating resist and the conductor circuit. Therefore, when this type of build-up multilayer wiring board is mounted with an IC chip or the like, cracks originating at the interface between the plating resist and the conductor circuit are generated in the interlayer resin insulation layer due to a difference in thermal expansion coefficient between the plating resist and the conductor circuit. There was a problem of doing.

On the other hand, as a technique capable of solving the above-mentioned problem, a method of improving the adhesion to an interlayer resin insulating layer formed on a conductor circuit by roughening at least a side surface of the conductor circuit has been proposed. There is. In order to apply this method to the manufacture of the build-up multilayer wiring board, it is necessary to remove the plating resist prior to the roughening treatment of the conductor circuit. Therefore, as a method of manufacturing a build-up multilayer wiring board capable of solving the above problem by removing the plating resist, a semi-additive method is exemplified.

In this semi-additive method, first, a roughened surface is provided on the surface of an interlayer resin insulating layer, electroless plating is thinly applied on the entire roughened surface, and then a non-conductive portion of the electroless plated film is plated. This is a method of forming a conductive circuit pattern by forming a resist, applying a thick electrolytic plating to a portion where the resist is not formed, and removing the plating resist and an electroless plating film under the plating resist.

[0006] Therefore, the conductor circuit formed by the semi-additive method in this manner is improved in adhesion to an interlayer resin insulating layer formed on the conductor circuit by roughening at least the side surface.

[0007]

However, the surface of the conductor circuit formed by the semi-additive method is uneven because no plating resist exists between the conductor circuits. Therefore, when an interlayer resin insulating layer is further formed on the layer of the conductor circuit, irregularities due to the surface irregularities of the conductor circuit occur on the surface of the interlayer resin insulating layer. As a result, when a multilayer wiring board is manufactured by the semi-additive method, the formation of via hole forming openings due to exposure and development or the mounting failure of an IC chip or the like is caused due to the surface unevenness of the conductor circuit. There were other problems. In addition, in the semi-additive method, since the interlayer resin flows between the conductive circuits, the interlayer resin insulating layer tends to be thinner as a whole. On the other hand, when the interlayer resin insulating layer is exposed and developed, the surface layer becomes a developing solution. Melted into
There is a problem that the interlayer resin insulating layer becomes thin (so-called film reduction). Furthermore, in the semi-additive method, of the electroless plating films formed on the entire roughened surface, it is necessary to remove the electroless plating films that do not constitute a conductor by etching.
Therefore, if the anchor on the roughened surface is too deep, the electroless plating film cannot be completely removed by etching, so the anchor depth on the roughened surface must be as shallow as about 1 to 5 μm. However, on such a roughened surface having a small anchor depth, there is a problem that the adhesion strength (peel strength) between the conductor circuit and the interlayer resin insulating layer is reduced.

[0008] The present invention proposes a technique for solving the above-mentioned problems of the prior art. That is, a main object of the present invention is to propose a method for manufacturing a multilayer printed wiring board that can flatten the surface of an interlayer resin insulating layer even when surface conductors are present in inner layer conductive circuits.
Another object of the present invention is to solve the problem of so-called film reduction of a photosensitive interlayer resin insulating material, and to obtain a multilayer printed wiring capable of obtaining a practical peel strength even on a roughened surface having a small anchor depth. It is to propose a method of manufacturing a plate.

[0009]

Means for Solving the Problems The present inventors have made intensive studies to realize the above object. As a result, the unevenness of the interlayer resin insulation layer can be flattened by pressing before the resin is cured, and the cause of film reduction and peel strength reduction on the roughened surface with a small anchor depth is the photosensitive interlayer resin insulation. It has been found that when the layer is exposed and cured by a photopolymerization reaction, the resin polymerization reaction on the surface is inhibited by oxygen in the air. The present invention has been completed based on such findings, and the gist configuration thereof is as follows. (1) In manufacturing a multilayer printed wiring board, at least the following steps (1) to (3): Forming an interlayer resin insulation layer by applying an uncured interlayer resin insulation agent on the conductor circuit of the substrate; Heating the interlayer resin insulation layer to flatten its surface; Forming a conductive circuit on the flattened interlayer resin insulating layer.

In the method of the present invention described in the above (1), as the interlayer resin insulating agent, the acid or oxidizing agent is dissolved in an uncured heat-resistant resin matrix which becomes hardly soluble in an acid or oxidizing agent by a curing treatment. It is desirable to use an adhesive for electroless plating in which heat-resistant resin particles that have been cured are dispersed.

In the method of the present invention described in the above (1), when forming a conductive circuit on the interlayer resin insulating layer,
First, a non-conductive portion was formed by arranging a plating resist on an electroless plating film provided on the entire surface of the roughened interlayer resin insulating layer, and a conductor was formed by electroplating other than the non-conductive portion. Thereafter, it is desirable to remove the plating resist and the electroless plating film under the plating resist to obtain a conductor circuit including two layers of an electroless plating film and an electrolytic plating film.

(2) In manufacturing a multilayer printed wiring board, at least the following steps (1) to (3): Forming an interlayer resin insulation layer by applying an uncured and photosensitive interlayer resin insulation agent on the conductor circuit of the substrate; Heating the interlayer resin insulation layer to flatten its surface; Exposure and development of the planarized interlayer resin insulation layer,
Providing an opening for forming a via hole; Forming a conductive circuit and a via hole in an interlayer resin insulating layer having an opening.

In the method of the present invention described in the above (2), an uncured and photosensitive heat-resistant resin matrix which becomes hardly soluble in an acid or an oxidizing agent by curing treatment is used as a photosensitive interlayer resin insulating agent. It is desirable to use an adhesive for electroless plating in which hardened heat-resistant resin particles soluble in an acid or an oxidizing agent are dispersed.

In the method of the present invention described in the above (2), when forming the conductor circuit and the via hole in the interlayer resin insulating layer, first, the electroless plating provided on the entire surface of the roughened interlayer resin insulating layer is performed. A plating resist is disposed on the film to form a non-conductive portion, and after the non-conductive portion is subjected to electrolytic plating to form a conductor, the plating resist and the electroless plating film under the plating resist are removed. By removing, 2 of electroless plating film and electrolytic plating film
It is desirable to obtain conductor circuits and via holes consisting of layers.

Further, in the method of the present invention described in the above (1) and (2), prior to applying the interlayer resin insulating agent on the conductive circuit of the substrate, the surface including at least the side surface of the conductive circuit is roughened. It is desirable to do. In the method of the present invention described in the above (1) and (2), it is preferable that the hot pressing of the interlayer resin insulating layer is performed by pressing a metal plate or a metal roll while heating the interlayer resin insulating layer.

[0016]

DESCRIPTION OF THE PREFERRED EMBODIMENTS As described above, the surface of a conductor circuit formed by the semi-additive method has irregularities because no plating resist exists between the conductor circuits. When an uncured interlayer resin insulating agent is applied to the uneven surface by a roll coater or the like, the formed interlayer resin insulating layer also has surface unevenness. For example, as shown in FIG. 23, the interlayer resin insulating layer formed in a region where the area of the conductor circuit is large is
The interlayer resin insulating layer formed in a region having a relatively large thickness and a small conductor circuit area (conductor circuit pattern region) has a small thickness because the interlayer resin insulating agent enters between the patterns. As described above, since the thickness of the interlayer resin insulating layer changes due to the surface unevenness of the inner-layer conductor circuit, unevenness occurs on the surface.

In this respect, the method of the present invention comprises forming an uncured interlayer resin insulation layer on a conductor circuit of a substrate, and then heating and pressing the interlayer resin insulation layer with a metal plate or a metal roll to form a surface of the interlayer resin insulation layer. The feature is that it is flattened. Thus, the interlayer resin insulating layer formed on the conductor circuit of the substrate does not have surface irregularities. In addition, the surface irregularities of the conductor circuit (that is, the difference in the thickness of the interlayer resin insulating layer) causes the formation of the opening for forming the via hole due to the exposure and development, or the mounting failure of the IC chip or the like. Nor.

Further, in the present invention, since the light-transmitting film is attached to the interlayer resin insulating layer and exposed and cured, the inhibition of the curing reaction by oxygen is prevented. The decrease in peel strength can be prevented, and even if the surface is roughened to form a shallow roughened layer, the peel strength does not decrease.

Next, a method for manufacturing a printed wiring board according to the present invention will be specifically described by taking a semi-additive method as an example. (1) First, a wiring board having a conductor circuit formed on the surface of the board is manufactured. The conductor circuit of this wiring board is formed by etching a copper-clad laminate, or by forming an adhesive layer for electroless plating on a substrate such as a glass epoxy substrate, a polyimide substrate, a ceramic substrate, or a metal substrate, and bonding the substrate. The surface of the agent layer is roughened to a roughened surface, and a method of applying electroless plating thereto or a so-called semi-additive method (electroless plating is performed on the entire roughened surface to form a plating resist,
After the electroplating is performed on the portion where the plating resist is not formed, the plating resist is removed, and an etching process is performed to form a conductor circuit including an electroplating film and an electroless plating film.

The conductor circuit of the wiring board is formed by forming a roughened layer made of copper-nickel-phosphorus on a surface including a side surface, thereby forming a roughened layer made of copper-nickel-phosphorus with an interlayer resin insulating layer formed on the conductor circuit. Adhesion can be improved. This roughened layer is desirably formed by electroless plating. The composition of the electroless plating solution was such that the copper ion concentration, nickel ion concentration, and hypophosphite ion concentration were 2.2 × 10
^-2 to 4.1 × 10 ^-2 mol / l, 2.2 × 10 ^-3 to 4.1 × 10 ^-3 mol
/ L, 0.20 to 0.25 mol / l. This is because the film deposited in this range has a needle-like crystal structure and is excellent in anchor effect. In addition, you may add a complexing agent and an additive in addition to the said compound to an electroless plating bath. Other methods of forming the roughened layer include a method of forming (oxidizing (blackening) and reducing) or etching the surface of the conductor circuit.

The roughened layer may be covered with a layer of a metal or a noble metal whose ionization tendency is larger than copper and equal to or less than titanium. This is because these metal or noble metal layers cover the roughened layer and can prevent the conductor circuit from dissolving due to a local electrode reaction that occurs when the interlayer resin insulating layer is roughened. The thickness of the layer is preferably 0.1 to 2 μm. Examples of such a metal include at least one selected from titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead, and bismuth. Noble metals include gold, silver, platinum and palladium. Of these, tin is particularly preferred. Tin is advantageous because it can form a thin layer by electroless displacement plating and can follow the roughened layer. In the case of tin, tin borofluoride-thiourea or tin chloride-thiourea liquid is used. Then, a Sn layer having a thickness of about 0.1 to 2 μm is formed by the substitution reaction of Cu—Sn. In the case of a noble metal, a method such as sputtering or vapor deposition can be adopted.

Further, a through hole is formed in the core substrate, and the wiring layer on the front surface and the back surface can be electrically connected through the through hole. Further, a low-viscosity resin such as a bisphenol F-type epoxy resin may be filled between the through-holes and the conductor circuit of the core board to ensure the smoothness of the wiring board.

(2) Next, an interlayer resin insulating agent is applied on the wiring board prepared in the above (1). In particular, in the present invention, it is desirable that the interlayer resin insulating agent is photosensitive. This is because a via hole opening can be provided by exposure and development processing. As an interlayer resin insulating material, electroless plating in which cured heat-resistant resin particles soluble in acid or oxidant are dispersed in an uncured heat-resistant resin matrix that becomes hardly soluble in acid or oxidant by curing treatment It is desirable to use a bonding adhesive. The reason for this is that by treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.

Here, as the heat-resistant resin matrix constituting the adhesive for electroless plating, a composite of a thermosetting resin (including one in which a part of the thermosetting group is sensitized) and a thermoplastic resin is used. Can be used. As the thermosetting resin, an epoxy resin, a phenol resin, a polyimide resin, or the like can be used. In the case of photosensitization, a thermosetting group of a thermosetting resin is reacted with methacrylic acid, acrylic acid, or the like to acrylate. Particularly, acrylate of epoxy resin is most suitable. Polyethersulfone, polysulfone, or the like can be used as the thermoplastic resin.

As the heat-resistant resin particles constituting the adhesive for electroless plating, amino resins (melamine resins, urea resins, guanamine resins, etc.), epoxy resins, bismaleimide triazine resins and the like can be used.

The heat-resistant resin particles are preferably a mixture of coarse particles having a large average particle diameter and fine particles having a small average particle diameter. This is because when the heat-resistant resin particles having different average particle diameters are dissolved and removed with an acid or an oxidizing agent, a complicated anchor shape can be realized. The heat resistant resin particles have an average particle size of 10
μm or less is preferred.

The mixing ratio of the coarse particles and the fine particles in the heat-resistant resin particles is expressed by a weight ratio of coarse particles / fine particles = 100/1.
~ 1/100 is good. The reason for this is that if the amount of coarse particles is too large, the depth of the anchor becomes too deep, making it difficult to remove the electroless plated film by etching.On the other hand, if the amount of coarse particles is too small, high adhesion strength with the plated film cannot be obtained. It is.

The amount of the coarse particles is preferably from 10% by weight to 40% by weight based on the solid content of the adhesive. The fine particles are preferably contained in an amount of 1% by weight to 15% by weight based on the solid content of the adhesive. The weight is adjusted so that the weight of the coarse particles is greater than that of the fine particles in this weight percentage range.

It is necessary that the heat-resistant resin particles have been cured beforehand. If it is not cured, it will be dissolved in a solvent that dissolves the resin matrix and will be uniformly mixed, and it will not be possible to selectively dissolve and remove only the heat-resistant resin particles with an acid or an oxidizing agent.

Incidentally, the interlayer resin insulating layer may have a plurality of layers, and the particle diameter of the heat-resistant resin particles in each layer may be changed. For example, the lower layer may have coarse particles = 0.5 μm, and the upper layer may have coarse particles / fine particles = 3.0 μm / 0.5 μm, and may be made of adhesives having different particle diameters of heat-resistant resin particles. For applying the interlayer resin insulating agent, a roll coater, a curtain coater, or the like can be used.

(3) Next, the applied interlayer resin insulating agent (adhesive for electroless plating) is dried. At this time, the thickness of the interlayer resin insulating layer provided on the conductive circuit of the substrate is small, and the thickness of the interlayer resin insulating layer on the area where the area of the conductive circuit is large is small. Is thick and has irregularities (see FIG. 15 (a)).

(4) Next, the interlayer resin insulating layer in the uneven state is pressed (heat-pressed) while heating using a metal plate or a metal roll, and the surface thereof is flattened (see FIG. 15B). ). The metal plate and metal roll used here are preferably made of stainless steel. The reason is that it has excellent corrosion resistance. The heating press is performed by sandwiching the substrate provided with the interlayer resin insulating layer with a metal plate or a metal roll and pressing in a heating atmosphere. By this heating press, the resin of the interlayer insulating agent flows and the surface of the interlayer resin insulating layer becomes flat.
The heating temperature, pressure and time in this heating press differ depending on the resin used for the interlayer resin insulating agent. For example, when a composite of epoxy resin acrylate and polyether sulfone is used as a resin matrix, and an adhesive for electroless plating using epoxy resin particles as heat-resistant resin particles is used as an interlayer resin insulating agent, the heating temperature is 60 to 70. ℃, pressure 15 ~ 25k
gf / cm ² , and the time is desirably 15 to 25 minutes.

When a metal roll is used, it can be heated and pressed while being conveyed, which is advantageous from the viewpoint of mass productivity. In particular, it is advantageous to use a combination of an elastic roll such as rubber and a metal roll. For example,
As shown in FIG. 15 (b), heat press is first performed with a rubber roll 200, and then heat press is performed with a metal roll 201. In this case, the substrate provided with the interlayer resin insulating layer is preheated by the first rubber roll 200, and the preheated substrate is flattened by the metal roll 201.

In the present invention, if the interlayer resin insulating material is photosensitive, a translucent film can be attached on the interlayer resin insulating layer before heat pressing, if necessary. In this translucent film, oxygen inhibits the reaction during the photopolymerization reaction,
It is used in order to prevent a reduction in film thickness and peel strength during development. For this reason, even if the anchor depth is shallow,
No decrease in peel strength is observed. The translucent film is desirably a thermoplastic resin film, such as polyethylene terephthalate (PET) or polyethylene (P).
E), a film of polyvinyl alcohol (PVA), polyetheretherketone (PEEK), polyethersulfone (PES), polypropylene (PP), polyvinyl chloride (PVC) and the like are preferable.

It is desirable that these films have an adhesive applied to the surface on the sticking side. The reason is that adhesion to the interlayer resin insulating layer can be ensured. The pressure-sensitive adhesive is not particularly limited, but those described in "Notes on Adhesive Utilization, edited by Ken Ibouchi, Koei Komatsu, Yasuaki Kitazaki, published by the Industrial Research Institute" can be used. For example, natural rubber-based, styrene-butadiene-based, polyisobutylene-based, isoprene-based, acrylic-based, acrylic emulsion-based, silicone-based, and natural rubber-butadiene latex-based pressure-sensitive adhesives can be used. Specifically, an adhesive having the following composition can be used.

(1) Natural rubber-based natural rubber 100 parts by weight Tackifier resin 150 to 120 parts by weight Zinc flower 25 to 50 parts by weight Calcium carbonate 35 to 60 parts by weight Carbon black 部 15 parts by weight Antioxidant 1.51.5 parts by weight Sulfur 0.5 to 2.25 parts by weight (2) Styrene-butadiene rubber latex 100 parts by weight High melting point tackifier 89 parts by weight Soap-forming resin acid 5.6 parts by weight Antioxidant 4.8 parts by weight Aqueous ammonia 0.7 parts by weight Water 151 parts by weight (3 ) Polyisobutylene-based polyisobutylene 100 parts by weight Polybutene 10 parts by weight White oil 20 parts by weight (4) Isoprene-based Kuraray, trade name: Klaprene IR-10 (5) Acrylic 78 parts by weight of 2-ethylhexyne acrylate Methyl acrylate 20 Parts by weight Maleic anhydride 2 parts by weight Hexamethylenediamine 0.5 parts by weight (6) Acrylic emulsion-based 2-ethylhexyl acrylate 70 parts by weight Parts by weight Vinyl acetate 30 parts by weight Acrylic acid 2 parts by weight (7) Silicone silicone rubber 100 parts by weight Silicone resin 80-120 parts by weight Condensation catalyst 0.01-0.5 parts by weight Solvent 100-150 parts by weight

In the present invention, a light-transmitting film is adhered to an interlayer resin insulating layer in an uneven state, and this is pressed with a heat press (FIG.
15 (a) and (b)), and as shown in FIG. 24, a translucent film may be attached after flattening the interlayer resin insulating layer in an uneven state by hot pressing. Adhering a translucent film after flattening is advantageous because the resin is easy to move and the interlayer resin insulating layer is easily flattened.

(5) Next, while curing the interlayer resin insulation layer, an opening for forming a via hole is provided in the interlayer resin insulation layer. When the interlayer resin insulating layer is made of a thermosetting resin, the curing treatment of the interlayer resin insulating layer is performed by thermosetting.
When the interlayer resin insulating material is made of a photosensitive resin, the process is performed by exposing to ultraviolet rays or the like. The opening for forming the via hole is perforated by using a laser beam or oxygen plasma when the interlayer resin insulating material is thermosetting, while it is exposed and developed when the interlayer resin insulating material is photosensitive. Perforated. In the exposure and development process, a photomask (preferably a glass substrate) on which a circular pattern for forming a via hole is drawn is placed in close contact with the photosensitive interlayer resin insulating layer, and then exposed and developed. To process.

(6) Next, the surface of the interlayer resin insulating layer (adhesive layer for electroless plating) provided with openings for forming via holes is roughened. Particularly, in the case of the adhesive layer for electroless plating, the surface of the adhesive layer is roughened by dissolving and removing the heat-resistant resin particles present on the surface with an acid or an oxidizing agent. At this time, the depth of the roughened surface is preferably about 1 to 5 μm. Here, as the acid, phosphoric acid, hydrochloric acid, sulfuric acid,
Alternatively, there are organic acids such as formic acid and acetic acid, and it is particularly preferable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. On the other hand, it is desirable to use chromic acid and permanganate (such as potassium permanganate) as the oxidizing agent.

(7) Next, catalyst nuclei are provided on the roughened surface of the interlayer resin insulating layer. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus.
Use palladium chloride or palladium colloid. Note that it is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

(8) Next, a thin electroless plating film is formed on the entire surface of the roughened interlayer resin insulating layer. This electroless plating film has a thickness of 0.1 to 5 μm, more preferably 1 to 2 μm.
m.

(9) Next, a photosensitive resin film (dry film) is laminated on the electroless plating film provided in (8), and a photo resist pattern is drawn on the photosensitive resin film. A mask (preferably a glass substrate) is placed in close contact with the substrate, and exposed and developed to form a non-conductive portion provided with a plating resist.

(10) Next, an electrolytic plating film is formed on a portion other than the non-conductive portion on the electroless plating film, and a conductor circuit and a conductor portion serving as a via hole are provided. Here, it is desirable to use electrolytic copper plating as the electrolytic plating, and its thickness is preferably 10 to 20 μm.

(11) Next, after removing the plating resist of the non-conductive portion, the electroless plating film is further dissolved and removed with a mixed solution of sulfuric acid and hydrogen peroxide or an etching solution such as sodium persulfate and ammonium persulfate. Then, an independent conductor circuit composed of two layers of an electroless plating film and an electrolytic plating film, and a via hole are obtained.

(12) Next, a roughened layer is formed on the surface of the conductor circuit obtained in (11) and the via hole. As a method for forming the roughened layer, there are an etching treatment, a polishing treatment, an oxidation-reduction treatment and a plating treatment. The oxidation-reduction treatment is performed by using NaOH (10 g / l) and NaClO ₂ as an oxidation bath (blackening bath).
(40 gl) and Na ₃ PO ₄ (6 g / l) as a reducing bath
This is performed using NaOH (10 g / l) and NaBH ₄ (g / l). When forming a roughened layer of a copper-nickel-phosphorus alloy layer, it is deposited by electroless plating. Electroless plating solutions for this alloy include copper sulfate 1 to 40 g / l, nickel sulfate 0.1 to 6.0 g / l, citric acid 10 to 20 g / l, hypophosphite 10 to 100 g / l, boric acid 10 ~ 40g / l, surfactant
It is desirable to use a plating bath having a liquid composition of 0.01 to 10 g / l.

(13) Next, an interlayer resin insulating layer is formed on the substrate according to the steps (2) to (4). (14) Further, the above-mentioned steps (5) to (11) are repeated as necessary to form a multilayer, thereby producing a multilayer wiring board.

[0047]

EXAMPLES (Example 1) (1) 18 μm on both sides of a substrate 1 made of glass epoxy resin or BT (bismaleimide triazine resin) having a thickness of 0.6 mm.
A copper-clad laminate obtained by laminating copper foils 18 of m was used as a starting material (see FIG. 1). The copper-clad laminate was drilled, subjected to electroless plating, and the copper foil 8 was etched in a pattern according to a conventional method to form the inner conductor circuit 4 and the through holes 9 on both surfaces of the substrate 1. The surfaces of the inner layer conductor circuit 4 and the through hole 9 are roughened by oxidation (blackening) -reduction treatment (see FIG. 2), and bisphenol F type epoxy resin is filled between the conductor circuits and in the through hole as the filling resin 10. After that, the substrate surface was polished and flattened until the conductor circuit surface and the land surface of the through hole were exposed (see FIG. 3).

(2) The substrate subjected to the treatment of (1) is washed with water and dried, then the substrate is acid-degreased and soft-etched, and then treated with a catalyst solution comprising palladium chloride and an organic acid. , A Pd catalyst, and after activating this catalyst, copper sulfate 8 g / l, nickel sulfate 0.6 g / l, citric acid 15 g / l, sodium hypophosphite 29 g / l, boric acid 31 g / l, interface Plating is performed in an electroless plating bath consisting of activator 0.1 g / l and pH = 9, and a 2.5 μm thick roughened layer made of Cu-Ni-P alloy is formed on the exposed surface of the copper conductor circuit.
11 (uneven layer) was formed. In addition, the substrate is
/ L tin borofluoride-1.0 mol / l immersion in an electroless tin displacement plating bath consisting of a thiourea solution at 50 ° C for 1 hour to form a 0.3 μm thick tin displacement plating layer on the surface of the roughened layer 11. (See FIG. 4, but the tin layer is not shown).

(3) 34 parts by weight of 25% acrylate of cresol novolak type epoxy resin (manufactured by Nippon Kayaku, molecular weight 2500) dissolved in DMDG (diethylene glycol dimethyl ether), 12 parts by weight of polyether sulfone (PES), imidazole cured (Shikoku Chemicals, trade name: 2E4M
2 parts by weight of Z-CN), 4 parts by weight of caprolactone-modified tris (acroxyethyl) isocyanurate (trade name, manufactured by Toagosei Co., Ltd., Aronix M315), a photoinitiator (trade name: Irga, manufactured by Ciba Geigy) Cure 90
7) 2 parts by weight, photosensitizer (manufactured by Nippon Kayaku, trade name: DETX-
S) 0.2 part by weight, 25 parts by weight of an epoxy resin particle (manufactured by Sanyo Chemical Industries, trade name: polymer pole) having an average particle size of 3.0 μm, and 10 parts by weight of an epoxy resin particle having an average particle size of 0.5 μm were mixed. , NMP (normal methylpyrrolidone), 30.0 parts by weight, and the mixture was adjusted to a viscosity of 7 Pa · s with a homodisper stirrer, and then kneaded with three rolls to form a photosensitive adhesive solution for electroless plating (interlayer). (Resin insulating agent).

(4) The photosensitive adhesive solution obtained in the above (3) is applied to both sides of the substrate after the treatment in the above (2) using a roll coater, and is left in a horizontal state for 20 minutes. And then 60
Drying was performed at 30 ° C. for 30 minutes to form an adhesive layer 2 having a thickness of 60 μm (see FIG. 5).

(5) A polyethylene terephthalate film 18 was adhered via an adhesive onto the adhesive layer 2 formed on both sides of the substrate in the above (4). Then, a soda lime glass substrate 19 having a thickness of 5 mm on which a circular pattern (mask pattern 190) having the same shape as the via hole is drawn by a light-shielding ink having a thickness of 5 μm, and the side on which the circular pattern is drawn is brought into close contact with the adhesive layer 2. The wafer was then placed and exposed to ultraviolet light (see FIG. 6).

(6) The exposed substrate is spray-developed with a DMTG (triethylene glycol dimethyl ether) solution, so that the adhesive layer 2 has a via hole of 100 μm.
An opening of mφ was formed. Further, the substrate is exposed at 3000 mJ / cm ² using an ultra-high pressure mercury lamp, and is exposed at 100 ° C. for 1 hour.
By performing a heat treatment at 150 ° C. for 5 hours, an adhesive layer 2 having an opening (opening for forming a via hole) 6 having excellent dimensional accuracy equivalent to a photomask film and having a thickness of 50 μm.
Was formed. Note that the roughened layer 11 was partially exposed in the opening 6 serving as a via hole (see FIG. 7).

(7) The substrate having the via hole forming openings 6 formed in the above (5) and (6) is immersed in chromic acid for 2 minutes to dissolve and remove the epoxy resin particles present on the surface of the adhesive layer 2. Then, the surface of the adhesive layer 2 was roughened, and then immersed in a neutralizing solution (manufactured by Shipley Co., Ltd.) and then washed with water (see FIG. 8).

(8) The surface roughening treatment (roughening depth 5 μm)
By applying a palladium catalyst (manufactured by Atotech) to the substrate subjected to m), catalyst nuclei were provided on the surfaces of the adhesive layer 2 and the via hole openings 6.

(9) The substrate was immersed in an electroless copper plating bath having the following composition to form an electroless copper plating film 12 having a thickness of 3 μm on the entire rough surface (see FIG. 9). [Electroless plating solution] EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l [Electroless plating conditions] 30 minutes at liquid temperature

(10) Electroless copper plating film formed in (9)
Commercially available photosensitive resin film (dry film 31) on 12
Thermo-compression bonding, and then dry film 31
A 5 mm-thick soda lime glass substrate 19 on which a plating resist non-formed portion is drawn as a mask pattern 190 by the chromium layer is placed on the dry film 31 with the chromium layer formed side in close contact with the dry film 31. / Cm ² (see FIG. 10), developed with 0.8% sodium carbonate, and provided a plating resist pattern 3 having a thickness of 15 μm (FIG. 11).
reference).

(11) Next, in the portion where the plating resist is not formed,
Electroplate copper under the conditions shown below, and use a 15μm thick
A copper-plated copper film 13 was formed (see FIG. 12). [Electrolytic plating solution] Sulfuric acid 180 g / l Copper sulfate 80 g / l Additive (trade name: Capalaside G, manufactured by Atotech Japan)
L) 1 ml / l [Electroplating conditions] Current density 1.2 A / dm^Two  Time 30 minutes Temperature Room temperature

(12) After the plating resist 3 is removed by spraying with 5% KOH, the electroless plating film 12 under the plating resist 3 is dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide. Then, an 18 μm thick inner conductor circuit 5 composed of the electroless copper plating film 12 and the electrolytic copper plating film 13 was formed. Further, Pd remaining on the roughened surface 11 is replaced with chromic acid (800
g / l) for 1 to 2 minutes to remove (see FIG. 13).

(13) The substrate on which the conductor circuit 5 is formed is made of copper sulfate
8g / l, nickel sulfate 0.6g / l, citric acid 15g /
1, sodium hypophosphite 29 g / l, boric acid 31 g / l,
The surface of the conductor circuit 5 was immersed in an electroless plating solution having a pH of 9 containing 0.1 g / l of a surfactant to form a roughened layer 11 made of copper-nickel-phosphorus having a thickness of 3 μm. At this time,
When the roughened layer 11 was analyzed by EPMA (X-ray fluorescence spectrometer), the composition ratio was 98 mol% for Cu, 1.5 mol% for Ni, and 0.5 mol% for P. Then, further rinse the board with water,
ol / l tin borofluoride-1.0 mol / l immersed in an electroless tin displacement plating bath composed of a thiourea solution at 50 ° C. for 1 hour to form a 0.3 μm thick tin displacement plating layer on the surface of the roughened layer 11. (Refer to FIG. 14, the tin-substituted layer is not shown).

(14) Next, the adhesive layer 2 is further provided according to the step (4), and a polyethylene terephthalate film 18 is adhered to the surface of the adhesive layer 2 (see FIG. 15A). Sandwich the wiring board, pressurize at 20 kgf / cm ² ,
Heat press was performed for 20 minutes while heating at 65 ° C. in a heating furnace (see the left diagram in FIG. 15B). With this heating press, the surface of the adhesive layer 2 was flattened to form an interlayer resin insulating layer (see FIG. 15C).

(15) By repeating the above steps (5) to (13), a conductor circuit was further provided. Then, a roughened layer 11 made of copper-nickel-phosphorus was provided on the surface of the conductor circuit. However, no tin-substituted plating layer was formed on the surface of the roughened layer 11 (see FIGS. 16 to 20).

(16) On the other hand, 60% by weight dissolved in DMDG
Cresol novolak epoxy resin (Nippon Kayaku)
14.6% bisphenol A type epoxy resin (manufactured by Yuka Shell Co., trade name: Epikote 1001) in which 46.67 parts by weight of a photosensitizing oligomer (molecular weight 4000) obtained by acrylate of 50% of epoxy groups of the above is dissolved in methyl ethyl ketone 15.0 Parts by weight, imidazole curing agent (Shikoku Chemicals, trade name: 2E4M
1.6 parts by weight of Z-CN), 3 parts by weight of a photosensitive acrylic monomer (manufactured by Nippon Kayaku, trade name: R604), and also a polyvalent acrylic monomer (manufactured by Kyoeisha Chemical, trade name: DP)
E6A) 1.5 parts by weight, 0.71 parts by weight of a dispersant antifoaming agent (manufactured by San Nopco, trade name: S-65), and 2 parts by weight of benzophenone (Kanto Chemical) as a photoinitiator with respect to these mixtures Parts, 0.2 parts by weight of Michler's ketone (manufactured by Kanto Chemical Co., Ltd.) as a photosensitizer, and add
s was obtained. The viscosity was measured at 60 rpm using a B-type viscometer (Tokyo Keiki, DVL-B type).
In the case of the rotor No. 4, the rotor No. 3 was used in the case of 6 rpm.

(17) The above solder resist composition was applied to both sides of the substrate obtained in the above (15) in a thickness of 20 μm. Next, after performing a drying process at 70 ° C. for 20 minutes and at 70 ° C. for 30 minutes, a 5 mm-thick soda-lime glass substrate 19 on which a circular pattern (mask pattern 190) of the solder resist opening is drawn by a chromium layer is removed. And the side on which the chromium layer is formed is placed in close contact with the solder resist layer, and is placed at 1000 mJ / cm ²
(See FIG. 21) and subjected to a DMTG development treatment.
And then at 80 ° C for 1 hour, at 100 ° C for 1 hour, at 120 ° C
For 1 hour and at 150 ° C. for 3 hours to form a solder resist pattern layer 14 (opening diameter: 200 μm) in which the upper surface of the solder pad, the via hole and its land were opened.
(Thickness: 20 μm).

(18) Next, the solder resist pattern layer 14
The substrate on which was formed was immersed in an electroless nickel plating solution having a pH of 5 consisting of 30 g / l of nickel chloride, 10 g / l of sodium hypophosphite, and 10 g / l of sodium citrate for 20 minutes, and the thickness of the opening was measured. A nickel plating layer 15 of 5 μm was formed. Further, the substrate was treated with 2 g of potassium potassium cyanide /
l, ammonium chloride 75 g / l, sodium citrate 50
The gold plating layer 16 having a thickness of 0.03 μm was formed on the nickel plating layer 15 by immersing it in an electroless gold plating solution containing g / l and sodium hypophosphite 10 g / l at 93 ° C. for 23 seconds.

(19) Solder resist pattern layer
Solder paste was printed in the openings 14 and reflowed at 200 ° C. to form solder bumps (solder bodies) 17, thereby producing a printed wiring board having the solder bumps 17 (see FIG. 22).

(Comparative Example 1) A printed wiring board having solder bumps was manufactured in the same manner as in the example except that the interlayer resin insulating layer was not heated and pressed.

Comparative Example 2 A printed wiring board having solder bumps was manufactured in the same manner as in Example except that the polyethylene terephthalate film was not adhered.

When the printed wiring boards manufactured in this way and the comparative example were compared, in the example, each interlayer resin insulation layer was flat, and no formation failure of the via hole opening was observed. On the other hand, in the comparative example, since the thickness of the interlayer resin insulating layer was different, an unopened portion of the via hole opening was observed. In addition, when trying to mount an IC chip, in the example, no mounting failure was observed, whereas in the comparative example, undulation was observed in the solder bump group,
Could not be implemented. Further, when a heat cycle test at -55 ° C to 125 ° C was performed, no crack was generated in the interlayer resin insulating layer of the printed wiring board of the example.

Further, the obtained example and comparative example 2
The peel strength of the printed wiring board was measured in accordance with JIS-C-6486. As a result, it was 1.2 kg / cm in the example and 0.6 kg / cm in the comparative example 2. In addition, the film reduction was 5 μm in the example, but 10 μm in the comparative example 2.
m. The reason why such a difference occurs is that, in the example, a polyethylene terephthalate film can be attached to prevent the contact between the resin on the surface of the interlayer resin insulating layer and oxygen,
In Comparative Example 2, since the resin on the surface of the interlayer resin insulating layer comes into contact with oxygen, the photopolymerization reaction was inhibited and did not cure sufficiently, so that the resin was dissolved in the solvent and the film was reduced, and the curing was insufficient. Therefore, it is estimated that the peel strength is reduced.

[0070]

As described above, according to the present invention, the surface irregularities of the interlayer resin insulation layer caused by the conductor circuit in the inner layer are prevented, and the formation of via hole openings and the formation of solder bumps on the mounting surface are prevented. In addition to suppressing undulation, a light-transmitting film is attached to an interlayer resin insulating layer containing a photosensitive resin and exposure and curing are performed, so that film reduction can be prevented. Moreover, according to the present invention, surface irregularities of the interlayer resin insulating layer caused by the inner conductive circuit can be prevented, so that a build-up multilayer wiring board having excellent heat cycle characteristics can be manufactured by the semi-additive method.

[Brief description of the drawings]

FIG. 1 is a diagram showing each step in a method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 2 is a diagram showing each step in a method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 3 is a view showing each step in a method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 4 is a view showing each step in a method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 5 is a view showing each step in a method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 6 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 7 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 8 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 9 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 10 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 11 is a view showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 12 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 13 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 14 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 15 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 16 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 17 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 18 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 19 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 20 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 21 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 22 is a diagram showing each step in the method for manufacturing a multilayer printed wiring board according to the present invention.

FIG. 23 is a diagram showing surface irregularities of an interlayer resin insulating layer caused by an inner conductor circuit.

FIG. 24 is a view showing a method of attaching a light-transmitting film after flattening an interlayer resin insulating layer in an uneven state.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 interlayer resin insulating layer (adhesive layer) 3 plating resist (permanent resist) 31 dry film 4, 5 inner conductor circuit 6 opening for via hole 7 via hole 8 copper foil 9 through hole 10 filling resin 11 roughened layer 12 Electroless copper plating film 13 Electrolytic plating film 14 Solder resist layer 15 Nickel plating layer 16 Gold plating layer 17 Solder body (solder bump) 18 Translucent film 19 Glass substrate 190 Mask pattern 20 Metal plate (stainless plate) 200 Rubber roll 201 Metal roll

Claims (6)

[Claims] In producing a multilayer printed wiring board, at least the following steps (1) to (3): Forming an interlayer resin insulation layer by applying an uncured interlayer resin insulation agent on the conductor circuit of the substrate; Heating the interlayer resin insulation layer to flatten its surface; Forming a conductive circuit on the planarized interlayer resin insulating layer. 2. In manufacturing a multilayer printed wiring board, at least the following steps: Forming an interlayer resin insulation layer by applying an uncured and photosensitive interlayer resin insulation agent on the conductor circuit of the substrate; Heating the interlayer resin insulation layer to flatten its surface; Exposure and development of the planarized interlayer resin insulation layer,
Providing an opening for forming a via hole; Forming a conductive circuit and a via hole in an interlayer resin insulating layer having an opening. 3. An inter-layer resin insulating agent, wherein hardened heat-resistant resin particles soluble in an acid or an oxidizing agent are dispersed in an uncured heat-resistant resin matrix which becomes hardly soluble in an acid or an oxidizing agent by a hardening treatment. The method according to claim 1, wherein an adhesive for electroless plating is used. 4. When forming a conductive circuit on an interlayer resin insulating layer, first, a plating resist is disposed on an electroless plating film provided on the roughened interlayer resin insulating layer to form a non-conductive portion. After performing electroplating on portions other than the non-conductive portion to form a conductor, the plating resist and the electroless plating film under the plating resist are removed to form two layers of an electroless plating film and an electrolytic plating film. The method according to claim 1, wherein a conductor circuit comprising: 5. The method according to claim 1, wherein prior to applying the interlayer insulating agent on the conductor circuit of the substrate, at least a side surface of the conductor circuit is roughened. 6. The method according to claim 1, wherein the hot pressing of the interlayer resin insulating layer is performed by pressing a metal plate or a metal roll while heating the interlayer resin insulating layer.