JP2001237533A - Circuit board and circuit device using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a circuit board wherein adhesion of an electronic component and a circuit board is superior while height precision is maintained, and high precision and high reliability are ensured by holding stable composition after solder is fused, and a circuit device using the circuit board. SOLUTION: In the circuit board S1 wherein a laminated solder H constituted of an alternate multilayer film 4 of Au thin films and Su thin films is formed on a board 1, the uppermost layer 5 and the lowermost layer 3 of the laminated solder H are made of Au thin films, and the total film thickness of the Sn thin films is greater than that of the Au thin films. In this circuit device, an optical semiconductor element is mounted on the laminated solder of the circuit board S1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit board (mounting board) for mounting electronic components such as a resistor, a capacitor, a light emitting element, a light receiving element, etc. via laminated solder, and an electronic component mounted on the circuit board. For a circuit device, particularly for a circuit board using Au (Sn) -tin (tin) solder as a laminated solder, an optical semiconductor element such as a light emitting element or a light receiving element is mounted on a circuit board used for an optical communication device. Circuit device (mixed device of optical circuit and electronic circuit).

[0002]

2. Description of the Related Art Conventionally, a laser diode (hereinafter referred to as LD) or a photodiode (hereinafter referred to as PD) is mounted on a circuit board.
AuSn eutectic solder has been used for joining optical semiconductor elements such as

However, since the AuSn eutectic solder is easily oxidized, the circuit board and the optical semiconductor element must be joined in a reducing atmosphere. Further, in joining an optical semiconductor element and a circuit board, it is required to provide a highly accurate and highly reliable positioning and fixing of submicron order while supplying a stable solder corresponding to the minute joint.

In order to meet these requirements, it has been proposed to use a single-layer film of an Au--Sn alloy as an AuSn eutectic solder, or to form a multilayer solder by alternately laminating Au thin films and Sn thin films. I have.

[0005] In such a multilayer solder, the surface roughness is improved by reducing the thickness of the Sn thin film forming the intermediate layer to 0.3 μm or less, and the oxidation of the molten solder prior to alloying that occurs when the solder is melted. Or (for example, Japanese Patent Laid-Open No. 10-6073)
Japanese Patent Application Laid-Open No. H11-27139), the wettability is improved by setting the thickness of each layer of the Au thin film and the Sn thin film to 0.001 to 1.0 μm and setting the solder composition to excessive Sn. 9-283909). In each of these examples, the total thickness of the multilayer solder is set to 1.0 to 2.0 μm from the necessity of high-precision positioning.

[0006]

However, the present inventors have studied the solder thickness from a number of experiments on mounting an optical semiconductor element on a circuit board, and as a result, have found that the thickness of the 2 μm is not as shown in the above example.
It has been found that the following two main problems occur when the solder film thickness is less than m.

The problem of parallelism When an optical semiconductor device is die-bonded to a circuit board, the parallelism between the two is important. For example, when the size of the mounting portion of the optical semiconductor device is 1 mm square, the parallelism is reduced to 1 μm. In order to suppress this, a mechanical accuracy of approximately 1 × 10 ⁻³ rad (an arrangement accuracy of the circuit board before bonding) is required. That is, when the thickness of the solder is reduced, such mechanical precision is required in order to bring the optical semiconductor element into close contact with the circuit board. Therefore, if the thickness of the multilayer solder is 2 μm or less, it is difficult to cope with the problem and uneven bonding occurs.

The mechanical accuracy depends on the performance of the mounting device for the optical semiconductor element. If the mechanical accuracy of the mounting device is improved, it is advantageous to reduce the thickness of the solder in terms of height accuracy. However, it is not easy to always secure the mechanical precision with the above-mentioned precision. Therefore, it is essential to increase the thickness of the solder to some extent in the actual process.

Problem of Proper Composition Usually, the metallized thickness of a circuit board or an optical semiconductor device is about 0.1.
On the other hand, making the solder thinner is comparable in scale to metallization. That is, the amount of metallization cannot be ignored with respect to the solder, and the composition of Au during melting changes.

[0010] Therefore, in the conventional solder thickness, when the solder is melted, metallization is eaten, and a composition shift such as Au-rich in the solder composition occurs. As a result, an unexpected alloy phase is formed or the Au
And Sn do not melt.

From these points, it is desired that the volume of the solder is as large as possible. Of course, this case is disadvantageous in terms of height accuracy. In order to stabilize the composition, it is necessary that the solder has a certain thickness.

Accordingly, the present invention provides a method for maintaining height accuracy.
It is an object of the present invention to provide a circuit board which has excellent adhesion strength between an electronic component and a circuit board, and has high precision and high reliability by maintaining a stable composition even after melting of solder, and a circuit device using the same. And

[0013]

In order to achieve the above object, a circuit board according to the present invention comprises an Au thin film and a Sn thin film on a substrate (directly on the substrate or on a base adhesive layer formed on the substrate).
In a circuit board on which a laminated solder composed of alternating thin layers of thin films is formed, the uppermost layer and the lowermost layer of the laminated solder are made Au thin films, and the total thickness of the Sn thin films is larger than the total thickness of the Au thin films. Features.

In particular, the thickness of the uppermost layer of the laminated solder is equal to or greater than that of the Au thin film constituting the other layers of the laminated solder. The thickness of the uppermost layer of the laminated solder is 0.2 μm or more. The total thickness of the laminated solder is 3 to 5 μm, and the number of laminated alternate multilayer films is 7 or more. The weight composition ratio Au: Sn of the laminated solder is 70-80: 30-2.
It is characterized by being within the range of 0.

Further, a circuit device according to the present invention is characterized in that electronic components are mounted on the circuit board via the laminated solder. That is, the laminated solder is melted, an electronic component is mounted on a circuit board via the laminated solder, and the molten laminated solder is solidified.

Here, Au of the intermediate layer in the alternating multilayer film is used.
The reason why the thickness of the thin film is made equal to or less than that of the Au thin film of the uppermost layer and the lowermost layer is to facilitate alloying in addition to economic reasons, and the total thickness of the Sn thin film is set to be smaller than the total thickness of the Au thin film. The reason why the value is set to a large value is the same as the above and for improving the wettability.

The thickness of the uppermost Au thin film is 0.2 μm.
The reason why the thickness is set to m or more is that the minimum thickness is required to prevent oxidation of the Sn thin film underneath. The reason why the lowermost Au thin film is thicker than the intermediate Au thin film in the alternate multilayer film is to prevent the Sn component of the thin film located immediately above the Au thin film from mixing with Au or the like of the base electrode. This is because if the thickness of the Au thin film is small, the base adhesive layer is eroded more frequently, and it becomes difficult to control the composition ratio.

Furthermore, the weight composition ratio Au: Sn is set to 70-8.
The setting within the range of 0:30 to 20 largely depends on the metallized state on the mounting (arrangement) surface of the electronic component to be joined, but in most cases, the wettability is within the above range. This is because stable implementation at a practical level is possible even if consideration is given.

As described above, in actual flip-chip mounting of electronic parts, the sinking of the electronic parts by about 1 μm usually occurs due to the heating of the circuit board (mounting board) and the pressure bonding to the electronic parts. Therefore, considering the variation of the mounting conditions at the time of soldering, the thickness of the laminated solder should be 3
５5 μm is a preferred range. If the thickness is 5 μm or more, it is difficult to mount electronic components with high accuracy.

When the number of stacked layers in the alternate multilayer film is 7 or less, the total thickness of the Au thin film is set to be larger than the total thickness of the Sn thin film. As a result, oxidation due to exposure of the Sn component to the surface and formation of the AuSn compound layer cannot be suppressed, and the electronic component cannot be mounted with high accuracy and high reliability.

In general, it is better to have a large number of stacked layers in the alternate multilayer film, but if the number of stacked layers is too large, there are problems in productivity and cost.

[0022]

Embodiments of the present invention will be described below in detail with reference to the drawings.

As shown in FIG. 1, an alternate multilayer film of Au thin film and Sn thin film (3, 4, 5 in the figure) is formed on a substrate 1 or a base adhesive layer 2 formed on the substrate 1. In the circuit board S1 on which the laminated solder H is formed, the uppermost layer 5 and the lowermost layer 3 of the laminated solder H are formed into an Au thin film, and the total thickness of the Au thin films constituting the laminated solder H is determined by S
The total thickness of the n thin films is large.

The thickness of the uppermost layer 5 of the laminated solder H is
It is equal to or more than the Au thin film constituting the layers other than the uppermost layer 5 of the laminated solder H. The thickness of the uppermost layer 5 of the laminated solder H is 0.2 μm or more. The preferred range of the thickness of the laminated solder H is 3 to 5 μm, and the preferred range of the number of laminated alternate multilayer films is 7 to 10. Further, the weight composition ratio Au: Sn of the laminated solder H is in the range of 70 to 80:30 to 20. In the figure, reference numeral 4 denotes an intermediate layer of the alternate multilayer film formed on the lowermost layer 2;
b is an Au thin film.

Here, as the substrate 1, a ceramic substrate such as alumina, a semiconductor substrate made of single crystal Si or the like is used. In addition, in order to form a laminated solder H on this with good adhesion, a metal thin film is formed as the base adhesive layer 2 in a single layer or a plurality of layers made of two or more kinds of metals. The base adhesive layer 2 may be, for example, a lower / upper layer made of Cr / Au or Ti / P
t / Au or the like is appropriately selected and used. As a film forming method for lamination, a sputtering method or an EB vapor deposition method is employed, and a thin film is formed in an inert atmosphere such as Ar or N ₂ .

After the base adhesive layer 2 is thus formed, the Au thin film of the lowermost layer 3 is laminated thereon by a similar film forming method. The thickness of the lowermost layer 3 made of an Au thin film is desirably equal to or greater than the thickness of the underlying adhesive layer 2 immediately below. This is because if the thickness of the lowermost layer 3 is too small, it is directly affected by the base adhesive layer 2 at the time of forming a molten alloy, thereby causing poor bonding.

Following the formation of the lowermost layer 3, the Sn thin film 4a
And the Au thin film 4b are alternately stacked. At the end of the alternate laminated film, the Au thin film of the uppermost layer 5 is formed. As described above, the thickness of the uppermost layer 5 is restricted by the metallizing state of the electronic component such as the element to be joined, but basically, the oxidation of the Sn thin film 4a immediately below the uppermost layer 5 is prevented. The film thickness must be as large as possible.

In the present invention, as a result of intensive experiments, it was found that the thickness of the Au thin film forming the uppermost layer 5 on the side of the electronic component to be joined was 0.2 μm.
It has been found that if the thickness is at least μm, it can be used for most electronic components (especially optical semiconductor elements) even if the thickness of the Sn thin film 4b is not so reduced.

Next, an example in which an optical module used in the optical communication field is applied as an electronic circuit device will be described with reference to FIG. Note that L in the drawing is the optical axis, and FIG. 4B is a sectional line A- including the optical axis L in FIG.
It is an end elevation in A.

The circuit device, which is a mixed optical circuit / electronic circuit device shown in FIGS. 4A and 4B, is an optical module M for optical transmission.
A substrate 11 made of a material capable of anisotropic etching such as silicon single crystal is formed on an optical waveguide groove 12 by anisotropic etching of an alkaline aqueous solution which is an aqueous solution of sodium hydroxide or potassium hydroxide. Deep V groove), reflection groove 13
(Shallow V-groove). Then, an optical waveguide 14 such as an optical fiber or an optical waveguide is mounted in the optical waveguide groove 12, and one end of the optical waveguide 14 and one end of the reflection groove 13 emit light such as an LD (semiconductor laser). The element 15 is disposed on the substrate 11 via a base adhesive layer 16 which is a conductor pattern and a laminated solder 17 similar to the above H. Reflection groove 1
3, a reflection film is formed on the entire surface or a part of the surface by metallizing Au or the like. The light receiving element 18 which is a surface light receiving type monitoring PD is formed so as to straddle the reflection groove 13 like the light emitting element 15. And the base adhesive layer 16 and the laminated solder 1
7 are arranged.

Here, the light emitting element 15 is made of, for example, InGa.
The light receiving element 18 is made of, for example, Ge, InGa using AsP.
As, InGaAsP, AlGaAsSb, InGaAs
It is assumed that a surface-light-receiving type PD using a III-V group multiple semiconductor polycrystal composed of b or the like is used.

In the optical module M configured as described above, the light emitting element 15 emits light forward and rearward, but the light emitted backward is detected by the light receiving element 18, and by this detection, the front of the light emitting element 15 is detected. Control the outgoing light to
The emitted light is optically coupled to the optical waveguide 14.

Thus, the light emitting element 15 and the light receiving element 18
Is mounted on the stable laminated solder 17, so that the light emitting element 15 and the optical waveguide 14, and the light emitting element 15 and the light receiving element 18 are accurately optically coupled with each other. M can be provided.

In this embodiment, an optical module in which an optical circuit and an electronic circuit are mixed has been described as an example. However, a circuit device having only an optical circuit or a circuit device having only an electronic circuit can be applied.

[0035]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, more specific embodiments of the present invention will be described. Example 1 As shown in FIG. 2, an LD element (not shown) having a 300 μm square and a joint portion of about 250 μm square was formed on a substrate (thickness: about 500 μm) 1 made of Si single crystal used for an optical circuit. The circuit board S2 was flip-chip mounted.

At this time, the substrate 1 was previously subjected to a thermal oxidation treatment, and a thermal oxide film 1a having a thickness of about 1 μm was applied to the surface. On this, a first base adhesive layer 2a made of a Cr thin film by a sputtering method
With a thickness of 0.05 μm and a second underlying adhesive layer 2b made of an Au thin film.
Was formed in a thickness of 0.5 μm to form a base adhesive layer 2.

Next, the lowermost layer 3 made of an Au thin film is set to a thickness of 0.1 mm.
2 μm, the Sn thin film 4 in the intermediate layer 4 of the AuSn alternate layers
a of 0.3 μm, Au thin film 4 b of 0.2 μm, and A
The uppermost layer 5 composed of a u thin film is formed with a thickness of 0.5 μm,
AuSn laminated solder H having a thickness of 3 μm was formed with a total of 11 layers. For comparison, seven layers are 2 μm thick (the lowermost layer is 0.1 μm).
μm, Sn thin film 0.33μ in the intermediate layer of the alternately laminated film
m, Au thin film 0.25μ in the intermediate layer of the alternately laminated film
m, uppermost layer 0.4 μm) (hereinafter, 2 μm / 7
Layer sample) and 3 layers of 7 μm thickness (the lowermost layer 0.2
33 μm, Sn thin film 0.5 in the intermediate layer of the alternately laminated film
μm, 0.233 Au thin film in the intermediate layer of the alternately laminated film
μm, 0.8 μm of the uppermost layer) (hereinafter, 3 μm /
A laminated solder of 7 layers sample) was formed by the same process. The weight composition ratio Au: Su was 80:20.

The mounting conditions are made the same, and 10
Samples were made. When the solder joint strength of the element was measured by a shear strength evaluation device, under a heating condition at 360 ° C., the 2 μm / 7-layer sample showed a high shear strength of 2.88 N on average, but the variation was σ.
= 124.2, and a large and stable strength could not be obtained.

Further, it was difficult to laminate the 3 μm / 7-layer sample from the first layer. As a result, the average shear strength after film formation was as low as 0.59 N, and a practical level of strength was not obtained.

As compared with these comparative samples, the product of the present invention exhibited an average strength of 2.61 N, which was higher than the practical level, and the variation in strength was as small as σ = 38.9.

Example 2 As shown in FIG. 3, AuSn laminated solder H was formed on a substrate 1 which is a PD carrier made of alumina, and its mounting performance was evaluated. The chip size used was 500 × 300 μm and the bonding surface was about 100 μm
m square.

In order to form the AuSn laminated solder, the substrate 1 was first metallized. Metallization is 2μm thick
The lower / upper layer is a Mo film 2a / Mn film 2b, a 1 μm thick Ni film 2c, and a 1 μm thick Au film for improving adhesion.
A base adhesive layer 2 was formed by sequentially forming a film 2d and a Pt film 2e having a thickness of 0.4 μm as a barrier layer.

The Au thin film and the Sn thin film were alternately laminated on the base adhesive layer 2 thus formed in the same manner as in the first embodiment. In this embodiment, 11 layers have a thickness of 5 μm (the lowermost layer 3 has a thickness of 0.28 μm).
m, the Sn thin film 4a of the alternate multilayer film of the intermediate portion 4 is 0.6 μm.
m, the Au thin film 4b of the alternate multilayer film of the intermediate portion 4 is 0.28 μm.
m, the AuSn laminated solder H having the uppermost layer 5 of 0.6 μm) was formed. In this case, since the base adhesive layer 2 is thick, the weight composition ratio Au: Sn is set to 7 in advance in consideration of the wet spreading property.
5:25 and Sn-rich composition.

For comparison, a 11 μm-thick sample having a thickness of 3 μm (hereinafter referred to as a 3 μm / 11-layer sample) and a 7 to 9-layer sample having a thickness of 3 μm (hereinafter referred to as a 3 μm / 7 to 9-layer sample) were prepared. These samples have a lower layer of 0.4
μm, Sn thin film layer 0.36 μm, Au thin film layer 0.125
μm, and the uppermost layer was 0.4 μm. In these samples, the weight composition ratio Au: Sn was changed from 80:20 to 70:30.

The PD was flip-chip mounted on the substrate 1 manufactured as described above, and its wettability and bonding strength were evaluated.

As a result, in the embodiment of the present invention, a stable average bonding strength of about 0.69 N was obtained, while the wet-spreading property was good and the practical level strength was 0.49 N. On the other hand, in the comparative sample of 3 μm / 11 layers, the wettability was slightly inferior and the average bonding strength was 0.44N.

In the case of the sample having a thickness of 3 μm / 7 to 9 layers, the lamination was difficult and the average bonding strength was as low as 0.1 N or less, so that the sample could not be used. In addition, the weight composition ratio A
In the case of u: Sn, in the case of Sn-rich composition, it was found that there was no problem in soldering at a practical level even at around 70:30 if the heating time was reduced to an extremely short time as the heating temperature was increased.

[0048]

As described above in detail, according to the circuit board of the present invention and the electronic circuit device using the same, most of the electronic components, especially the optical semiconductor elements, can be formed on the circuit board with a high precision of about 1 μm. Solder can be stably soldered while maintaining a practical level of bonding strength, and as a result, the adhesive strength between the electronic component and the circuit board is excellent, and a stable solder composition is maintained even after the multilayer solder is melted. A circuit board having high accuracy and high reliability and an electronic circuit device using the same can be provided.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view schematically illustrating one embodiment of a circuit board according to the present invention.

FIG. 2 is a cross-sectional view schematically illustrating one embodiment of a circuit board according to the present invention.

FIG. 3 is a cross-sectional view schematically illustrating another embodiment of the circuit board according to the present invention.

4A and 4B are schematic diagrams illustrating an embodiment of an electronic circuit device according to the present invention, wherein FIG. 4A is a perspective view, and FIG. 4B is an end view taken along line AA of FIG.

[Explanation of symbols]

1: Substrate 2: base adhesive layer 2a: first base adhesive layer 2b: second base adhesive layer 3: bottom layer 4: alternate multilayer film 4a: Sn thin layer 4b: Au thin layer 5: top layer H: laminated solder S1 To S3: Circuit board M: Optical module (circuit device)

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Shiro Sakushima 3-5 Kodai, Seika-cho, Soraku-gun, Kyoto F-term in Kyocera Corporation Central Research Laboratory 5E319 AC01 BB01 GG03

Claims (6)

[Claims] 1. A circuit board having a multilayer solder comprising an alternate multilayer film of an Au thin film and a Sn thin film formed on a substrate, wherein the uppermost layer and the lowermost layer of the multilayer solder are made Au thin films, and the total thickness of the Au thin films is A circuit board, wherein the total thickness of the Sn thin film is larger. 2. The circuit board according to claim 1, wherein the thickness of the uppermost layer of the laminated solder is equal to or greater than the thickness of the Au thin film constituting another layer of the laminated solder. 3. The thickness of the uppermost layer of the laminated solder is 0.2.
The circuit board according to claim 1, wherein the thickness is not less than μm. 4. The circuit board according to claim 1, wherein the thickness of the laminated solder is 3 to 5 μm, and the number of layers of the alternate multilayer film is 7 or more. 5. The weight composition ratio Au: Sn of the laminated solder.
The circuit board according to claim 1, wherein is within a range of 70 to 80:30 to 20. 6. The circuit board according to claim 1, wherein
A circuit device, wherein an electronic component is mounted via the laminated solder.