JP2001237388A - Magnetoresistive storage element and ferroelectric storage element - Google Patents

Abstract

(57) [Summary] [PROBLEMS] In a magnetoresistive effect type storage element or the like, a step of temporarily converting a difference in current flowing through a memory cell into a voltage is required. The difference between the read currents is reduced, the operation margin is reduced, and reading becomes difficult. In the worst case, a malfunction occurs. A demagnetizing field is reduced by using an exchange-coupled ferrimagnetic layer or an amorphous layer and an interface magnetic layer as a ferromagnetic layer of a magnetoresistive element. By skillfully combining a variable resistance element and a negative resistance element, it is possible to directly convert the difference in the current flowing through the memory cell to a voltage, and realize a high-performance storage element in terms of power consumption and operating speed. Solve the problem of leverage.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a high-density magnetoresistive memory device and a high-density magnetoresistive memory device capable of operating at a low voltage and having a fine-shaped magnetoresistive effect type memory element and a ferroelectric resistance change type, and having a large operation margin. To realize the ferroelectric resistance change type storage device.

[0002]

2. Description of the Related Art A solid-state memory device (MRAM) using a magnetoresistive (MR) film is proposed by Schwee (reference document 1) and uses a word line, which is a current line for generating a recording magnetic field, and an MR film. Various types of MRAM composed of read sense lines have been studied (reference document 2). These storage devices have an anisotropic M having an MR change rate of about 2%.
A NiFe film or the like exhibiting the R effect (AMR) is used, and an improvement in output has been a problem.

It has been discovered that an artificial lattice film made of a magnetic film exchange-coupled via a nonmagnetic film exhibits a giant magnetoresistance effect (GMR).
A proposal for AM was made (Ref. 4). However,
The GMR film made of the antiferromagnetic exchange-coupled magnetic film shows a large MR change rate, but requires a larger applied magnetic field than the AMR film, and has a problem that a large information recording and reading current is required.

[0004] In contrast to the above exchange-coupled GMR film, there is a spin-valve film as a non-coupled GMR film, which uses an antiferromagnetic film (Ref. 5) and a (semi) hard magnetic film. (Ref. 6), which show a low magnetic field similar to that of the AMR film and a larger MR ratio than the AMR film. The present invention is an MRAM using a spin valve type using an antiferromagnetic film or a hard magnetic film, and shows that this storage element has a nondestructive readout characteristic (NDRO) (Reference Document 7). .

[0005] The non-magnetic layer of the above-mentioned GMR film is a conductor film of Cu or the like. However, a study of a tunnel type GMR film (TMR) using an oxide insulating film of Al ₂ O ₃ or MgO as the non-magnetic layer has also been made. MRAM using this TMR film has been proposed.
In the GMR film, the MR effect (CPPMR) when a current flows perpendicularly to the film surface is better than the MR effect when a current flows in the film surface.
It is known that the effect is larger than the effect (CIPMR). Further, the TMR film is expected to have a higher output because of its high impedance.

[0006] A TMR element has an Al ₂ O ₃ layer between two magnetic layers.
It is an element with a simple structure in which an ultra-thin insulating film made of an oxide such as MgO or MgO is inserted, and is expected to reduce costs in terms of manufacturing. However, a tunnel type GMR film (TMR)
Even with a TMR element using, the MR change rate is about 25%, and the output voltage of the element can only be changed by about 25%. The power supply voltage of ordinary silicon MOS semiconductor devices has been reduced year by year due to miniaturization, and it is predicted that the power supply voltage will be 0.5 V or less after 2010. At this time, assuming that only 25% of the output voltage changes, only an amplitude of about 0.13 V is obtained, and the circuit operation margin becomes very small. In order to improve this point, it has been considered to configure a memory cell by combining these TMR elements and MOS elements. For example, there is a method in which a TMR element is connected in series to a source electrode of a MOS element, and a change in source resistance due to the TMR element is converted into a change in drain current of the MOS element and read. In this case, an N-channel MOS element is usually used as the selection transistor. The gate electrode of the MOS element corresponds to a word line of a memory such as a DRAM.
V, the power supply voltage when selected. An appropriate bias voltage is applied to the drain electrode. When a memory cell is selected, current flows between the source and drain, but a substrate bias is applied according to the magnitude of the source resistance by the TMR element, and the current between the source and drain changes depending on the resistance of the TMR element. I do. The difference in the current is amplified by a sense amplifier or the like, and the magnitude of the resistance of the TMR element is finally converted into a voltage of 0 or 1 to read the contents of the memory.

[0007]

However, even when the above method is used, a step of temporarily converting a difference in current flowing through the memory cell into a voltage is required, and power consumption and power consumption are reduced.
It is disadvantageous in terms of operating speed. Further, when the power supply voltage is reduced in accordance with miniaturization in the future, the amount of current flowing through the transistor decreases, the voltage applied to the resistance of the TMR element installed on the source side decreases, and as a result, the substrate bias effect decreases. When the substrate bias effect is reduced, the difference between the read currents is reduced, the operation margin is reduced, and the read becomes difficult. In the worst case, a malfunction occurs.

[0008]

According to the first aspect of the present invention, when the storage element according to the first aspect of the present invention is used, by increasing the resistance ratio between the first resistance element and the second resistance element, the field effect transistor is improved. The potential of the gate electrode can be set to two states, that is, a state that is equal to or higher than the threshold value of the field-effect transistor and a state that is lower than the threshold value. This makes it possible to directly convert the difference in the current flowing through the memory cell to a voltage,
A storage element with high performance in terms of power consumption and operation speed can be realized. In particular, if the storage element according to the third aspect of the present invention is used, the potential of the gate electrode of the field-effect transistor can be reduced by combining the element with negative resistance even if a magnetoresistive element having a resistance change of several tens of percent is used. Can be changed into two states, a state of being equal to or more than the threshold value of the field effect transistor and a state of being less than the threshold value. Further, when the storage element according to the sixth aspect of the present invention is used, a storage element can be formed using a ferroelectric effect element instead of the magnetoresistance effect element. All of them can take a large signal amplitude, so that the operation margin is large, the stored contents can be easily read, and there is no fear of causing a malfunction.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS (Embodiment) The conventional method requires a step of once converting a difference in current flowing through a memory cell into a voltage. In order to eliminate this, it is necessary to directly output the memory contents as a voltage. FIG. 1 is a circuit diagram showing the concept. The TMR element 101 and the load element 102 are connected in series, and the storage node 106, which is the connection, is connected to the gate electrode of the field effect transistor 103.
The other terminal of load element 102 is connected to ground line 108, and the other terminal of TMR element 101 is connected to word line 107. When word line 107 is at 0V, storage node 1
The potential of 06 is also 0V. When a voltage is applied to the word line, a potential internally generated at the storage node 106 by the ratio of the resistance values of the TMR element 101 and the load element 102 is generated. When the resistance value of the TMR element 101 changes due to a current flowing through a TMR control line (not shown), the potential of the storage node 106 changes accordingly, and the source 104 and the drain 10 of the field-effect transistor 103 change.
The value of the current flowing between the five also changes. If the potential of the storage node 106 is larger than the threshold value Vt of the field effect transistor 103, a current flows between the source 104 and the drain 105,
If the potential of 6 is smaller than the threshold value Vt of the field effect transistor 103, no current flows between the source 104 and the drain 105. Therefore, if two states, that is, the case where the potential of the storage node 106 is higher than the threshold Vt of the transistor 103 and the case where the potential is lower than the threshold Vt of the transistor 103 can be created by the difference in the state of the TMR element, the ON / OFF of the field effect transistor 103 can be directly controlled. it can.
However, the resistance change of the TMR element is about 25%, and it is impossible to create the two states described above in which the potential of the storage node 106 is higher than the threshold Vt of the transistor 103 and lower. This will be described with reference to the drawings. FIG. 2 shows the characteristics of the TMR element 101 and the load element 102 when a fixed resistor is used as the load element 102, and the storage node 1
It shows the relationship between the potentials of FIG. For simplicity, the characteristics of each element are linearly approximated. Here, TMR element characteristics 1
11 is defined as ON when the resistance is low and OFF when the resistance is high, and is indicated by a solid line and a broken line, respectively. When the TMR element is ON, the potential of the storage node 106 is equal to the load element characteristic 112 and the TMR indicated by a solid line.
The potential V _{H at} the intersection with the element characteristics 111 is obtained. Similarly, when the TMR element is OFF, the potential of the storage node 106 becomes the load element characteristic 112
And the potential _{VL at} the intersection with the TMR element characteristic 111 indicated by the broken line.
As shown in FIG. 2, the difference between _VH and _VL is very small, and with such a difference, two states, that is, a case where the threshold value is larger than the threshold value Vt of the transistor 103 and a case where the threshold value is smaller, cannot be created. ON / OF of the field effect transistor 103 shown in FIG.
F cannot be controlled directly.

In order to increase the difference in the potential of the storage node 106, in addition to increasing the resistance change of the TMR element,
This can be realized by optimizing the characteristics of the load element. This will be described with reference to the drawings. FIG. 3 shows the relationship between the characteristics of the TMR element and the load element and the potential of the storage node when an improved load element having improved characteristics is used. The improved load element characteristics are represented by the low voltage portion at 122a and the high voltage portion at 122b. As in FIG.
Element characteristics 111 are ON when the resistance is low, and O when the resistance is high.
Defined as FF and shown by solid and broken lines, respectively. When the TMR element is OFF, the potential of the storage node 106 becomes the potential _{VL at} the intersection of the improved load element characteristic 122a and the TMR element characteristic 111 indicated by a broken line. Similarly, when the TMR element is ON, the potential of the storage node 106, a potential V _H at the intersection of the TMR element characteristic 111 shown by the improvement load element characteristics 122b and solid. As described above, when the improved load element is used, V _H is much larger than when the conventional fixed resistor is used.
And _VL can be obtained. When such a load element is used, two states can be created: a case where the potential of the storage node 106 is higher than the threshold Vt of the transistor 103 shown in FIG. 1 and a case where the potential is lower than the threshold Vt of the transistor 103 as a result. ON / OFF of 103 can be directly controlled.

The requirement of the improved load element is that the low voltage part
This is represented by 122a, and the high voltage portion is represented by 122b. Anything can be used as long as this property is satisfied. FIG. 4 shows an example. FIG. 4 shows a case where an NDR element having a negative resistance is used as a load element. NDR
The element can be formed using silicon, a compound semiconductor, or the like. As elements for expressing negative resistance,
A device using a band-to-band tunneling phenomenon such as an Ezaki diode (tunnel diode) or a device using a sub-band resonant tunneling phenomenon such as a resonant tunneling diode (RTD) can be used. In addition, it goes without saying that any other element can be used as long as a negative resistance can be obtained as a result using a surface level or the like.

In the case of the example shown in FIG. 4, the characteristic of the NDR element is 132
So that manifested as, in the following areas a voltage applied to both ends of the element is V _P, who applied voltage is large current flows more. However, V _V in voltage applied to both ends of the element is V _P or
In the following regions, the larger the applied voltage, the smaller the flowing current. Furthermore, in a region where the voltage applied to both ends of the element is increased and V _V or more, the larger the applied voltage, the more current flows. Where TMR element characteristics 1
11 is defined as ON when the resistance is low, and OFF when the resistance is high, and is indicated by a solid line and a broken line, respectively. When the TMR element is OFF, the potential of the storage node 106 becomes the potential _{VL at} the intersection of the NDR element characteristic 132 and the TMR element characteristic 111 indicated by a broken line. Similarly, TMR element is ON
Of time, the potential of the storage node 106, a potential V _H at the intersection of the TMR element characteristic 111 shown by the NDR device characteristics 132 and the solid line. By using an NDR element in this way, it is possible to obtain a much larger difference between _VH and _VL than when using a conventional fixed resistor. Therefore, with the use of the NDR element, two states can be created: a case where the potential of the storage node 106 is larger than the threshold Vt of the transistor 103 shown in FIG. 1 and a case where the potential is smaller than the threshold Vt of the transistor 103 shown in FIG. ON / OFF can be directly controlled.

The results obtained when an interband tunnel diode (IBTD element) using silicon is used as the NDR element will be described with reference to FIGS. FIG. 5 shows a circuit diagram of a memory element when an IBTD element is used as a load. FIG. 6 shows the relationship between the characteristics of the TMR element and the IBTD element constituting the circuit and the potential of the storage node. In FIG. 5, a TMR element 201 and an IBTD element 202 are connected in series, and a storage node 206 as a connection portion thereof is connected to a gate electrode of a field effect transistor 203. The other terminal of the load element 202 is connected to the ground line 208, and the other terminal of the TMR element 201 is connected to the word line 207.
It is connected to the. When the word line 207 is at 0V, the potential of the storage node 206 is also at 0V. When a voltage of 0.6 V is applied to the word line 207, when the resistance of the TMR element 201 is high and in an OFF state, the characteristics of the TMR element are indicated by broken lines, and the voltage of the storage node 206 is about 0.03 V. On the other hand, the resistance of the TMR element 201 is low.
When in the ON state, the characteristics of the TMR element are shown by solid lines,
Storage node 206 will be at about 0.42V. Therefore, the potential difference of the storage node 206 when the resistance of the TMR element 201 is low and when it is high is
0.39V. The threshold value Vt of the field effect transistor 203 is set to 0.
If designed to about 2V, the resistance of TMR element 201 is high and OFF
In this state, the potential of the storage node 206 becomes smaller than the threshold value Vt of the field effect transistor 203, and no current flows between the source 204 and the drain 205. On the other hand, when the resistance of the TMR element 201 is low and in the ON state, the potential of the storage node 206 becomes higher than the threshold value Vt of the field effect transistor 203, and a current flows between the source 204 and the drain 205. Therefore, TMR
Due to the difference between the states of the elements, two states can be created: a case where the potential of the storage node 206 is larger than a threshold Vt of the transistor 203 and a case where the potential is smaller than the threshold Vt of the transistor 203, and the ON / OFF of the field effect transistor 203 can be directly controlled. . When a fixed resistor is used as the load element, as shown in FIG. 6, when the TMR element 201 is off, the voltage of the storage node 206 is about 0.25 V, and when the TMR element 201 is on, the voltage of the storage node 206 is about 0.33 V. The potential difference of the storage node 206 when the TMR element 201 is ON / OFF is
There is only 0.08V. Therefore, by using an IBTD element as the load element, it is possible to increase the potential difference nearly five times, and to achieve high performance. A storage element can be realized.

On the other hand, FIG.
Instead of the TMR element described above, another element can be used. For example, a similar function can be realized by an element that causes a resistance change using a ferroelectric film. FIG. 7 shows a structural diagram of an element that causes a resistance change using a ferroelectric film. An insulating film 302 is provided on the semiconductor resistance layer 301a, and a ferroelectric film 303 is provided thereon. Further, a metal electrode 304 is provided thereabove. Metal electrodes 305a and 305b are provided at both ends of each of the semiconductor resistance layers 301a. When a voltage is applied between one of the metal electrode 305a or the metal electrode 305b and the metal electrode 304, polarization occurs in the ferroelectric film 303, and the polarization is not erased even after removing the applied voltage. At this time,
A semiconductor depletion layer 301b is generated between the semiconductor resistance layer 301a and the insulating film 302 according to the polarization in the ferroelectric film 303. The semiconductor depletion layer 301b has a very high resistance to majority carriers in the semiconductor resistance layer 301a. Therefore, when a voltage is applied between the metal electrode 305a and the metal electrode 305b, almost no current flows through the semiconductor depletion layer 301b,
It flows only within 1a. Therefore, the resistance between the metal electrode 305a and the metal electrode 305b increases as the thickness of the semiconductor depletion layer 301b increases. Conversely, when a reverse voltage is applied between one of the metal electrode 305a or the metal electrode 305b and the metal electrode 304, a reverse polarization occurs in the ferroelectric film 303. In this case, after removing the applied voltage, But this polarization is not erased. In this case, although polarization occurs in the ferroelectric film 303, the semiconductor resistance layer 3
No semiconductor depletion layer 301b is formed between 01a and the insulating film 302. Therefore, when a voltage is applied between the metal electrode 305a and the metal electrode 305b, a large current flows through the semiconductor resistance layer 301a,
Resistance decreases. Thus, the resistance between the metal electrode 305a and the metal electrode 305b can be changed according to the polarization direction of the ferroelectric film 303. Metal electrode 305a and metal electrode 305b
Is approximately inversely proportional to the width of the semiconductor resistance layer 301a. Therefore, when the case where there is no depletion layer and the case where the semiconductor depletion layer 301b occupies half the width of the semiconductor resistance layer 301a are compared, the resistance becomes a ratio of 1: 2. Therefore, this element is shown in FIG.
The same function can be realized by using the TMR element 201 instead of the TMR element 201. FIG. 8 shows an example of the storage element formed in this manner. Since the function is the same as that of the storage element shown in FIG. 5, detailed description is omitted, but the ferroelectric resistance element which is a variable resistance element by ferroelectric polarization described above.
Using 510, the metal electrode 305a and the metal electrode 305b of FIG. 7 are connected to the word line 507 and the storage node 506, respectively. The metal electrode 304 in FIG. 7 is connected to the rewrite electrode 511. As described above, a voltage is applied to the word line 507 when reading the stored content, and when updating the stored content, the rewriting electrode 511 is used to change the polarization direction of the ferroelectric and to change the resistance value of the ferroelectric resistance element. change.
Thus, a storage element can be realized.

[0015]

As described above, according to the present invention,
By skillfully combining a variable resistance element and a negative resistance element, it is possible to directly convert the difference in current flowing through a memory cell into a voltage, and to realize a high-performance storage element in terms of power consumption and operation speed. be able to. Especially, tens of percent
Even if a magnetoresistive element or a ferroelectric effect element having a change in resistance is used as a variable resistance element, the potential of the gate electrode of the field effect transistor is equal to or higher than the threshold value of the field effect transistor by combining the element with a negative resistance. State and a state below the threshold value. Since all of these storage elements can have a large signal amplitude, the operation margin is large, the stored contents can be easily read, and there is no fear of causing a malfunction.

[Brief description of the drawings]

FIG. 1 is a configuration diagram of a storage element of the present invention.

FIG. 2 is a characteristic diagram of an element element constituting a conventional storage element and a storage element;

FIG. 3 is a diagram showing the necessary requirements of the characteristics of the element elements constituting the storage element of the present invention and the characteristics of the storage element

FIG. 4 is a characteristic diagram of an element element and a storage element constituting the storage element of the present invention.

FIG. 5 is a configuration diagram of a storage element of the present invention.

FIG. 6 is a characteristic diagram of an element element constituting the storage element of the present invention and the storage element;

FIG. 7 is a configuration diagram of an element element constituting a storage element of the present invention.

FIG. 8 is a configuration diagram of a storage element of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 TMR element 102 Load element 103 Field effect transistor 104 Source 105 Drain 106 Storage node 107 Word line 108 Ground line

──────────────────────────────────────────────────の Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 43/08 H01L 43/08 Z A (72) Inventor Kenji Iijima 1006 Kadoma, Kazuma, Kazuma, Osaka Matsushita Electric Within Sangyo Co., Ltd. (72) Takashi Otsuka 1006 Odakadoma, Kadoma-shi, Osaka Matsushita Electric Industrial Co., Ltd. F-term (reference) 5F083 FR00 FZ10 JA21

Claims (9)

[Claims] A first resistive element, a second resistive element,
A storage element including a field-effect transistor, wherein the first resistance element and the second resistance element are connected in series, and a connection portion is connected to a gate electrode of the field-effect transistor. A storage element characterized by the above-mentioned. 2. A first resistance element, a second resistance element,
A storage element including a field-effect transistor, wherein the first resistance element and the second resistance element are connected in series, and a connection portion is connected to a gate electrode of the field-effect transistor. And a magnetoresistive element using a magnetoresistive element for at least one of the first resistance element and the second resistance element. 3. The method according to claim 1, wherein an element using a magnetoresistive element is used for one of the first resistance element and the second resistance element, and an element having negative resistance is used for the other. The magnetoresistive storage element according to claim 2. 4. The magnetoresistive effect according to claim 3, wherein the element having a negative resistance uses at least one of an interband tunnel effect, a resonant tunnel effect, and a single electron tunnel effect as an operation principle. Type storage element. 5. The magnetoresistive storage element according to claim 3, wherein a silicon material is used as the element having negative resistance. 6. A first resistance element, a second resistance element,
A storage element including a field-effect transistor, wherein the first resistance element and the second resistance element are connected in series, and a connection portion is connected to a gate electrode of the field-effect transistor. Providing an insulating film on at least one side surface of the semiconductor thin film, providing metal electrodes on the other two side surfaces, further providing a ferroelectric film above the insulating film, and providing a metal electrode above the ferroelectric film. A ferroelectric effect type storage element, wherein the element provided with is used as at least one of a first resistance element and a second resistance element. 7. A method of using an element using a ferroelectric effect element for one of the first resistance element and the second resistance element and using an element having a negative resistance for the other. 7. The ferroelectric effect type storage element according to claim 6, wherein: 8. The ferroelectric element according to claim 7, wherein the element having negative resistance uses at least one of an inter-band tunnel effect, a resonant tunnel effect, and a single electron tunnel effect as an operation principle. Body effect type memory element. 9. The ferroelectric effect type memory element according to claim 7, wherein a silicon material is used as the element having a negative resistance.