JP2001236245A - 異なる命令セットフィールドに固有のハードウエアでの実行時にエミュレートされた命令セットのトレースを再生成するための方法および装置 - Google Patents

異なる命令セットフィールドに固有のハードウエアでの実行時にエミュレートされた命令セットのトレースを再生成するための方法および装置

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Publication number
JP2001236245A
JP2001236245A JP2001041238A JP2001041238A JP2001236245A JP 2001236245 A JP2001236245 A JP 2001236245A JP 2001041238 A JP2001041238 A JP 2001041238A JP 2001041238 A JP2001041238 A JP 2001041238A JP 2001236245 A JP2001236245 A JP 2001236245A
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JP
Japan
Prior art keywords
instruction
etb
information
mode
instructions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2001041238A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001236245A5 (enExample
Inventor
Dua Anui
アヌイ・デュア
Russell C Brockmann
ラッセル・クラレンス・ブロックマン
Rohana Fernand Sushisu
スシス・ロハナ・フェルナンド
Kevin David Safford
ケビン・デイビッド・サフォード
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Intel Corp
Original Assignee
Intel Corp
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp, Hewlett Packard Co filed Critical Intel Corp
Publication of JP2001236245A publication Critical patent/JP2001236245A/ja
Publication of JP2001236245A5 publication Critical patent/JP2001236245A5/ja
Ceased legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/36—Prevention of errors by analysis, debugging or testing of software
    • G06F11/362—Debugging of software
    • G06F11/3636—Debugging of software by tracing the execution of the program

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP2001041238A 2000-02-18 2001-02-19 異なる命令セットフィールドに固有のハードウエアでの実行時にエミュレートされた命令セットのトレースを再生成するための方法および装置 Ceased JP2001236245A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/506774 2000-02-18
US09/506,774 US6609247B1 (en) 2000-02-18 2000-02-18 Method and apparatus for re-creating the trace of an emulated instruction set when executed on hardware native to a different instruction set field

Publications (2)

Publication Number Publication Date
JP2001236245A true JP2001236245A (ja) 2001-08-31
JP2001236245A5 JP2001236245A5 (enExample) 2005-08-11

Family

ID=24015959

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001041238A Ceased JP2001236245A (ja) 2000-02-18 2001-02-19 異なる命令セットフィールドに固有のハードウエアでの実行時にエミュレートされた命令セットのトレースを再生成するための方法および装置

Country Status (2)

Country Link
US (1) US6609247B1 (enExample)
JP (1) JP2001236245A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013058217A (ja) * 2006-08-09 2013-03-28 Qualcomm Inc プロセッサ命令セット動作モードを比較するデバッグ回路

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US7100152B1 (en) * 2000-01-31 2006-08-29 Freescale Semiconductor, Inc. Software analysis system having an apparatus for selectively collecting analysis data from a target system executing software instrumented with tag statements and method for use thereof
US6895508B1 (en) * 2000-09-07 2005-05-17 International Business Machines Corporation Stack memory protection
US6760864B2 (en) * 2001-02-21 2004-07-06 Freescale Semiconductor, Inc. Data processing system with on-chip FIFO for storing debug information and method therefor
JP2003296136A (ja) * 2002-04-04 2003-10-17 Mitsubishi Electric Corp トレース装置
US7747989B1 (en) 2002-08-12 2010-06-29 Mips Technologies, Inc. Virtual machine coprocessor facilitating dynamic compilation
US6901581B1 (en) * 2002-10-02 2005-05-31 Eridon Corporation Method for software debugging via simulated re-execution of a computer program
US20040139305A1 (en) * 2003-01-09 2004-07-15 International Business Machines Corporation Hardware-enabled instruction tracing
US7971191B2 (en) * 2004-06-10 2011-06-28 Hewlett-Packard Development Company, L.P. System and method for analyzing a process
US8136096B1 (en) 2004-07-23 2012-03-13 Green Hills Software, Inc. Backward post-execution software debugger
US8132159B1 (en) 2004-07-23 2012-03-06 Green Hills Software, Inc. Post-execution software debugger with event display
US8271955B1 (en) 2004-07-23 2012-09-18 Green Hille Software, Inc. Forward post-execution software debugger
FR2882832A1 (fr) * 2005-03-04 2006-09-08 St Microelectronics Sa Dispositif de generation de suivi de branchement pour microprocesseur et microprocesseur dote d'un tel dispositif
US7747844B2 (en) * 2005-03-31 2010-06-29 Hewlett-Packard Development Company, L.P. Acquiring instruction addresses associated with performance monitoring events
US8261130B2 (en) * 2007-03-02 2012-09-04 Infineon Technologies Ag Program code trace signature
US7930165B2 (en) * 2008-02-07 2011-04-19 Accemic Gmbh & Co. Kg Procedure and device for emulating a programmable unit providing system integrity control
US8423968B2 (en) * 2008-02-11 2013-04-16 International Business Machines Corporation Template-based vertical microcode instruction trace generation
US11093843B2 (en) * 2017-11-29 2021-08-17 Adobe Inc. Self-trained content management system for automatically classifying execution modes for user requests
US11550580B2 (en) * 2021-02-24 2023-01-10 Northrop Grumman Systems Corporation Systems and methods for emulating a processor

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US5751942A (en) * 1993-06-30 1998-05-12 Intel Corporation Trace event detection during trace enable transitions
US5860017A (en) * 1996-06-28 1999-01-12 Intel Corporation Processor and method for speculatively executing instructions from multiple instruction streams indicated by a branch instruction
US5859999A (en) * 1996-10-03 1999-01-12 Idea Corporation System for restoring predicate registers via a mask having at least a single bit corresponding to a plurality of registers
US5944841A (en) * 1997-04-15 1999-08-31 Advanced Micro Devices, Inc. Microprocessor with built-in instruction tracing capability
US6182210B1 (en) * 1997-12-16 2001-01-30 Intel Corporation Processor having multiple program counters and trace buffers outside an execution pipeline
US6240509B1 (en) * 1997-12-16 2001-05-29 Intel Corporation Out-of-pipeline trace buffer for holding instructions that may be re-executed following misspeculation
US6463522B1 (en) * 1997-12-16 2002-10-08 Intel Corporation Memory system for ordering load and store instructions in a processor that performs multithread execution
US6145123A (en) * 1998-07-01 2000-11-07 Advanced Micro Devices, Inc. Trace on/off with breakpoint register
JP3277900B2 (ja) * 1998-09-30 2002-04-22 日本電気株式会社 プログラム検査方法、プログラム検査装置及び、検査プログラムを記憶したコンピュータ読み取り可能な記憶媒体
US6163764A (en) * 1998-10-12 2000-12-19 Intel Corporation Emulation of an instruction set on an instruction set architecture transition
US6470408B1 (en) * 1999-04-14 2002-10-22 Hewlett-Packard Company Apparatus and method for delivering interrupts via an APIC bus to IA-32 processors
US6496925B1 (en) * 1999-12-09 2002-12-17 Intel Corporation Method and apparatus for processing an event occurrence within a multithreaded processor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013058217A (ja) * 2006-08-09 2013-03-28 Qualcomm Inc プロセッサ命令セット動作モードを比較するデバッグ回路

Also Published As

Publication number Publication date
US6609247B1 (en) 2003-08-19

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