JP2001230150A - Laminated ceramic capacitor and method of manufacturing it - Google Patents
Laminated ceramic capacitor and method of manufacturing itInfo
- Publication number
- JP2001230150A JP2001230150A JP2000037545A JP2000037545A JP2001230150A JP 2001230150 A JP2001230150 A JP 2001230150A JP 2000037545 A JP2000037545 A JP 2000037545A JP 2000037545 A JP2000037545 A JP 2000037545A JP 2001230150 A JP2001230150 A JP 2001230150A
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- JP
- Japan
- Prior art keywords
- raw material
- ceramic
- ceramic capacitor
- additive element
- multilayer ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Compositions Of Oxide Ceramics (AREA)
- Ceramic Capacitors (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】この発明は、誘電体層を形成
しているセラミック粒子の電気抵抗を増大させることに
より寿命特性を向上させ、薄層化・多層化により小型大
容量化を更に進展させた積層セラミックコンデンサとそ
の製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention is to improve the life characteristics by increasing the electric resistance of ceramic particles forming a dielectric layer, and to further advance the miniaturization and large capacity by thinning and multilayering. And a method for manufacturing the same.
【0002】[0002]
【従来の技術】一般に、積層セラミックコンデンサはチ
ップ状の素体と、該素体の両端部に形成された一対の外
部電極とからなる。該素体は一般に誘電体層と内部電極
とが交互に多数層積層された積層体からなる。該内部電
極のうち、隣り合う内部電極は誘電体層を介して対向
し、別々の外部電極と電気的に接続されている。2. Description of the Related Art In general, a multilayer ceramic capacitor comprises a chip-shaped body and a pair of external electrodes formed at both ends of the body. The element body generally comprises a laminate in which a large number of dielectric layers and internal electrodes are alternately laminated. Among the internal electrodes, adjacent internal electrodes face each other via a dielectric layer and are electrically connected to different external electrodes.
【0003】ここで、積層セラミックコンデンサの温度
特性が、JIS規格のB特性の場合、前記誘電体層とし
ては、例えばチタン酸バリウムを主成分とし、これに希
土類元素の酸化物やMn,V,Cr,Mo,Fe,N
i,Cu,Co等のアクセプタ型元素の化合物を添加し
た、耐還元性セラミック組成物が使用されている。ま
た、前記内部電極としては、例えばNi金属粉末を主成
分とする導電性ペーストを焼結させたものが使用されて
いる。Here, when the temperature characteristic of the multilayer ceramic capacitor is the B characteristic of the JIS standard, the dielectric layer contains, for example, barium titanate as a main component and a rare earth element oxide, Mn, V, Cr, Mo, Fe, N
A reduction-resistant ceramic composition to which a compound of an acceptor element such as i, Cu, or Co is added is used. As the internal electrode, for example, a material obtained by sintering a conductive paste containing Ni metal powder as a main component is used.
【0004】前記素体は、セラミックグリーンシートと
内部電極パターンとを交互に一体的に積層させたチップ
状の積層体を脱バインダした後、非酸化性雰囲気中にお
いて1200〜1300℃程度の高温で焼成し、その
後、酸化性雰囲気中で再酸化させることにより製造され
ている。[0004] After removing a chip-shaped laminate in which ceramic green sheets and internal electrode patterns are alternately and integrally laminated, the element body is heated at a high temperature of about 1200 to 1300 ° C in a non-oxidizing atmosphere. It is manufactured by firing and then reoxidizing in an oxidizing atmosphere.
【0005】[0005]
【発明が解決しようとする課題】ところで、近年におけ
る電子回路の小型化、高密度化の流れに伴い、積層セラ
ミックコンデンサについても小型大容量化が求められ、
小型大容量化のために誘電体層の積層数の更なる増加
と、誘電体層の更なる薄層化が進んでいる。With the recent trend of miniaturization and high density of electronic circuits, multilayer ceramic capacitors are also required to have a small size and a large capacity.
To increase the size and the capacity, the number of stacked dielectric layers is further increased, and the thickness of the dielectric layers is further reduced.
【0006】しかし、誘電体層を薄層化させると、1層
当たりの電界強度が大きくなり、内部電極間で絶縁破壊
が生じ易くなり、積層セラミックコンデンサの寿命が短
くなるという問題があった。However, when the thickness of the dielectric layer is reduced, the electric field strength per layer is increased, dielectric breakdown is likely to occur between the internal electrodes, and the life of the multilayer ceramic capacitor is shortened.
【0007】この発明は、誘電体層を多層化・薄層化し
ても絶縁破壊等に起因する寿命の低下がない、小型大容
量化が可能な積層セラミックコンデンサとその製造方法
を提供することを目的とする。An object of the present invention is to provide a multilayer ceramic capacitor capable of achieving a small size and a large capacity without a decrease in life due to dielectric breakdown or the like even when the dielectric layers are multilayered and thinned, and a method of manufacturing the same. Aim.
【0008】[0008]
【課題を解決するための手段】この発明に係る積層セラ
ミックコンデンサは、複数の誘電体層と複数の内部電極
とを一体的に積層してなり、該誘電体層はセラミック粒
子の焼結体からなり、該セラミック粒子は、結晶性のコ
ア部と、該コア部を囲繞するシェル部とからなり、該コ
ア部には添加物元素が濃度勾配(濃度分布)を有して含
まれているものである。A multilayer ceramic capacitor according to the present invention is formed by integrally laminating a plurality of dielectric layers and a plurality of internal electrodes, and the dielectric layer is made of a sintered body of ceramic particles. The ceramic particles comprise a crystalline core portion and a shell portion surrounding the core portion, wherein the core portion contains an additive element with a concentration gradient (concentration distribution). It is.
【0009】ここで、前記コア部に含まれる添加物元素
の濃度は、該コア部の中心から前記シェル部に向かって
高くなっている。Here, the concentration of the additive element contained in the core part increases from the center of the core part toward the shell part.
【0010】また、前記セラミック粒子はチタン酸バリ
ウム系のセラミック組成物、チタン酸ストロンチウム系
のセラミック組成物、鉛系のセラミック組成物のいずれ
のでもよい。また、このセラミック組成物としては、特
に、積層セラミックコンデンサの容量温度特性がJIS
規格のB特性を満足するセラミック組成物が好ましい。The ceramic particles may be any of a barium titanate-based ceramic composition, a strontium titanate-based ceramic composition, and a lead-based ceramic composition. In addition, as for this ceramic composition, particularly, the capacitance-temperature characteristic of the multilayer ceramic capacitor is JIS.
A ceramic composition that satisfies standard B characteristics is preferred.
【0011】また、前記添加物元素としてはMn,V,
Cr,Mo,Fe,Ni,Cu及びCoから選択された
1種又は2種以上の元素が好ましい。また、前記添加物
元素は前記コア部中に10〜1000ppmの範囲で含
まれているのが好ましい。添加物元素が10ppm未満
では寿命の増加が期待できず、1000ppmを越える
と所望の誘電率が得られなくなるからである。Further, Mn, V,
One or more elements selected from Cr, Mo, Fe, Ni, Cu and Co are preferred. Preferably, the additive element is contained in the core portion in a range of 10 to 1000 ppm. If the amount of the additive element is less than 10 ppm, an increase in the life cannot be expected, and if it exceeds 1000 ppm, a desired dielectric constant cannot be obtained.
【0012】また、内部電極の材料はNiを主成分とす
るものに限らず、Pd、Ag−Pd等を主成分とするも
のを使用してもよい。また、前記シェル部には、Ho,
Sc,Y,Gd,Dy,Er,Yb,Tb,Tm及びL
uから選択された1種又は2種以上の希土類元素、Mg
及びBaSiO3を含ませてもよい。また、前記シェル
部にMn,V,Cr,Mo,Fe,Ni,Cu,Co,
P,Nb,Taを微量含ませてもよい。更に、前記セラ
ミック粒子の粒界はガラス成分で埋めるようにしてもよ
い。The material of the internal electrode is not limited to a material containing Ni as a main component, but may be a material containing Pd, Ag-Pd or the like as a main component. In addition, Ho,
Sc, Y, Gd, Dy, Er, Yb, Tb, Tm and L
one or more rare earth elements selected from u, Mg
And BaSiO 3 may be included. Further, Mn, V, Cr, Mo, Fe, Ni, Cu, Co,
A small amount of P, Nb, Ta may be contained. Further, the grain boundaries of the ceramic particles may be filled with a glass component.
【0013】また、この発明に係る積層セラミックコン
デンサの製造方法は、セラミック原料を調製する原料調
製工程と、該原料調製工程で得られたセラミック原料を
用いてセラミックグリーンシートを形成するシート形成
工程と、該シート形成工程で得られたセラミックグリー
ンシートに内部電極パターンを印刷する印刷工程と、該
印刷工程を経たセラミックグリーンシートを積層して積
層体を得る積層工程と、該積層工程で得られた積層体を
内部電極パターン毎に裁断してチップ状の積層体を得る
裁断工程と、該裁断工程で得られたチップ状の積層体を
焼成する焼成工程とを備えている。Further, the method for manufacturing a multilayer ceramic capacitor according to the present invention includes a raw material preparing step of preparing a ceramic raw material, and a sheet forming step of forming a ceramic green sheet using the ceramic raw material obtained in the raw material preparing step. A printing step of printing an internal electrode pattern on the ceramic green sheet obtained in the sheet forming step, a laminating step of laminating the ceramic green sheets having undergone the printing step to obtain a laminate, and a laminating step obtained by the laminating step. The method includes a cutting step of cutting the laminate for each internal electrode pattern to obtain a chip-shaped laminate, and a firing step of firing the chip-shaped laminate obtained in the cutting step.
【0014】そして、前記原料調製工程は、前記セラミ
ック原料の主成分化合物の結晶構造中に添加物元素を含
有させる工程を有している。前記セラミック原料の主成
分化合物の結晶構造中に添加物元素を含有させる工程
は、前記セラミック原料の主成分化合物の原料化合物に
添加物元素の化合物を混合して該主成分化合物を合成す
る工程でもよいし、前記セラミック原料の主成分化合物
に添加物元素の化合物を混合して仮焼する工程でもよ
い。The raw material preparation step includes a step of adding an additive element to the crystal structure of the main component compound of the ceramic raw material. The step of allowing the additive element to be contained in the crystal structure of the main component compound of the ceramic raw material is also a step of mixing the additive element compound with the raw material compound of the main component compound of the ceramic raw material to synthesize the main component compound. Alternatively, a step of mixing the compound of the additive element with the main component compound of the ceramic raw material and calcining the mixture may be used.
【0015】ここで、前記セラミック原料はチタン酸バ
リウム系の材料、チタン酸ストロンチウム系の材料、鉛
系の材料のいずれでもよい。また、前記添加物元素はM
n,V,Cr,Mo,Fe,Ni,Cu及びCoから選
択された1種又は2種以上の元素が好ましい。The ceramic raw material may be any of a barium titanate-based material, a strontium titanate-based material, and a lead-based material. The additive element is M
One or more elements selected from n, V, Cr, Mo, Fe, Ni, Cu and Co are preferred.
【0016】また、前記添加物元素は前記セラミック原
料の主成分化合物中に10〜1000ppmの範囲で含
まれているのが好ましい。添加物元素が10ppm未満
では寿命の増加が期待できず、1000ppmを越える
と所望の誘電率が得られなくなるからである。It is preferable that the additive element is contained in the main component compound of the ceramic raw material in an amount of 10 to 1000 ppm. If the amount of the additive element is less than 10 ppm, an increase in the life cannot be expected, and if it exceeds 1000 ppm, a desired dielectric constant cannot be obtained.
【0017】また、前記原料調製工程において、セラミ
ック原料中にはHo,Sc,Y,Gd,Dy,Er,Y
b,Tb,Tm及びLuから選択された1種又は2種以
上の希土類元素の化合物及びMgOを加えてもよい。ま
た、前記セラミック原料中にMn,V,Cr,Mo,F
e,Ni,Cu,Co,P,Nb,Taの化合物を微量
加えてもよい。更に、前記セラミック原料中にガラス成
分(Li,B,Si等)を焼結助剤として加えてもよ
い。In the raw material preparation step, Ho, Sc, Y, Gd, Dy, Er, Y
A compound of one or more rare earth elements selected from b, Tb, Tm and Lu and MgO may be added. Further, Mn, V, Cr, Mo, F
A small amount of a compound of e, Ni, Cu, Co, P, Nb, and Ta may be added. Further, a glass component (Li, B, Si, etc.) may be added to the ceramic raw material as a sintering aid.
【0018】また、前記焼成工程は、前記チップ状の積
層体を非酸化性雰囲気中で焼成し、その後、酸化性雰囲
気中で焼成する再酸化工程を有していてもよい。また、
内部電極を形成する導電性ペーストは、Niを主成分と
するものに限らず、Pd、Ag−Pd等を主成分とする
ものを使用してもよい。Further, the firing step may include a reoxidation step of firing the chip-shaped laminate in a non-oxidizing atmosphere and thereafter firing in an oxidizing atmosphere. Also,
The conductive paste for forming the internal electrodes is not limited to one containing Ni as a main component, and may be one containing Pd, Ag-Pd, or the like as a main component.
【0019】[0019]
【実施例】まず、等モル量のBaCO3とTiO3を各
々秤量し、これらにMn,V,Cr,Moのいずれかの
化合物を10〜2000ppmの範囲で添加し、十分に
混合した後、200℃で2時間仮焼した。BaCO3と
TiO3はこの仮焼により反応し、10〜2000pp
mのMn,V,Cr,Moのいずれかを含むBaTiO
3が形成された。EXAMPLE First, equimolar amounts of BaCO 3 and TiO 3 were each weighed, and any one of Mn, V, Cr, and Mo was added thereto in the range of 10 to 2000 ppm, and mixed well. Calcination was performed at 200 ° C. for 2 hours. BaCO 3 and TiO 3 react by this calcination, and 10 to 2000 pp
BaTiO containing any of Mn, V, Cr and Mo
3 was formed.
【0020】次に、100モル部の前記BaTiO
3(微量のMnを含むもの)に対し、希土類元素(H
o,Sc,Y,Gd,Dy,Er,Yb,Tb,Tm,
Lu)の酸化物、MgO及びBaSiO3を、表1の試
料No.1〜11に示すように添加し、これらを十分に
混合し、1000℃で2時間仮焼した。Next, 100 mole parts of the BaTiO
3 (containing a trace amount of Mn), a rare earth element (H
o, Sc, Y, Gd, Dy, Er, Yb, Tb, Tm,
Lu) oxide, MgO and BaSiO 3 were prepared according to sample Nos. 1 to 11, were mixed well, and calcined at 1000 ° C. for 2 hours.
【0021】次に、これらに、アクリル酸エステルポリ
マー、グリセリン、縮合リン酸塩の水溶液からなる有機
バインダを15重量%、水を50重量%加え、これらを
ボールミルに入れ、充分に混合してセラミックスラリー
を得た。Next, 15% by weight of an organic binder composed of an aqueous solution of an acrylate polymer, glycerin and a condensed phosphate, and 50% by weight of water are added thereto, and these are put into a ball mill and mixed well to obtain a ceramic. Got a rally.
【0022】次に、上記セラミックスラリーを真空脱泡
機に入れて脱泡し、このセラミックスラリーをリバース
ロールコータに入れ、ここから得られる薄膜成形物を長
尺なポリエステルフィルム上に連続して受け取らせると
共に、同フィルム上でこれを100℃に加熱して乾燥さ
せ、厚さ約5μmで10cm角の正方形のセラミックグ
リーンシートを得た。Next, the ceramic slurry is placed in a vacuum defoaming machine to remove bubbles, and the ceramic slurry is placed in a reverse roll coater, and the thin film obtained therefrom is continuously received on a long polyester film. At the same time, the film was heated to 100 ° C. and dried on the same film to obtain a square ceramic green sheet having a thickness of about 5 μm and a square of 10 cm.
【0023】一方、平均粒径0.2μmのニッケル粉末
10gと、エチルセルロース0.9gをブチルカルビト
ール9.1gに溶解させたものとを撹拌機に入れ、10
時間撹拌することにより内部電極用の導電性ペーストを
得た。そして、この導電性ペーストを用い、長さ14m
m、幅7mmのパターンを50個有するスクリーンを介
して上記セラミックグリーンシートの片側に内部電極パ
ターンを印刷し、これを乾燥させた。On the other hand, 10 g of nickel powder having an average particle size of 0.2 μm and 0.9 g of ethyl cellulose dissolved in 9.1 g of butyl carbitol were placed in a stirrer.
By stirring for a time, a conductive paste for an internal electrode was obtained. Then, using this conductive paste, a length of 14 m
An internal electrode pattern was printed on one side of the ceramic green sheet through a screen having 50 m and 7 mm wide patterns, and this was dried.
【0024】次に、内部電極パターンを印刷したセラミ
ックグリーンシートを内部電極パターンを上にした状態
で11枚積層した。この際、隣接する上下のセラミック
グリーンシートにおいて、その印刷面が内部電極パター
ンの長手方向に約半分程ずれるように配置した。更に、
この積層物の上下両面に内部電極パターンを印刷してな
い保護層用のセラミックグリーンシートを200μmの
厚さで積層した。Next, eleven ceramic green sheets on which the internal electrode patterns were printed were laminated with the internal electrode patterns facing upward. At this time, the printed surfaces of the adjacent upper and lower ceramic green sheets were arranged so as to be shifted by about half in the longitudinal direction of the internal electrode pattern. Furthermore,
On the upper and lower surfaces of the laminate, ceramic green sheets for a protective layer on which no internal electrode pattern was printed were laminated with a thickness of 200 μm.
【0025】次に、この積層物を約50℃の温度で厚さ
方向に約40トンの荷重を加えて圧着させ、しかる後、
この積層物を内部電極パターン毎に格子状に裁断して、
3.2×1.6mmのチップ状の積層体を50個得た。Next, the laminate is pressed at a temperature of about 50 ° C. by applying a load of about 40 tons in a thickness direction, and thereafter,
This laminate is cut into a lattice shape for each internal electrode pattern,
Fifty 3.2 × 1.6 mm chip-shaped laminates were obtained.
【0026】次に、このチップ状の積層体を雰囲気焼成
が可能な炉に入れ、大気雰囲気中において100℃/h
の速度で600℃まで昇温させ、有機バインダを燃焼除
去させた。Next, this chip-shaped laminate is placed in a furnace capable of firing in an atmosphere, and is heated at 100 ° C./h in an air atmosphere.
The temperature was raised to 600 ° C. at a rate of to burn off the organic binder.
【0027】その後、炉の雰囲気を大気雰囲気からH2
(2体積%)+N2 (98体積%)の還元性雰囲気に
変えた。そして、炉をこの還元性雰囲気とした状態を保
って、積層体チップの加熱温度を600℃から焼結温度
の1130℃まで、100℃/hの速度で昇温して11
30℃(最高温度)を3時間保持した。After that, the atmosphere of the furnace was changed from the air atmosphere to H 2.
The atmosphere was changed to a reducing atmosphere of (2% by volume) + N 2 (98% by volume). Then, while keeping the furnace in the reducing atmosphere, the heating temperature of the laminated chip was raised from 600 ° C. to the sintering temperature of 1130 ° C. at a rate of 100 ° C./h, and 11
30 ° C. (maximum temperature) was maintained for 3 hours.
【0028】そして、100℃/hの速度で600℃ま
で降温し、雰囲気を大気雰囲気(酸化性雰囲気)におき
かえて、600℃を30分間保持して酸化処理を行い、
その後、室温まで冷却して積層セラミックコンデンサの
素体を得た。Then, the temperature is lowered to 600 ° C. at a rate of 100 ° C./h, the atmosphere is changed to the air atmosphere (oxidizing atmosphere), and the oxidation treatment is performed by maintaining the temperature at 600 ° C. for 30 minutes.
Thereafter, the resultant was cooled to room temperature to obtain a body of a multilayer ceramic capacitor.
【0029】次に、内部電極の端部が露出する素体の側
面に亜鉛とガラスフリット(glassfrit)とビヒクル(v
ehicle)とからなる導電性ペーストを塗布して乾燥し、
これを大気中で550℃の温度で15分間焼付け、亜鉛
電極層を形成し、更にこの上に無電解メッキ法で銅層を
形成し、更にこの上に電気メッキ法でPb−Sn半田層
を設けて、一対の外部電極を形成した。Next, zinc, glass frit and vehicle (v) are applied to the side surfaces of the element where the ends of the internal electrodes are exposed.
ehicle) and dried.
This is baked in the air at a temperature of 550 ° C. for 15 minutes to form a zinc electrode layer, a copper layer is further formed thereon by an electroless plating method, and a Pb—Sn solder layer is further formed thereon by an electroplating method. To form a pair of external electrodes.
【0030】そして、このようにして作成した積層セラ
ミックコンデンサの寿命と、誘電体層の誘電率を調べた
ところ、表1に示す通りであった。ここで、寿命は17
0℃、70Vの条件で求め、寿命の数値は試料No.1
の値を1とした場合の倍率で表した。なお、No.1,
9は比較例であり、No.1はMnを含有させない例、
No.9はMnを過剰に添加させた例である。The life of the multilayer ceramic capacitor thus manufactured and the dielectric constant of the dielectric layer were examined. The results are as shown in Table 1. Here, the life is 17
It was obtained under the conditions of 0 ° C. and 70 V. 1
Was expressed as a magnification when the value of was set to 1. In addition, No. 1,
No. 9 is a comparative example. 1 is an example not containing Mn,
No. 9 is an example in which Mn was excessively added.
【0031】[0031]
【表1】 [Table 1]
【0032】そして、このようにして作成した積層セラ
ミックコンデンサの誘電体層を形成しているセラミック
粒子をSTEM(分析電子顕微鏡)で分析したところ、
図1に示すように、Mnがコア部に存在していることが
確認された。なお、図1中、10はセラミック粒子、1
2はコア部、14はシェル部である。Then, the ceramic particles forming the dielectric layer of the multilayer ceramic capacitor thus produced were analyzed by STEM (analytical electron microscope).
As shown in FIG. 1, it was confirmed that Mn was present in the core. In addition, in FIG. 1, 10 is a ceramic particle, 1
2 is a core part and 14 is a shell part.
【0033】[0033]
【発明の効果】この発明は、誘電体層を形成しているセ
ラミック粒子のコア部にMn,V,Cr,Mo,Fe,
Ni,Cu,Co等のアクセプタ型の添加物元素が濃度
勾配を有して含まれているので、コア部の再酸化性が向
上し、コア部の電気抵抗が増大し、寿命特性、特に誘電
体層を薄層化させた時の寿命特性が向上し、薄層化・多
層化が可能になり、積層セラミックコンデンサの小型大
容量化が可能になるという効果がある。As described above, according to the present invention, Mn, V, Cr, Mo, Fe,
Since acceptor-type additive elements such as Ni, Cu, and Co are contained with a concentration gradient, the reoxidation property of the core part is improved, the electric resistance of the core part is increased, and the life characteristics, particularly, the dielectric properties are improved. The life characteristics when the body layer is thinned are improved, the thinning and the multi-layering become possible, and the multilayer ceramic capacitor can be reduced in size and capacity.
【図1】この発明に係る積層セラミックコンデンサの誘
電体層を形成しているセラミック粒子中に含まれるアク
セプタ型元素の濃度分布を示す説明図である。FIG. 1 is an explanatory diagram showing a concentration distribution of an acceptor element contained in ceramic particles forming a dielectric layer of a multilayer ceramic capacitor according to the present invention.
10 セラミック粒子 12 コア部 14 シェル部 Reference Signs List 10 ceramic particles 12 core part 14 shell part
───────────────────────────────────────────────────── フロントページの続き (72)発明者 岸 弘志 東京都台東区上野6丁目16番20号 太陽誘 電株式会社内 Fターム(参考) 5E001 AB03 AC04 AC09 AD03 AE00 AE01 AE02 AE03 AE04 AF00 AF06 AH01 AH05 AH06 AH09 AJ01 AJ02 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Hiroshi Kishi 6-16-20 Ueno, Taito-ku, Tokyo F-term in Taiyo Denki Co., Ltd. (reference) 5E001 AB03 AC04 AC09 AD03 AE00 AE01 AE02 AE03 AE04 AF00 AF06 AH01 AH05 AH06 AH09 AJ01 AJ02
Claims (16)
体的に積層してなり、該誘電体層はセラミック粒子の焼
結体からなり、該セラミック粒子は、結晶性のコア部
と、該コア部を囲繞するシェル部とからなり、該コア部
には添加物元素が濃度勾配(濃度分布)を有して含まれ
ていることを特徴とする積層セラミックコンデンサ。1. A plurality of dielectric layers and a plurality of internal electrodes are integrally laminated, wherein the dielectric layers are made of a sintered body of ceramic particles, and the ceramic particles are formed of a crystalline core portion. And a shell portion surrounding the core portion, wherein the core portion contains an additive element with a concentration gradient (concentration distribution).
が、該コア部の中心から前記シェル部に向かって高くな
っていることを特徴とする請求項1に記載の積層セラミ
ックコンデンサ。2. The multilayer ceramic capacitor according to claim 1, wherein the concentration of the additive element contained in the core increases from the center of the core toward the shell.
系の材料、チタン酸ストロンチウム系の材料又は鉛系の
材料からなることを特徴とする請求項1又は2に記載の
積層セラミックコンデンサ。3. The multilayer ceramic capacitor according to claim 1, wherein the ceramic particles are made of a barium titanate-based material, a strontium titanate-based material, or a lead-based material.
o,Fe,Ni,Cu及びCoから選択された1種又は
2種以上の元素からなることを特徴とする請求項1〜3
のいずれかに記載の積層セラミックコンデンサ。4. The method according to claim 1, wherein the additive element is Mn, V, Cr, M.
4. It is composed of one or more elements selected from o, Fe, Ni, Cu and Co.
The multilayer ceramic capacitor according to any one of the above.
1000ppmの範囲で含まれていることを特徴とする
請求項1〜4のいずれかに記載の積層セラミックコンデ
ンサ。5. The method according to claim 1, wherein the additive element is present in the core portion in an amount of 10 to 10.
The multilayer ceramic capacitor according to any one of claims 1 to 4, wherein the content is in a range of 1000 ppm.
d,Dy,Er,Yb,Tb,Tm及びLuから選択さ
れた1種又は2種以上の希土類元素及びMgが含まれて
いることを特徴とする請求項1〜5のいずれかに記載の
積層セラミックコンデンサ。6. Ho, Sc, Y, G
The lamination according to any one of claims 1 to 5, further comprising one or more rare earth elements selected from d, Dy, Er, Yb, Tb, Tm, and Lu, and Mg. Ceramic capacitors.
が埋めていることを特徴とする請求項1〜6のいずれか
に記載の積層セラミックコンデンサ。7. The multilayer ceramic capacitor according to claim 1, wherein a glass component fills a grain boundary of the ceramic particles.
と、該原料調製工程で得られたセラミック原料を用いて
セラミックグリーンシートを形成するシート形成工程
と、該シート形成工程で得られたセラミックグリーンシ
ートに内部電極パターンを印刷する印刷工程と、該印刷
工程を経たセラミックグリーンシートを積層して積層体
を得る積層工程と、該積層工程で得られた積層体を内部
電極パターン毎に裁断してチップ状の積層体を得る裁断
工程と、該裁断工程で得られたチップ状の積層体を焼成
する焼成工程とを備え、前記原料調製工程は、前記セラ
ミック原料の主成分化合物中に添加物元素を含有させる
工程を有していることを特徴とする積層セラミックコン
デンサの製造方法。8. A raw material preparing step for preparing a ceramic raw material, a sheet forming step for forming a ceramic green sheet using the ceramic raw material obtained in the raw material preparing step, and a ceramic green sheet obtained in the sheet forming step A printing step of printing an internal electrode pattern on the substrate, a laminating step of laminating the ceramic green sheets having undergone the printing step to obtain a laminated body, and cutting the laminated body obtained in the laminating step for each internal electrode pattern into chips. Cutting step of obtaining a chip-shaped laminate, and a firing step of firing the chip-shaped laminate obtained in the cutting step, wherein the raw material preparation step includes adding an additive element in a main component compound of the ceramic raw material. A method for producing a multilayer ceramic capacitor, characterized by comprising a step of containing.
添加物元素を含有させる工程が、前記セラミック原料の
主成分化合物の原料化合物に添加物元素の化合物を混合
して該主成分化合物を合成する工程からなることを特徴
とする請求項8に記載の積層セラミックコンデンサの製
造方法。9. The step of causing the additive element to be contained in the main component compound of the ceramic raw material, wherein the compound of the additive element is mixed with the raw material compound of the main component compound of the ceramic raw material to synthesize the main component compound. 9. The method for manufacturing a multilayer ceramic capacitor according to claim 8, comprising a step.
に添加物元素を含有させる工程が、前記セラミック原料
の主成分化合物に添加物元素の化合物を混合して仮焼す
る工程からなることを特徴とする請求項8に記載の積層
セラミックコンデンサの製造方法。10. The method according to claim 1, wherein the step of adding an additive element to the main component compound of the ceramic raw material comprises a step of mixing a compound of the additive element with the main component compound of the ceramic raw material and calcining. The method for manufacturing a multilayer ceramic capacitor according to claim 8.
ム系の材料、チタン酸ストロンチウム系の材料又は鉛系
の材料からなることを特徴とする請求項8〜10のいず
れかに記載の積層セラミックコンデンサの製造方法。11. The multilayer ceramic capacitor according to claim 8, wherein the ceramic raw material is made of a barium titanate-based material, a strontium titanate-based material, or a lead-based material. Method.
o,Fe,Ni,Cu及びCoから選択された1種又は
2種以上の元素からなることを特徴とする請求項8〜1
1のいずれかに記載の積層セラミックコンデンサの製造
方法。12. The method according to claim 12, wherein the additive element is Mn, V, Cr, M.
2. The semiconductor device according to claim 1, wherein the material is at least one element selected from the group consisting of o, Fe, Ni, Cu, and Co.
2. The method for manufacturing a multilayer ceramic capacitor according to any one of 1.
の主成分化合物中に10〜1000ppmの範囲で含ま
れていることを特徴とする請求項8〜12のいずれかに
記載の積層セラミックコンデンサの製造方法。13. The multilayer ceramic capacitor according to claim 8, wherein the additive element is contained in the main component compound of the ceramic raw material in a range of 10 to 1000 ppm. Method.
c,Y,Gd,Dy,Er,Yb,Tb,Tm及びLu
から選択された1種又は2種以上の希土類元素の化合物
及びMgOが含まれていることを特徴とする請求項8〜
13のいずれかに記載の積層セラミックコンデンサの製
造方法。14. Ho, S is contained in the ceramic raw material.
c, Y, Gd, Dy, Er, Yb, Tb, Tm and Lu
9. A compound comprising one or more rare earth elements selected from the group consisting of MgO and MgO.
14. The method for manufacturing a multilayer ceramic capacitor according to any one of 13.
体を非酸化性雰囲気中で焼成し、その後、酸化性雰囲気
中で焼成する再酸化工程を有していることを特徴とする
請求項8〜14のいずれかに記載の積層セラミックコン
デンサの製造方法。15. The method according to claim 1, wherein the firing step includes a re-oxidation step in which the chip-shaped laminate is fired in a non-oxidizing atmosphere and then fired in an oxidizing atmosphere. 15. The method for manufacturing a multilayer ceramic capacitor according to any one of 8 to 14.
まれていることを特徴とする請求項8〜15のいずれか
に記載の積層セラミックコンデンサの製造方法。16. The method according to claim 8, wherein the ceramic raw material contains a glass component.
Priority Applications (8)
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JP2000037545A JP3838845B2 (en) | 2000-02-16 | 2000-02-16 | Multilayer ceramic capacitor |
TW090103069A TW529047B (en) | 2000-02-16 | 2001-02-13 | Multilayer ceramic capacitor and method for the manufacture thereof |
KR1020010007056A KR100738760B1 (en) | 2000-02-16 | 2001-02-13 | A multi layer ceramic capacitor and a method of manufacturing thereof |
MYPI20010658A MY128378A (en) | 2000-02-16 | 2001-02-14 | Multilayer ceramic capacitor and method for the manufacture thereof |
CNB01103467XA CN1183561C (en) | 2000-02-16 | 2001-02-14 | Stacked ceramic capacitor and mfg. method thereof |
US09/785,064 US6614644B2 (en) | 2000-02-16 | 2001-02-15 | Multilayer ceramic capacitor and method for the manufacture thereof |
HK01108533A HK1037781A1 (en) | 2000-02-16 | 2001-12-05 | Laminate ceramic capacitor and the production thereof. |
US10/460,829 US6721167B2 (en) | 2000-02-16 | 2003-06-12 | Multilayer ceramic capacitor and method for the manufacture thereof |
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JP2000037545A JP3838845B2 (en) | 2000-02-16 | 2000-02-16 | Multilayer ceramic capacitor |
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