JP2001203139A5 - - Google Patents
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- JP2001203139A5 JP2001203139A5 JP2000010715A JP2000010715A JP2001203139A5 JP 2001203139 A5 JP2001203139 A5 JP 2001203139A5 JP 2000010715 A JP2000010715 A JP 2000010715A JP 2000010715 A JP2000010715 A JP 2000010715A JP 2001203139 A5 JP2001203139 A5 JP 2001203139A5
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- pattern
- resist film
- resist
- patterns
- exposure process
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- 238000000034 method Methods 0.000 claims 17
- 239000004065 semiconductor Substances 0.000 claims 13
- 230000000875 corresponding Effects 0.000 claims 10
- 238000000151 deposition Methods 0.000 claims 5
- 238000004519 manufacturing process Methods 0.000 claims 5
- 238000005530 etching Methods 0.000 claims 3
Claims (5)
（ｂ）前記レジスト膜に対して２枚のマスクを重ね合わせ露光する露光工程と、
（ｃ）前記露光工程後、前記レジスト膜に現像処理を施すことにより、前記レジスト膜に所望のレジストパターンを転写する現像工程とを有し、
前記露光工程は、
（b1）前記レジスト膜に対して、第１方向に延びる第１パターンを第１距離だけ隔てて複数配置した第１マスクを用いて第１露光処理を行う工程と、
（b2）前記レジスト膜に対して、前記第１方向に対して交差する第２方向に延びる第２パターンを前記第１距離よりも狭い第２距離だけ隔てて複数配置し、かつ、互いに隣接する前記第２パターンの一方に位相シフタを設けた第２マスクを用いて第２露光処理を行う工程とを有し、
前記所望のレジストパターンは、前記レジスト膜において、前記第１パターンおよび第２パターンに対応する第１レジスト部が残され、かつ、前記第１パターンおよび第２パターンに囲まれた領域に対応する第２レジスト部が除去されてなるパターンであることを特徴とする半導体装置の製造方法。(A) depositing a resist film on the semiconductor wafer;
(B) an exposure process in which two masks are superimposed and exposed on the resist film;
(C) after the exposure step, by developing the resist film, by transferring a desired resist pattern to the resist film,
The exposure step includes
(B1) performing a first exposure process on the resist film using a first mask in which a plurality of first patterns extending in a first direction are spaced apart by a first distance;
(B2) A plurality of second patterns extending in a second direction intersecting the first direction are arranged with a second distance narrower than the first distance and adjacent to the resist film. Performing a second exposure process using a second mask provided with a phase shifter on one of the second patterns,
The desired resist pattern is Oite the resist film, the first resist portion corresponding to the first pattern and second pattern are left, and, corresponding to the region surrounded by the first and second patterns A method of manufacturing a semiconductor device, wherein the pattern is formed by removing the second resist portion.
（ｂ）前記レジスト膜に対して２枚のマスクを重ね合わせ露光する露光工程と、
（ｃ）前記露光工程後、前記レジスト膜に現像処理を施すことにより、前記レジスト膜に所望のレジストパターンを転写する現像工程とを有し、
前記露光工程は、
（b1）前記レジスト膜に対して、第１方向に延びる第１パターンを第１距離だけ隔てて複数配置した第１マスクを用いて第１露光処理を行う工程と、
（b2）前記レジスト膜に対して、前記第１方向に対して交差する第２方向に延びる第２パターンを前記第１距離よりも狭い第２距離だけ隔てて複数配置し、かつ、互いに隣接する前記第２パターンの一方に位相シフタを設けた第２マスクを用いて第２露光処理を行う工程とを有し、
前記所望のレジストパターンは、前記レジスト膜において、前記第１パターンおよび第２パターンに対応する第１レジスト部が残され、かつ、前記第１パターンおよび第２パターンに囲まれた領域に対応する第２レジスト部が除去されてなるパターンであり、
前記第１マスクの第１パターンおよび前記第２マスクの第２パターンの各々において、互いの重なり領域の幅を、重ならない領域よりも細くしたことを特徴とする半導体装置の製造方法。(A) depositing a resist film on the semiconductor wafer;
(B) an exposure process in which two masks are superimposed and exposed on the resist film;
(C) after the exposure step, by developing the resist film, by transferring a desired resist pattern to the resist film,
The exposure step includes
(B1) performing a first exposure process on the resist film using a first mask in which a plurality of first patterns extending in a first direction are spaced apart by a first distance;
(B2) A plurality of second patterns extending in a second direction intersecting the first direction are arranged with a second distance narrower than the first distance and adjacent to the resist film. Performing a second exposure process using a second mask provided with a phase shifter on one of the second patterns,
The desired resist pattern is Oite the resist film, the first resist portion corresponding to the first pattern and second pattern are left, and, corresponding to the region surrounded by the first and second patterns A pattern obtained by removing the second resist portion,
A method for manufacturing a semiconductor device, characterized in that, in each of the first pattern of the first mask and the second pattern of the second mask, the width of the overlapping region is narrower than the region that does not overlap.
（ｂ）前記レジスト膜に対して２枚のマスクを重ね合わせ露光する露光工程と、
（ｃ）前記露光工程後、前記レジスト膜に現像処理を施すことにより、前記レジスト膜に所望のレジストパターンを転写する現像工程とを有し、
前記露光工程は、
（b1）前記レジスト膜に対して、第１方向およびこれに交差する第２方向に沿って所定の距離だけ隔てて複数配置された第３パターンを有し、かつ、互いに隣接する前記第３パターンの一方に位相シフタを設けた第１マスクを用いて第１露光処理を行う工程と、
（b2）前記レジスト膜に対して、前記第２方向に延びる第２パターンを、前記第１方向に沿って隣接する第３パターンの隣接間に配置されるように複数配置し、かつ、互いに隣接する前記第２パターンの一方に位相シフタを設けた第２マスクを用いて第２露光処理を行う工程とを有し、
前記所望のレジストパターンは、前記レジスト膜において、前記第２パターンおよび第３パターンに対応する第１レジスト部が残され、かつ、前記第２パターンおよび第３パターンに囲まれた領域に対応する第２レジスト部が除去されてなるパターンであることを特徴とする半導体装置の製造方法。(A) depositing a resist film on the semiconductor wafer;
(B) an exposure process in which two masks are superimposed and exposed on the resist film;
(C) after the exposure step, a development step of transferring a desired resist pattern to the resist film by performing a development process on the resist film;
The exposure step includes
(B1) The third patterns adjacent to each other having a plurality of third patterns arranged at a predetermined distance along the first direction and the second direction intersecting the first direction with respect to the resist film. Performing a first exposure process using a first mask provided with a phase shifter on one of the above,
(B2) A plurality of second patterns extending in the second direction are arranged with respect to the resist film so as to be arranged between adjacent third patterns along the first direction, and adjacent to each other. Performing a second exposure process using a second mask provided with a phase shifter on one of the second patterns.
The desired resist pattern, the resist film Oite, the first resist portion corresponding to the second pattern and third pattern are left, and, corresponding to the second pattern and the area surrounded by the third pattern A method of manufacturing a semiconductor device, wherein the pattern is formed by removing the second resist portion.
（ｂ）前記レジスト膜に対して２枚のマスクを重ね合わせ露光する露光工程と、
（ｃ）前記露光工程後、前記レジスト膜に現像処理を施すことにより、前記レジスト膜に所望のレジストパターンを転写する現像工程と、
（ｄ）前記所望のレジストパターンをエッチングマスクとして、前記半導体ウエハに孔パターンを形成する工程とを有し、
前記露光工程は、
（b1）前記レジスト膜に対して、第１方向に延びる第１パターンを第１距離だけ隔てて複数配置した第１マスクを用いて第１露光処理を行う工程と、
（b2）前記レジスト膜に対して、前記第１方向に対して交差する第２方向に延びる第２パターンを第２距離だけ隔てて複数配置した第２マスクを用いて第２露光処理を行う工程とを有し、
前記所望のレジストパターンは、前記レジスト膜において、前記第１パターン、第２パターンに対応し、かつ、前記第１パターンおよび第２パターンの交差部からの過剰露光により露光されたレジスト部が残され、それ以外の部分であって、前記第１パターンおよび第２パターンに囲まれた領域に対応するレジスト部が除去されたパターンからなることを特徴とする半導体装置の製造方法。(A) depositing a resist film on the semiconductor wafer;
(B) an exposure process in which two masks are superimposed and exposed on the resist film;
(C) after the exposure step, a development step of transferring a desired resist pattern to the resist film by performing development processing on the resist film;
(D) forming a hole pattern in the semiconductor wafer using the desired resist pattern as an etching mask,
The exposure step includes
(B1) performing a first exposure process on the resist film using a first mask in which a plurality of first patterns extending in a first direction are arranged at a first distance;
(B2) A step of performing a second exposure process on the resist film using a second mask in which a plurality of second patterns extending in a second direction intersecting the first direction are spaced apart by a second distance. And
The desired resist pattern is Oite the resist film, the first pattern, corresponding to the second pattern, and a resist portion which is exposed by excessive exposure from the intersection of the first and second patterns are A method of manufacturing a semiconductor device, comprising: a pattern which is left and other portions except for a resist portion corresponding to a region surrounded by the first pattern and the second pattern.
（ｂ）前記レジスト膜に対して２枚のマスクを重ね合わせ露光する露光工程と、
（ｃ）前記露光工程後、前記レジスト膜に現像処理を施すことにより、前記レジスト膜に所望のレジストパターンを転写する現像工程とを有し、
前記露光工程は、
（b1）前記レジスト膜に対して、第１方向に延びる第１パターンを第１距離だけ隔てて複数配置した第１マスクを用いて第１露光処理を行う工程と、
（b2）前記レジスト膜に対して、前記第１方向に対して交差する第２方向に延びる第２パターンを前記第１距離よりも狭い第２距離だけ隔てて複数配置し、かつ、互いに隣接する前記第２パターンの一方に位相シフタを設けた第２マスクを用いて第２露光処理を行う工程とを有し、
前記所望のレジストパターンは、前記レジスト膜において、前記第１パターンおよび第２パターンに対応する第１レジスト部が残され、かつ、前記第１パターンおよび第２パターンに囲まれた領域に対応する第２レジスト部が除去されてなるパターンであり、前記レジストパターンをエッチングマスクとして、前記半導体ウエハに対してエッチング処理を施すことにより、前記半導体ウエハに孔パターンを形成する工程を有することを特徴とする半導体装置の製造方法。(A) depositing a resist film on the semiconductor wafer;
(B) an exposure process in which two masks are superimposed and exposed on the resist film;
(C) after the exposure step, by developing the resist film, by transferring a desired resist pattern to the resist film,
The exposure step includes
(B1) performing a first exposure process on the resist film using a first mask in which a plurality of first patterns extending in a first direction are spaced apart by a first distance;
(B2) A plurality of second patterns extending in a second direction intersecting the first direction are arranged with a second distance narrower than the first distance and adjacent to the resist film. Performing a second exposure process using a second mask provided with a phase shifter on one of the second patterns,
The desired resist pattern is Oite the resist film, the first resist portion corresponding to the first pattern and second pattern are left, and, corresponding to the region surrounded by the first and second patterns A pattern formed by removing the second resist portion, and forming a hole pattern in the semiconductor wafer by performing an etching process on the semiconductor wafer using the resist pattern as an etching mask. A method for manufacturing a semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000010715A JP2001203139A (en) | 2000-01-19 | 2000-01-19 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000010715A JP2001203139A (en) | 2000-01-19 | 2000-01-19 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001203139A JP2001203139A (en) | 2001-07-27 |
| JP2001203139A5 true JP2001203139A5 (en) | 2005-02-10 |
Family
ID=18538701
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000010715A Pending JP2001203139A (en) | 2000-01-19 | 2000-01-19 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001203139A (en) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003203993A (en) | 2002-01-10 | 2003-07-18 | Mitsubishi Electric Corp | Semiconductor storage device and its manufacturing method |
| JP4287166B2 (en) * | 2003-02-14 | 2009-07-01 | 大日本印刷株式会社 | Method for producing resin black matrix and photomask used therefor, resin black matrix, color filter and liquid crystal display element |
| US7507661B2 (en) * | 2004-08-11 | 2009-03-24 | Spansion Llc | Method of forming narrowly spaced flash memory contact openings and lithography masks |
| JP4600109B2 (en) * | 2005-03-23 | 2010-12-15 | Ｔｄｋ株式会社 | Stamper manufacturing method and information recording medium manufacturing method |
| EP1843202B1 (en) * | 2006-04-06 | 2015-02-18 | ASML Netherlands B.V. | Method for performing dark field double dipole lithography |
| JP2010040849A (en) * | 2008-08-06 | 2010-02-18 | Tokyo Ohka Kogyo Co Ltd | Resist pattern-forming method |
| US8795953B2 (en) * | 2010-09-14 | 2014-08-05 | Nikon Corporation | Pattern forming method and method for producing device |
| US9946160B2 (en) * | 2012-10-19 | 2018-04-17 | Nikon Corporation | Method for forming pattern and method for producing device |
| JP5750476B2 (en) * | 2013-07-22 | 2015-07-22 | 東京応化工業株式会社 | Resist pattern forming method |
| JP7289592B2 (en) * | 2019-03-26 | 2023-06-12 | 株式会社ディスコ | Inspection board and inspection method |
-
2000
- 2000-01-19 JP JP2000010715A patent/JP2001203139A/en active Pending
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