JP2001188500A - Power source device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a desired voltage without depending upon the multiplication factor of voltage boosting of a boosting circuit and also to efficiently use a capacitor which is not used in a voltage boosting. SOLUTION: The output voltage Vpr of a boosting circuit 24 is divided by resistors R5 and R6. The difference voltage between the divided voltage Vback and a reference voltage Vref is amplified by an operational amplifier 23 to be fed back to the boosting circuit 24 and it is voltage boosted. Thus, a desired stabilized output voltage Vpr is obtained by repeating such an operation. The output voltage Vpr obtained in this manner is divided into driving voltages V0 to V4 by a voltage dividing circuit 22 and they are supplied to a row driver and a column driver. Moreover, the connection of a voltage boosting capacitor Cpr which does not contribute to the voltage boosting is changed over to a connection between the output potential of the circuit 24 and the ground potential and the capacitor Cpr is used as a stabilizing capacitor Cst or it is used as an auxiliary capacitor by being connected in parallel with another voltage boosting capacitor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply, and more particularly, to a power supply for supplying a stable driving voltage to a display element.

[0002]

2. Description of the Related Art A liquid crystal display device has a scanning electrode and a signal electrode which cross vertically and horizontally, a selection voltage is sequentially applied to a scanning electrode from a row driver, and a data voltage corresponding to display data is applied to a signal electrode from a column driver. Is displayed by applying.

As a power supply device for supplying a selection voltage or a data voltage to each driver, a device as shown in FIG. 14 is used.

[0004] A power supply device 2 shown in FIG.
Circuit 24 that boosts and outputs the voltage, an amplifier circuit 23 that uses the output voltage of the booster circuit 24 as a power supply, amplifies and outputs the reference voltage Vref, and divides the output voltage of the amplifier circuit 23 by a resistor R to display A voltage dividing circuit 22 for outputting a voltage for driving the element.

The boosting circuit 24 has a boosting multiple set by a switching transistor and a boosting capacitor C.

For example, using two switching transistors and two boosting capacitors C in the boosting circuit 24,
A double boosting circuit that doubles the power supply voltage VDD can be configured. Similarly, a triple boosting circuit that boosts the power supply voltage VDD three times can be obtained from three switching transistors and three boosting capacitors C. Further, by combining the double boosting circuit and the triple boosting circuit, a 6-fold boosting circuit that boosts the power supply voltage VDD six times can be configured.

As described above, by changing the number of switching transistors and boosting capacitors C to be used, or by using a plurality of boosting circuits, it is possible to change the boosting multiple.

The booster circuit 24 shown in FIG.
When the DD is fixed and used in a power supply device such as a liquid crystal display device, it is designed so that the number of boosting stages of the boosting circuit 24 can be changed by software or the like. Therefore, by changing the number of boosting stages of the boosting circuit 24, the multiple of boosting can be changed.

[0009]

When the number of boosting stages of the boosting circuit 24 is changed by software or the like, if the number of boosting stages is set to be a problem, the output voltage of the boosting circuit 24 becomes the absolute maximum of the LSI constituting the power supply device. The rating is exceeded and L
A current exceeding an allowable amount flows through the SI, and the LSI is destroyed or its performance is reduced.

Also, a load (operating voltage) of a liquid crystal display device or the like.
Changes due to display contents, temperature, etc., the booster circuit 24
Output voltage also fluctuates, making it difficult to always output a constant voltage.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to provide a power supply device capable of suitably supplying a drive voltage to a display element. Another object of the present invention is to provide a power supply device that efficiently uses elements provided in a circuit.

[0012]

In order to achieve the above object, a power supply device according to the present invention comprises: a booster for boosting and outputting a supplied voltage; and detecting a voltage output from the booster. Based on the detection result, a voltage control unit that controls a voltage supplied to the boosting unit so that a voltage output from the boosting unit becomes a desired value, and a voltage output from the boosting unit is increased by the boosting unit. And a drive voltage supply means for dividing the voltage by a plurality of resistors connected in series between the output potential of the means and the ground potential and supplying the divided voltage to the display element as a drive voltage.

The voltage control means includes a first voltage dividing means for dividing the voltage output from the boosting means, and an amplifier for amplifying a difference between a voltage divided by the first voltage dividing means and a reference voltage. Amplifying means for supplying the amplified voltage to the boosting means as a voltage to be boosted.

With the above configuration, if the voltage output from the booster circuit is higher than the target value, the difference between the voltage obtained by dividing the voltage and the reference voltage becomes smaller, and a lower voltage is supplied to the booster circuit. Therefore, the output voltage of the booster circuit can be reduced. If the output voltage of the booster circuit is lower than the target value, the difference between the voltage obtained by dividing the voltage and the reference voltage increases, and a higher voltage is supplied to the booster circuit. it can.

Further, the voltage control means includes a second voltage dividing means for dividing the voltage output from the boosting means by using a resistance of the driving voltage supply means, and a voltage dividing means for dividing the voltage output by the second voltage dividing means. Amplifying means for amplifying a difference between the boosted voltage and the reference voltage and supplying the amplified voltage to the boosting means as a voltage to be boosted may be provided.

Further, the second voltage dividing means may include a voltage dividing resistance switching means capable of using an arbitrary potential divided by the resistance of the driving voltage supplying means.

Further, the power supply device of the present invention comprises a booster for boosting and outputting a supplied voltage, and a differential output for outputting a voltage corresponding to a difference between the voltage output from the booster and a reference voltage. Means, A / D conversion means for converting a voltage output from the difference output means into a digital signal and outputting the digital signal, and a signal supplied to the boosting means based on the digital signal output from the A / D conversion means. Means for controlling a voltage to be boosted, and a voltage output from the boosting means, divided by a plurality of resistors connected in series between an output potential of the boosting means and a ground potential, and a driving voltage. And a driving voltage supply unit for supplying the display voltage to the display element.

With the above configuration, when the output voltage of the booster circuit is higher than the target value, the voltage supplied to the booster circuit can be controlled to be lower. When the voltage is lower, the voltage supplied to the booster circuit can be controlled to be higher. Therefore, the output voltage of the booster circuit can be made closer to the target value.

Further, the power supply device of the present invention comprises a booster for boosting and outputting the supplied voltage, and a differential output for outputting a voltage corresponding to a difference between the voltage output from the booster and a reference voltage. Means, A / D conversion means for converting the voltage output from the difference output means into a digital signal and outputting the digital signal, and output from the boosting means based on the digital signal output from the A / D conversion means. Boosting operation control means for controlling the boosting operation of the boosting means so that the applied voltage has a desired value, and the desired voltage output from the boosting means is adjusted between the output potential of the boosting means and the ground potential. And a driving voltage supply unit for dividing the voltage by a plurality of resistors connected in series to each other and supplying the divided voltage to the display element as a driving voltage.

In the power supply device having the above-mentioned configuration, the boosting means includes a boosting circuit for performing a boosting operation in accordance with an operation clock, and the boosting operation control means controls the voltage output from the boosting means to a desired value. A frequency control means for controlling a frequency of an operation clock supplied to the boosting operation of the boosting means, so that the cycle of the operation clock of the boosting circuit is lengthened or shortened in accordance with the magnitude of the output voltage of the boosting circuit. Therefore, the output voltage of the booster circuit can be controlled. Therefore, a desired voltage can be obtained.

Further, in the power supply device having the above configuration, the boosting operation control means includes a boosting operation switching means for turning on or off the boosting means in accordance with an output voltage of the boosting means. The booster circuit can be operated or stopped depending on the magnitude of the voltage, so that a desired voltage can be obtained.

Further, in the power supply device having the above configuration, the boosting means has a function of switching the number of boosting stages, and the boosting operation control means operates according to an output voltage of the boosting means.
By providing the boosting stage number switching unit for controlling the number of boosting stages of the boosting unit, the number of boosting stages can be switched according to the output voltage of the boosting circuit, and the boosting multiple can be changed. Thus, the output voltage can be controlled.

Further, in the power supply device having the above-mentioned configuration, the boosting means includes means for charging a plurality of boosting capacitors, switching the connection of the boosting capacitors after charging, and connecting the boosting capacitors. By providing means for switching the connection of the plurality of boosting capacitors contributing to the boosting operation of the boosting means according to the output voltage of the boosting means, the connection state of the boosting capacitor can be changed according to the output voltage of the boosting circuit. Therefore, the capacitance of the substantial boosting capacitor changes, and the output voltage can be controlled.

Further, in all of the above power supplies,
The boosting means includes means for charging a plurality of boosting capacitors, and switching the connection of the boosting capacitors after charging to boost the voltage, and sets the plurality of boosting capacitors between an output potential of the boosting means and a ground potential. There may be provided a connection switching means capable of switching so as to be connected therebetween. Further, the boosting means includes means for charging a plurality of boosting capacitors, switching the connection of the boosting capacitors after charging, and boosting the voltage, wherein the plurality of boosting capacitors can be connected in parallel. Connection means may be further provided.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A case where a power supply device according to an embodiment of the present invention is applied to a liquid crystal display device will be described with reference to the drawings.

FIG. 1 shows a liquid crystal display device used in the present embodiment. The liquid crystal display device shown in FIG. 1 is implemented as an LSI, and includes a display element 1, a power supply device 2, a row driver 3
, A column driver 4 and a control device 5.

The display element 1 includes a first substrate and a second substrate which are arranged to face each other, a plurality of scanning electrodes 11 which are arranged on the first substrate in a row direction, and a column direction of the second substrate. , And a liquid crystal sealed between the two substrates, and an image is displayed by a plurality of pixels defined by intersections of the scanning electrodes 11 and the signal electrodes 13.

The power supply 2 generates a plurality of drive voltages for driving the display element 1 and supplies the drive voltages to the row driver 3 and the column driver 4.

The row driver 3 sequentially outputs a drive voltage corresponding to the selected scan electrode 11 as a scan voltage in accordance with a timing control signal from the control device 5 based on the drive voltage supplied from the power supply device 2.

On the other hand, the column driver 4 outputs a drive voltage corresponding to display data of each pixel to the signal electrode 13 as a data voltage in accordance with a timing control signal from the control device 5 in synchronization with the scanning voltage.

In this way, an image is displayed on the pixel defined by the intersection of the scanning electrode 11 and the signal electrode 13 in the selected state.

Hereinafter, the power supply device of the present invention will be described with reference to the drawings.

(First Embodiment) A power supply device according to a first embodiment of the present invention will be described with reference to FIG.

The power supply device according to the first embodiment has the structure shown in FIG.
As shown in (1), a maximum drive voltage generation circuit 21 and a voltage division circuit 22 are provided.

The maximum drive voltage generating circuit 21 is composed of an operational amplifier 23, a booster circuit 24, voltage dividing resistors R5 and R6, and a stabilizing capacitor Cst, and generates a voltage necessary for driving the liquid crystal. .

The voltage dividing resistors R5 and R6 are connected in series between the output potential of the booster circuit 24 and the ground potential. The output voltage Vpr of the booster circuit 24 is changed by the resistance value of the resistor R5 and the resistor R5.
6 is divided into a ratio of the resistance value of the resistor R6 to the sum of the resistance values of the resistor 6, and the divided feedback voltage Vback is input to the negative input terminal of the operational amplifier 23.

The operational amplifier 23 amplifies the difference voltage between the reference voltage Vref and the feedback voltage Vback at a predetermined amplification factor, and inputs the output voltage Vop to the booster circuit 24.

The booster circuit 24 includes a booster capacitor Cpr composed of a plurality of capacitors, and operates in accordance with the supply timing of the booster clock CK from the control device 5.
Output voltage Vop is increased by a predetermined factor.

The voltage dividing circuit 22 includes a plurality of resistors (R1 to R
4), and divides the voltage generated by the maximum drive voltage generation circuit 21 into a plurality of drive voltages (V0 to V4). The resistors R1 to R4 constituting the voltage dividing circuit 22 are connected in series between the output terminal of the boosting circuit 24 and the ground potential, and divide the target voltage supplied from the maximum drive voltage generating circuit 21. The divided voltages are driving voltages V0 to V4
Is supplied to the row driver 3 and the column driver 4.

The stabilizing capacitor Cst is connected between the output potential of the booster circuit 24 and the ground potential, and removes a ripple (AC component) included in the output voltage Vpr of the booster circuit 24.
Smoothing.

The amplification factor of the operational amplifier 23, the multiple of the booster 24, the reference voltage Vref, and the resistors R5 and R6 are:
The output voltage Vpr of the booster circuit 24 is set to be stable at the target value.

Next, the operation of the maximum drive voltage generation circuit 21 will be described.

When the power supply starts to operate, the output voltage Vpr of the booster circuit 24 has not reached the target value, and the feedback voltage Vback input to the operational amplifier 23 takes a small value. Therefore, the operational amplifier 2 serving as the power supply of the booster circuit 24
3, the output voltage Vop is the maximum value (a value close to the power supply voltage VDD)
, And the output voltage Vop is boosted by the booster circuit 24.

When the output voltage Vpr of the booster circuit 24 gradually rises and exceeds the target value, the feedback voltage Vback input to the negative input terminal of the operational amplifier 23 becomes higher than the reference voltage Vref, and the output voltage Vop of the operational amplifier 23 becomes Lower. Therefore, the booster circuit 24 lowers the output voltage Vpr, and the output voltage Vpr approaches the target value.

Conversely, when the output voltage Vpr of the booster circuit 24 drops too much and becomes lower than the target value, the feedback voltage Vback input to the negative input terminal of the operational amplifier 23 becomes lower than the reference voltage Vref, and the output of the operational amplifier 23 becomes lower. The voltage Vop increases. For this reason, the output voltage Vpr of the booster circuit 24 also increases and approaches the target value.

By repeating such an operation, the output voltage Vpr of the booster circuit 24 is stabilized at the target value.

Even if the load connected to the power supply device 2 changes, the output voltage Vpr of the booster circuit 24 changes momentarily. However, by performing the above operation, the fluctuation of the voltage is corrected. The driving voltages V0 to V4 can be stably supplied to 1.

As described above, by using the operational amplifier 23 as the power supply of the booster circuit 24 and forming a feedback circuit, the output voltage Vpr of the booster circuit 24 can be controlled, and the display element 1 can be driven appropriately. Voltage that can be generated.

Accordingly, a stable driving voltage can be obtained without voltage fluctuation.

(Second Embodiment) A power supply device according to a second embodiment of the present invention will be described with reference to FIG. In addition,
The same components as those in FIG. 2 are denoted by the same reference numerals.

This power supply device has a maximum drive voltage generation circuit 6
1 and a voltage dividing circuit 22. The maximum driving voltage generating circuit 61 includes a boosting circuit 24 and voltage dividing resistors R10 and R11.
, A comparator 62, an A / D converter 63, and an electronic volume 64.

The output voltage Vpr of the booster circuit 24 is equal to the resistance R1
The voltage is divided by 0 and R11 and input to the negative input terminal of the comparator 62. The comparator 62 amplifies a difference voltage between the divided voltage and the comparison reference voltage Vcr at a predetermined amplification rate, and outputs a binary level (high level or low level) amplified voltage Vamp. The A / D converter 63 performs A / D conversion on the amplified voltage Vamp and outputs a digital signal DS of logic 1 or 0. The electronic volume 64 raises or lowers the output analog voltage according to the value of the digital signal DS.

According to this configuration, the comparison reference voltage Vcr is
For example, the target value of the rising pressure voltage Vpr is determined by the resistors R10 and R1.
By setting the voltage to a value obtained by dividing the voltage by 1, the boosted voltage Vpr
Is higher than the target value, the input voltage of the negative input terminal (inverting input terminal) of the comparator 62 becomes higher than the voltage of the input voltage of the positive input terminal (non-inverting input terminal), and the amplified voltage Vam
p becomes low level, and the value of the digital signal DS becomes 0. The electronic volume 64 has its digital signal DS
Then, the output analog voltage is decreased by a predetermined amount ΔV. On the other hand, when the boosted voltage Vpr is lower than the target value, the amplified voltage Vamp becomes high level, the value of the digital signal DS becomes 1, and the electronic volume 64 operates to increase the output analog voltage by a predetermined amount ΔV. be able to.

Therefore, by repeating the above operation,
The output voltage Vpr of the booster circuit 24 approaches the target value, and finally stabilizes at the target value. Therefore, a stable target voltage is supplied to the voltage dividing circuit 22, and the display element 1 can be driven appropriately.

Note that an amplifier can be used instead of the comparator 62. In this case, the amplifier compares the voltage divided by the resistors R10 and R11 with the comparison reference voltage Vcr (for example, the target value of the boosted voltage Vpr by the resistors R10 and R11).
(A voltage equal to the voltage divided by 11) is amplified at a predetermined amplification factor and output. The A / D converter 63 converts the voltage output from the amplifier into a multi-level digital signal D.
S, and the electronic volume 64 converts the digital signal D
The output analog voltage is increased or decreased by an amount corresponding to the value of S. Even with this configuration, the voltage dividing circuit 2
2 is supplied with a stable target voltage.

Third Embodiment A power supply device according to a third embodiment of the present invention will be described with reference to FIG. The same components as those in FIGS. 2 and 3 are denoted by the same reference numerals.

This power supply device has a maximum drive voltage generation circuit 7
1 and a voltage dividing circuit 22. The maximum driving voltage generating circuit 71 includes a boosting circuit 24 and voltage dividing resistors R10 and R11.
, A comparator 62, an A / D converter 63, and a boost frequency conversion circuit 72.

The boosting circuit 24 performs a boosting operation in accordance with a boosting clock CK supplied from the control device 5.

The output voltage Vpr of the booster circuit 24 is equal to the resistance R1
The voltage is divided by 0 and R11 and input to the negative input terminal of the comparator 62. The comparator 62 amplifies the difference voltage between the divided voltage and the comparison reference voltage Vcr, and outputs a binary level (high level or low level) amplified voltage Vamp. The A / D converter 63 performs A / D conversion on the amplified voltage Vamp and outputs a digital signal DS of logic 1 or 0. The boost frequency conversion circuit 72 converts the cycle of the boost clock CK supplied from the control device 5 to the boost circuit 24 according to the value of the digital signal DS.

According to this configuration, for example, by setting the comparison reference voltage Vcr to a voltage equal to a value obtained by dividing the target value of the boosted voltage Vpr by the resistors R10 and R11, the output voltage Vpr becomes higher than the target value. When it is high, the amplified voltage Vamp becomes low level, and the value of the digital signal DS becomes 0.
Boost frequency conversion circuit 72 receives the digital signal DS and lengthens the cycle of boost clock CK. The discharge time of the charge charged in the boost capacitor Cpr is lengthened by the boosted clock CK ′ having a long cycle, and the amount of discharged charge is increased. As a result, the output voltage Vpr of the booster circuit 24 decreases.

On the other hand, when the output voltage Vpr is lower than the target value, the amplified voltage Vamp goes high, the value of the digital signal DS becomes 1, and the boost frequency conversion circuit 72
The boosting clock CK ′ having a short cycle is supplied to the boosting circuit 24. As a result, the discharge time of the charge charged in the boosting capacitor Cpr is shortened, and the output voltage Vpr of the boosting circuit 24 is reduced.
Rises.

Therefore, by repeating the above operation,
The output voltage Vpr of the booster circuit 24 approaches the target value, and finally stabilizes at the target value. Therefore, a stable target voltage is supplied to the voltage dividing circuit 22, and the display element 1 can be driven appropriately.

It should be noted that an amplifier can be used instead of the comparator 62. In this case, the amplifier amplifies the difference between the voltage divided by the resistors R10 and R11 and the comparison reference voltage Vcr at a predetermined amplification factor and outputs the result. A /
The D converter 63 converts the voltage output from the amplifier into a digital signal DS of a multi-level, and the boost frequency conversion circuit 72 raises or lowers the frequency of the operation clock by an amount corresponding to the value of the digital signal DS. . Even with this configuration, a stable target voltage is supplied to the voltage dividing circuit 22.

(Fourth Embodiment) A power supply device according to a fourth embodiment of the present invention will be described with reference to FIG. The same components as those in FIG. 4 are denoted by the same reference numerals.

This power supply device has a maximum drive voltage generation circuit 7
3 and a voltage dividing circuit 22. The maximum driving voltage generating circuit 73 includes a boosting circuit 24 and voltage dividing resistors R10 and R11.
, A comparator 62, an A / D converter 63, and a boost operation control circuit 74.

The output voltage Vpr of the booster circuit 24 is equal to the resistance R1
The voltage is divided by 0 and R11 and input to the negative input terminal of the comparator 62. The comparator 62 amplifies a difference voltage between the divided voltage and the comparison reference voltage Vcr at a predetermined amplification rate, and outputs a binary level (high level or low level) amplified voltage Vamp. The A / D converter 63 performs A / D conversion on the amplified voltage Vamp and outputs a digital signal DS of logic 1 or 0. The boost operation control circuit 74
The boost clock CK supplied from the control device 5 to the boost circuit 24 is turned on or off according to the value of the digital signal DS.

According to this configuration, for example, by setting the comparison reference voltage Vcr to a voltage equal to a value obtained by dividing the target value of the boosted voltage Vpr by the resistors R10 and R11, the boosted voltage Vpr becomes smaller than the target value. When it is high, the amplified voltage Vamp becomes low level, and the value of the digital signal DS becomes 0.
The boosting operation control circuit 74 receives the digital signal DS and turns off the boosting clock CK supplied to the boosting circuit 24. As a result, the boosting operation of the booster circuit 24 stops, and the output voltage Vpr drops.

On the other hand, when the output voltage Vpr is lower than the target value, the amplified voltage Vamp goes high, the value of the digital signal DS becomes 1, and the boosting operation control circuit 74 turns on the boosting clock CK. Thereby, the booster circuit 24
Is boosted, and the output voltage Vpr rises.

Therefore, by repeating the above operation,
The output voltage Vpr of the booster circuit 24 approaches the target value, and finally stabilizes at the target value. Therefore, a stable target voltage is supplied to the voltage dividing circuit 22, and the display element 1 can be driven appropriately.

In the case of the power supply having the configuration shown in FIG.
In order to suppress the fluctuation of the output voltage Vpr of the booster circuit 24, the capacity of the stabilizing capacitor Cst is set large,
It is desirable to set the resistance values of the two voltage dividing resistors R1 to R4 small.

(Fifth Embodiment) A power supply according to a fifth embodiment of the present invention will be described with reference to FIGS. The same components as those in FIGS. 2 to 5 are denoted by the same reference numerals.

This power supply device has a maximum drive voltage generation circuit 7
5 and a voltage dividing circuit 22. The maximum driving voltage generating circuit 75 includes a boosting circuit 24 and voltage dividing resistors R10 and R11.
, A comparator 62, an A / D converter 63, and a boosting stage number switching circuit 78.

The output voltage Vpr of the booster circuit 24 is equal to the resistance R1
The voltage is divided by 0 and R11 and input to the negative input terminal of the comparator 62. The comparator 62 amplifies a difference voltage between the divided voltage and the comparison reference voltage Vcr at a predetermined amplification rate, and outputs a binary level (high level or low level) amplified voltage Vamp. The A / D converter 63 performs A / D conversion on the amplified voltage Vamp and outputs a digital signal DS of logic 1 or 0. The boosting stage number switching circuit 78
A boosting multiple switching signal for changing the boosting multiple of the boosting circuit 24 in accordance with the value of the digital signal DS
To supply.

The booster circuit 2 used in the present embodiment
4 will be described with reference to FIG. FIG. 7A illustrates an example of a booster circuit capable of converting a boosting multiple of a voltage to be boosted from 1 to 3 times. FIG.
3A illustrates an example of a logic circuit for generating a signal supplied to the booster circuit illustrated in FIG.

The booster circuit shown in FIG. 7A comprises a booster capacitor Cpr and p-type and n-type MOS transistors. The gate of each transistor is shown in FIG.
The signal generated by the circuit shown in FIG.
In the circuit shown in FIG.
By setting EL2 to logic 0 and VEL3 to logic 0, the booster circuit in FIG. 7A functions as a 1-fold booster circuit. When VEL1 is set to 0, VEL2 is set to 1 and VEL3 is set to 0, it functions as a double booster circuit,
In the setting of 1 as 0, VEL2 as 0, and VEL3 as 1,
Functions as a triple booster circuit.

According to this configuration, for example, when the boosting multiple of the boosting circuit 24 at the previous timing is double and the boosting voltage Vpr is higher than the target value, the boosting stage number switching circuit 78
Outputs a boosting multiple switching signal of 1 to VEL1, 0 to VEL2, and 0 to VEL3 to reduce the boosting multiple of the boosting circuit 24 to 1. As a result, the output voltage Vpr drops. When the output voltage Vpr is lower than the target value, the boosting stage number switching circuit 78 outputs 0 for VEL1, 0 for VEL2, and VEL.
A boosting multiple switching signal of 1 is output to 3 and the boosting multiple is increased by three times. As a result, the output voltage Vpr increases.

Thus, by repeating the above operation, the output voltage Vpr of the booster circuit 24 approaches the target value and finally stabilizes at the target value. Therefore, the voltage dividing circuit 22
Is supplied with a stable target voltage, and the display element 1 can be suitably driven.

(Sixth Embodiment) A power supply according to a sixth embodiment of the present invention will be described with reference to FIGS. The same components as those in FIGS. 2 and 3 are denoted by the same reference numerals.

This power supply device has a maximum drive voltage generation circuit 7
6 and a voltage dividing circuit 22. The maximum driving voltage generating circuit 76 includes a boosting circuit 24 and voltage dividing resistors R10 and R11.
, A comparator 62, an A / D converter 63, a capacitance switching signal generation circuit 79, and a capacitance conversion circuit 81.

The output voltage Vpr of the booster circuit 24 is equal to the resistance R1
The voltage is divided by 0 and R11 and input to the negative input terminal of the comparator 62. The comparator 62 amplifies a difference voltage between the divided voltage and the comparison reference voltage Vcr at a predetermined amplification rate, and outputs a binary level (high level or low level) amplified voltage Vamp. The A / D converter 63 performs A / D conversion on the amplified voltage Vamp and outputs a digital signal DS of logic 1 or 0. Capacity switching signal generation circuit 79
Is a capacitance conversion circuit 8 according to the value of the digital signal DS.
1, a signal A for changing the capacitance of the boost capacitor Cpr,
B (capacity switching signal) is output.

Next, the capacitance conversion circuit 81 will be described with reference to FIG. The capacitance conversion circuit 81 includes auxiliary capacitors C1, C2, and C3 connected in parallel with the boost capacitor Cpr via N-type MOS transistors Tr1 to Tr6, an OR circuit OR, and an AND circuit AND.

Assuming that a signal A indicating 0 and a signal B indicating 0 are output from the capacitance switching signal generation circuit 79, all of the transistors Tr1 to Tr6 are turned off, and the capacitor used for boosting is boosted. Only the capacitor Cpr is provided. When the signal A indicating 1 and the signal B indicating 0 are output, the transistors Tr1 and Tr2 are turned on, and the other transistors are turned off. For this reason, the capacitor used for boosting is composed of the boosting capacitor Cpr and the auxiliary capacitor C1 connected in parallel.

Similarly, when a signal A indicating 0 and a signal B indicating 1 are output, the transistors Tr1 to Tr4
Turns on, and the capacitors used for boosting are the boosting capacitor Cpr and the auxiliary capacitors C1 and C2 connected in parallel. When the signal A indicating 1 and the signal B indicating 1 are output, the transistors Tr1 to Tr6 are turned on, and the capacitors used for boosting are the booster capacitor Cpr and the auxiliary capacitor C1, which are connected in parallel. C2 and C3.

As described above, by changing the number of auxiliary capacitors connected in parallel to the boost capacitor Cpr, the capacity of the boost capacitor Cpr can be substantially changed, and the boost multiple of the boost circuit 24 can be changed. .

The capacity switching signal generation circuit 79 is provided with a booster circuit 2
When the output voltage Vpr of No. 4 exceeds the target value, the signals A and B are switched according to the digital signal DS indicating that the output voltage Vpr is higher than the target value so that the number of capacitors contributing to the boosting operation becomes smaller than the current value. Therefore, the boosting capability of the boosting circuit 24 decreases, and the output voltage Vpr decreases.

Conversely, when the output voltage Vpr of the booster circuit 24 becomes smaller than the target value, the capacitance switching signal generation circuit 79
Receives the digital signal DS indicating that it is smaller than the target value, and switches the signals A and B so that the number of capacitors contributing to the boosting operation is increased from the current level. Therefore, the boosting capability of the booster circuit 24 increases, and the output voltage Vpr increases.

By repeating such operations, the output voltage Vpr of the booster circuit 24 becomes stable at the target value, and the voltage of the target value is supplied to the voltage dividing circuit 22.

Therefore, even if the power supply device 2 having the above configuration is used, the output voltage Vpr of the booster circuit 24 can be controlled.
It is possible to generate a voltage that can drive the display element 1 suitably.

It is also possible to use an amplifier instead of the comparator 62. In this case, the amplifier amplifies the difference between the voltage divided by the resistors R10 and R11 and the comparison reference voltage Vcr at a predetermined amplification factor and outputs the result. A /
The D converter 63 converts the voltage output from the amplifier into a digital signal DS of a multi-valued level and outputs the digital signal DS. The capacitance switching signal generation circuit 79 switches the capacitance switching signal so as to increase or decrease the number of capacitors contributing to boosting according to the value indicated by the digital signal DS. For example, the booster circuit 2
4, when the output voltage Vpr is much higher than the target value, the signals A and B are switched so as to disconnect all the auxiliary capacitors. When the output voltage Vpr of the booster circuit 24 is slightly lower than the target value, Like adding only one extra capacity,
Switch between signals A and B.

(Modifications) The present invention is not limited to the above embodiment, and various modifications and applications are possible.

For example, in the first embodiment, the output voltage Vpr of the booster circuit 24 is divided using the voltage dividing resistors R5 and R6, and is input to the negative input terminal of the operational amplifier 23.
As shown in (1), the voltage dividing resistors R1 to R4 of the voltage dividing circuit 22 can be used as the voltage dividing resistor of the output voltage Vpr.
By removing the voltage dividing resistors R5 and R6 shown in FIG.
Since power consumption due to through current flowing through the resistors R5 and R6 can be eliminated, power consumption can be reduced. In this case, by changing the connection position of the negative input terminal of the operational amplifier 23, an arbitrary intermediate voltage of the voltage dividing circuit 22 can be used.

Further, as shown in FIG.
3 is connected to an output potential of the booster circuit 24 and an arbitrary potential of the voltage divider circuit 22 by connecting the pad P to L.
SI, and the operational amplifier 23
May be changed. Pad P is
For example, the terminal 0 connected to the negative input terminal of the operational amplifier 23
And a terminal 1 connected to the output terminal of the booster circuit 24, and terminals 2 to 4 connected between respective resistors R1 to R4 of the voltage divider 22. By connecting terminal 0 to any one of terminals 1-4, the output voltage Vpr
Can be changed. By changing the ratio, the voltage input to the negative input terminal of the operational amplifier 23 also changes, and the output voltage Vpr of the booster circuit 24 can be controlled.

In the booster circuit 24 used in the first to sixth embodiments, when the boosting multiple is set small or the number of boosting stages is reduced during the boosting operation to reduce the boosting multiple, the unused boosting capacitor Cpr is used. appear. At this time, as shown in FIG. 12, a changeover switch is used to stabilize the boosting capacitor Cpr not used for boosting by a stabilizing capacitor (a capacitor that absorbs and stabilizes jitter of the output voltage of the boosting circuit 24) or a complementary capacitor (stabilizing capacitor). (A capacitor that is connected in parallel to the capacitor for increasing the capacitance that contributes to stabilization of the output voltage).

In this case, the booster capacitor Cpr which may not be used is connected to the booster circuit 24 and the output terminal of the booster circuit 24 via the switch circuit as shown in FIG.

When the boosting capacitor Cpr is used for the original boosting operation, the terminals 0 and 2 are connected, the boosting capacitor Cpr is connected to the boosting circuit 24, and the boosting capacitor Cpr is incorporated in a part of the boosting circuit shown in FIG. , Which contribute to the boosting operation. On the other hand, when used as a complementary capacitor, terminals 0 and 1 are connected, and a boost capacitor Cpr is connected between the output of the boost circuit 24 and the ground. According to this configuration, when the boosting capacitor Cpr is necessary for the original boosting operation, it contributes to the boosting operation. When the boosting capacitor Cpr is not used for the boosting operation due to the setting of the boosting multiple (the number of stages), it serves as a stabilizing capacitor. Function.

Whether the boosting capacitor is used as an original boosting capacitor or as a complementary capacitor is determined based on, for example, the output of the boosting stage number switching circuit 78 in FIG. 6, the output of the capacitance switching circuit signal generation circuit 79 in FIG. Is determined. According to this configuration, the output voltage of the booster circuit 24 can be stabilized by effectively using the booster capacitor Cpr.

Further, in a feedback circuit as shown in FIG. 10 in which the resistor constituting the voltage dividing circuit 22 is used as a voltage dividing resistor for the output voltage Vpr, when the number of boosting stages of the boosting circuit 24 is reduced and used, there is surplus. It is also possible to connect a capacitor in parallel and use it as an auxiliary capacitor (a capacitor that increases the capacity of the capacitor that contributes to the boosting operation).

For example, when the number of boosting stages is reduced by one, as shown in FIG. 13, a boosting capacitor Cpr2 that does not contribute to the boosting operation is connected in parallel to the boosting capacitor Cpr1 via a switch circuit.

According to this configuration, the boost capacitor Cpr2
When the step-up multiple is high, it contributes to the increase of the step-up multiple, and when the step-up multiple is low, it contributes to the improvement of the step-up capacity (step-up capacity). That is, the boost capacitor can be used effectively without waste.

Whether the boosting capacitor is used as the original boosting capacitor or as the auxiliary capacitor is determined based on, for example, the output of the boosting stage number switching circuit 78 in FIG. 6, the output of the capacitance switching signal generating circuit 79 in FIG. Is determined.

As described above, according to the power supply device of the present embodiment, the voltage to be boosted is changed or the boosting operation of booster circuit 24 is controlled in accordance with the value of output voltage Vpr of booster circuit 24. By doing so, an output voltage Vpr stable at the target value can be obtained. Therefore, stable voltages V0 to V4 suitable for driving the display element 1 can be generated.

Further, the boosting capacitor Cpr not used for boosting can be effectively used as a stabilizing capacitor for removing ripples and an auxiliary capacitor for increasing the boosting efficiency of the boosting circuit 24.

Also, even if the load connected to the power supply device 2 changes due to switching of the display content of the display element 1 or the like,
The output of the booster circuit 24 stabilizes at the target voltage. Therefore, the driving voltages V0 to V4 can be stably supplied to the display element 1.

The power supply device of the present invention is not limited to a power supply device for a liquid crystal display element, but may be applied to a display device such as a PDP (plasma display), EL (electroluminescence), and FED (field emission display).
The present invention can be widely applied as a power supply for a display element which requires a plurality of voltages for displaying a plurality of gradations and / or a plurality of colors. Further, the present invention is naturally applicable to a power supply device for supplying power to a device other than the display device.

[0105]

As described above, according to the power supply device of the present invention, a drive voltage can be suitably supplied to a display element. In addition, elements provided in the circuit can be used efficiently.

[Brief description of the drawings]

FIG. 1 illustrates a liquid crystal display device used in this embodiment mode.

FIG. 2 shows a power supply device according to the first embodiment.

FIG. 3 shows a power supply device according to a second embodiment.

FIG. 4 shows a power supply device according to a third embodiment.

FIG. 5 shows a power supply device according to a fourth embodiment.

FIG. 6 shows a power supply device according to a fifth embodiment.

FIG. 7A is a circuit diagram of a booster circuit included in a power supply device according to a fifth embodiment, and FIG. 7B is a logic circuit thereof.

FIG. 8 shows a power supply device according to a sixth embodiment.

FIG. 9 is a circuit diagram of a capacitance conversion circuit included in a power supply device according to a sixth embodiment.

FIG. 10 shows a modification of the power supply device of the present invention.

FIG. 11 shows a modification of the power supply device of the present invention.

FIG. 12 shows a modified example of the power supply device of the present invention.

FIG. 13 shows a modification of the power supply device of the present invention.

FIG. 14 shows a conventional power supply device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Display element, 2 ... Power supply device, 3 ... Row driver, 4 ...
..Column drivers, 5 ... Control devices, 11 ... Scan electrodes, 13
... Signal electrodes, 21, 61, 71, 73, 75, 76 ...
Maximum drive voltage generation circuit, 22 ... voltage divider circuit, 23 ... operational amplifier, 24 ... booster circuit, 62 ... comparator, 63
... A / D converter, 64 ... Electronic volume, 72 ...
.Step-up frequency conversion circuit, 74 ... Step-up operation control circuit, 78
... Step-up number switching circuit, 79 ... Capacitance switching signal generation circuit
81 ・ ・ ・ Capacity conversion circuit

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H093 NA10 NA80 NC04 NC23 NC24 ND42 ND49 5C006 AF52 AF53 AF54 AF64 AF78 BB12 BF42 BF46 FA00 FA14 5C080 AA10 BB05 DD19 FF03 JJ02 JJ03 5G435 EE34

Claims (12)

[Claims] A booster for boosting and outputting a supplied voltage; detecting a voltage output from the booster; and detecting a voltage output from the booster to a desired value based on a result of the detection. Voltage control means for controlling a voltage supplied to the boosting means, and a plurality of resistors connected in series between an output potential of the boosting means and a ground potential. And a driving voltage supply unit for dividing the voltage by a driving voltage and supplying the driving voltage to the display element as a driving voltage. 2. The voltage control means includes: first voltage dividing means for dividing a voltage output from the voltage increasing means; and a difference between a voltage divided by the first voltage dividing means and a reference voltage. The power supply device according to claim 1, further comprising an amplification unit that amplifies the voltage and supplies the amplified voltage to the boosting unit as a voltage to be boosted. 3. A boosting means for boosting and outputting a supplied voltage; a difference output means for outputting a voltage corresponding to a difference between a voltage output from the boosting means and a reference voltage; A / D conversion means for converting a voltage output from the A / D converter into a digital signal and outputting the digital signal; and controlling a voltage to be boosted supplied to the boosting means based on the digital signal output from the A / D conversion means. Means for dividing the voltage output from the boosting means by a plurality of resistors connected in series between an output potential of the boosting means and a ground potential, and supplying the voltage to the display element as a driving voltage And a voltage supply unit. 4. A boosting means for boosting and outputting a supplied voltage; a difference output means for outputting a voltage corresponding to a difference between the voltage output from the boosting means and a reference voltage; A / D conversion means for converting the output voltage into a digital signal and outputting the digital signal; and based on the digital signal output from the A / D conversion means, the voltage output from the boosting means is set to a desired value. A boosting operation control means for controlling a boosting operation of the boosting means; and a plurality of serially connected desired voltages output from the boosting means between an output potential of the boosting means and a ground potential. And a driving voltage supply unit for dividing the voltage by the resistance of the above and supplying the voltage to the display element as a driving voltage. 5. The boosting means includes a booster circuit for performing a boosting operation in accordance with an operation clock, and the boosting operation control means controls the boosting means so that a voltage output from the boosting means has a desired value. 5. The power supply device according to claim 4, further comprising frequency control means for controlling a frequency of an operation clock supplied to said boosting operation. 6. The power supply device according to claim 4, wherein said boosting operation control means includes boosting operation switching means for turning on or off said boosting means in accordance with an output voltage of said boosting means. 7. The boosting means has a function of switching the number of boosting stages, and the boosting operation control means includes boosting stage number switching means for controlling the number of boosting stages of the boosting means in accordance with an output voltage of the boosting means. The power supply device according to claim 4, wherein: 8. The boosting means includes means for charging a plurality of boosting capacitors, switching the connection of the boosting capacitors after charging, and connecting the boosting capacitors, and wherein the boosting operation control means is arranged in accordance with an output voltage of the boosting means. 5. The power supply device according to claim 4, further comprising means for switching connection of a plurality of boosting capacitors that contribute to a boosting operation of said boosting means. 9. The voltage control means includes: a second voltage dividing means for dividing the voltage output from the boosting means using a resistance of the driving voltage supply means; and a voltage dividing means for dividing the voltage output by the second voltage dividing means. The power supply device according to claim 1, further comprising an amplification unit that amplifies a difference between the boosted voltage and the reference voltage, and supplies the amplified voltage to the boosting unit as a voltage to be boosted. . 10. The voltage dividing means according to claim 9, wherein said second voltage dividing means includes voltage dividing resistance switching means capable of using an arbitrary potential divided by a resistance of said drive voltage supplying means. A power supply according to claim 1. 11. The boosting means includes means for charging a plurality of boosting capacitors, switching the connection of the boosting capacitors after charging, and boosting the voltage, and connecting the plurality of boosting capacitors to an output potential of the boosting means. The power supply device according to any one of claims 1 to 10, further comprising a connection switching unit capable of switching so as to be connected between the power supply and a ground potential. 12. The boosting means includes means for charging a plurality of boosting capacitors, switching the connection of the boosting capacitors after charging and boosting the voltage, and connecting the plurality of boosting capacitors in parallel. 12. Power supply according to any of the preceding claims, further comprising possible parallel connection means.