JP2001184814A - Disk drive - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that power consumption is large in an inaccessible state so as to be very uneconomical because a head is subjected to stepping drive when a step pulse is inputted even though access to a disk is not allowed in the conventional disk drive. SOLUTION: In this disk drive, the stepping drive of the head (F) is inhibited until time TB passes from the rotation start of a spindle motor, an internal step pulse (E) on the basis of an external step pulse (D) is generated after the time TB passes, and the head (F) is subjected to stepping drive up to a target track (G).

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a disk device such as a floppy disk drive used as an external storage device of a computer system.

[0002]

2. Description of the Related Art A conventional disk device will be described here by taking a floppy disk drive (hereinafter referred to as FDD) as an example. The FDD is an apparatus that performs an operation of reading and writing information (hereinafter, referred to as a read / write operation) with respect to a floppy disk (hereinafter, referred to as FD) having a plurality of concentric tracks. Here, the number of tracks in the FD is 81, and each track is distinguished by numbering the tracks from the outermost track to the innermost track in order from 1 track to 81 tracks. Note that the initial position (retreat position) of the magnetic head is set to 0 track further outside the outermost track of the FD.

When performing a read / write operation on the FD, the magnetic head is driven stepwise in the radial direction of the FD to perform positioning on a target track,
It is necessary to scan the magnetic head along the track by rotating the magnetic head by a spindle motor. Among them, a stepping motor is used as means for step-driving the magnetic head in the radial direction of the FD, and its operation is controlled by supplying a direction signal and a step pulse from the host (CPU) side. . That is, the stepping motor drives the magnetic head in the direction indicated by the direction signal by the number of step pulses.

[0004]

Here, the conventional FDD
, The read / write operation for the FD is not permitted until a predetermined time T _A has elapsed since the spindle motor started rotating. This predetermined time T
_A indicates that the rotation speed of the spindle motor is 300 to 360.
This is the time required to be stable at rpm, and is generally set to about T _A = 500 ms. However, in the conventional FDD, when the step pulse is input from the host side, the stepping motor is driven immediately in synchronization with the input of the step pulse. for that reason,
The step driving of the magnetic head is performed even in a state where the read / write operation to the FD is not permitted, so that the time for holding the magnetic head at a target track position is unnecessarily long, and the consumption in a state where data is not exchanged is consumed. The problem is that the power is large.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide a disk drive which realizes power saving by prohibiting step driving of a head in a state where an access operation to a disk is not permitted. .

[0006]

In order to achieve the above object, in a disk drive according to the present invention, a head for transmitting and receiving information to and from a disk, a spindle motor for rotating the disk, and a step pulse A stepping motor for driving the head in the radial direction of the disk based on the input of the disk drive, wherein a means for generating an internal step pulse separately from an external step pulse input from the host side; Of the step pulse and the internal step pulse,
Either with only one of providing a switching means for outputting to said stepping motor, by controlling said switching means, to said spindle motor has elapsed from the start of rotation of the predetermined time T _B, the external step pulse or prohibited step driving of the head by the inner step pulse, after the predetermined time T _B has elapsed when the head is not located at the destination track, step driving said head using the internal step pulse When the head is located on the target track, the head is step-driven using the external step pulse.

[0007] More specifically, the spindle motor is started to rotate until the predetermined time T _B has elapsed, and means for inhibiting the creation of the internal step pulse, the external step pulse or the output from the switching means A first track counter that outputs the current track where the head is located by counting the internal step pulse, and a target track where the head is to be located by counting the external step pulse that is input from the host side. A second track counter for outputting, and a comparator for comparing the output of the first track counter with the output of the second track counter, and controlling the switching means based on the output of the comparator. the up to a predetermined time T _B has elapsed, the external step pulse if Or the step driving of the head by the internal step pulse is prohibited, and the predetermined time T
After the elapse of _B, when the head is not located on the target track, the head is step-driven using the internal step pulse, and when the head is located on the target track, the external step pulse is output. To drive the head stepwise.

[0008] Here, the external step pulse or the inner step pulse after waiting a predetermined time t _d for each to be output to the stepping motor, the output of the first track counter, the second track counter output The comparing means may be controlled so as to compare In the disk device according to the present invention,
Means are provided for simultaneously resetting both counts of the first track counter and the second track counter when an error occurs in the step driving of the head. It should be noted that the interval for creating the internal step pulse is shorter than the interval for inputting the external step pulse.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A disk drive according to the present invention will be described by taking FDD as an example, as in the prior art. The FDD according to the present embodiment is configured to control read / write operations and the like for the FD by processing various signals obtained from the host (CPU) side by the FDD LSI. FIG. 1 is a block diagram showing an LSI for FDD according to the present invention.

As shown in FIG. 1, the FDD LSI 1 comprises a control circuit 2, a large current driver circuit 3, and a signal processing circuit 4. The control circuit 2 is a logic unit that controls the large current driver circuit 3 and the signal processing circuit 4 based on a signal from the host (CPU). The large current driver circuit 3 is a driver circuit for driving a stepping motor or the like (not shown) that requires a relatively large current, and functions as a stepper unit. The signal processing circuit 4 is a circuit that processes a read signal for controlling reading of information and a write signal for controlling writing, and has a function as a read / write unit that controls the operation of the magnetic head.

Here, the configuration and operation of the control circuit 2 will be described in detail. FIG. 2 is a block diagram showing an outline of a control part of a stepper unit in the control circuit 2. FIG. 3 is a timing chart of the buffered seek by the control circuit 2.
As shown in FIG. 2, the control part of the stepper unit in the control circuit 2 includes a ready signal processing unit 5,
Step pulse processing means 6, first track counter 7,
It has a second track counter 8, a comparator processing means 9, a timing processing means 10, a stepper signal processing means 11, and a reset pulse processing means 12.

The ready signal processing means 5 includes a host (CP
FD based on the disc-in signal (A), the motor-on signal (B), and the index signal obtained from the U) side.
And H / L of a ready signal (C) for restricting the read / write operation to the read / write operation. Here, the disc-in signal (A) is a signal indicating the insertion state of the FD, and becomes the H level when the FD is not inserted, and becomes the L level when the FD is inserted. The motor-on signal (B) is a signal indicating on / off of the spindle motor for rotating the FD, and is at the H level when the motor is off and at the L level when the motor is on. The index signal is a signal that depends on the rotation speed of the FD. The ready signal (C) is a signal sent to the signal processing circuit 4.

As shown in FIG. 3, in order for the ready signal (C) to be at the L level, that is, for permitting the read / write operation to the FD, the FD is inserted and the spindle motor starts rotating. From the predetermined time T _A
(Generally, about 500 ms). However, if the index signal is unstable even after the lapse of the predetermined time T _{A, the} ready signal (C) maintains the H level until the index signal is stabilized. This is because an error is likely to occur in the read / write operation when the rotation speed of the spindle motor is unstable, and in the worst case, information recorded on the FD may be destroyed.

Signals such as an external step pulse (D) and a direction signal (J) are input from the host (CPU) to the control circuit 2 at irregular intervals. These signals are necessary to step-drive the magnetic head in the radial direction of the FD. The external step pulse (D) is a signal for instructing how many steps the magnetic head should be driven, and the direction signal (J)
Is a signal indicating the direction of the step drive. By controlling the stepping motor based on these signals,
The magnetic head can be positioned on a target track. The input interval t of the external step pulse (D)
₁ is at least longer than 3 ms, usually about 6 ms.

Here, in the FDD of the present embodiment, a read / write operation for the FDD is not performed, instead of a conventional configuration in which the magnetic head is step-driven immediately in synchronization with the input of an external step pulse (D). , The step driving of the magnetic head is inhibited until immediately before the ready signal (C) becomes L level.

First, an external step pulse (D) from the host (CPU) is input to the step pulse processing means 6. The step pulse processing means 6 includes an internal step pulse creating means 6a and a step pulse switching means 6b.
It consists of. Internal step pulse generating means 6a
Is to create a unique internal step pulse (E) separately from the external step pulse (D). Incidentally, creation interval t ₂ of the internal step pulse (E) are shorter than the input interval t ₁ of the external step pulse (D) 3ms~4ms.

The step pulse switching means 6b is a switching means for outputting only one of the external step pulse (D) and the internal step pulse (E) to the stepper signal processing means 11. Here, the output of the step pulse switching means 6b is transmitted not only to the stepper signal processing means 11 but also to the first track counter 7 one by one to count the current track (F) where the magnetic head is located. ing. Stepper signal processing means 1
Reference numeral 1 indicates that a stepper signal is formed based on the step pulse output from the step pulse processing means 6 and sent to the large current driver circuit 3. The stepper signal is a signal whose phase is controlled to drive the stepping motor including a bipolar type four-phase motor or the like.

Here, in order to prohibit the step driving of the magnetic head until immediately before the read / write operation becomes possible, the step pulse processing means 6 operates until the step driving permission signal is output from the ready signal processing means 5. The creation of the internal step pulse (E) by the internal step pulse creation means 6a is prohibited. On the other hand, the step pulse switching means 6b is initialized so as to prohibit the transmission of the external step pulse (D) to the stepper signal processing means 11. The external step pulse (D) input from the host (CPU) during the period in which the step driving is prohibited is sent out not only to the step pulse processing means 6 but also to the second track counter 8 one by one. Yes,
The target track (G) where the magnetic head should be located is counted.

Note that the step drive permission signal is generated for a predetermined time T after the motor-on signal (B) becomes L level.
_This signal is output after the lapse of _B. Here, in order to reduce the step driving in a state that can not exchange data it can be taken longer predetermined time T _B as possible. For example, if an extreme setting such as T _B = T _A is performed, useless step driving can be completely eliminated. However, after the read / write operation becomes possible, the magnetic head finally starts step driving.
Access to the FD is delayed and the situation is bad.

Therefore, in the FDD in the present embodiment, the output interval t ₂ of the internal step pulse (E) is 3
ms to 4 ms, and the number of FD tracks is 81
In view of it, and sets the value of the predetermined time T _B, as follows. That is, from the predetermined time T _A (≒ 500 ms) required to enable the read / write operation to the longest time required for the step drive (81 tracks × 4 ms)
= 324 ms), and T _B = 20
It is set to 0 ms. As a result, the time for holding the magnetic head at the target track position can be reduced as much as possible, and the magnetic head can be positioned at the target track before the read / write operation becomes possible.
Note that the counting means a predetermined time T _A and the predetermined time T _B, the ready signal processing unit 5 may be provided a clock counter or the like.

In the FDD according to the present embodiment, the current track (F) of the magnetic head is compared with the target track (G) by comparing the output of the first track counter 7 and the output of the second track counter 8. ) Is provided. Here, the timing of the comparing operation is controlled by the timing processing means 10, and the comparison result signal (H) output from the comparator processing means 9 is sent to the step pulse switching means 6b at a predetermined timing.

The comparison result signal (H) is a signal which becomes L level when the current track (F) and the target track (G) match, and becomes H level when they do not match. Here, the step pulse switching means 6b is controlled by the comparison result signal (H). If the comparison result signal (H) is at the L level, it directly outputs the external step pulse (D). For example, an internal step pulse (E) is output. The operations of the comparator processing means 9 and the timing processing means 10 will be described later in detail.

[0023] The step drive permission signal by a predetermined time T _B is passed is output, the internal step pulse forming means 6a starts creating the internal step pulse (E). On the other hand, the step pulse switching means 6b outputs the comparison result signal (H)
, An internal step pulse (E) is sent to the stepper signal processing means 11 until the current track (F) of the magnetic head matches the target track (G).
By such a buffered seek operation, the magnetic head performs step driving to a target track. And
When the current track (F) coincides with the target track (G), switching to the normal seek operation for sending an external step pulse (D) to the stepper signal processing means 11 is performed.

With this configuration, the time for holding the magnetic head on the target track can be shortened, so that unnecessary power consumption can be reduced, which is very economical. In particular, FDD using battery
Is driven, the driving time of the FDD can be greatly extended. On the other hand, the output interval t ₂ of the internal step pulse (E) is changed to the input interval t _{1 of the} external step pulse (D).
By making the length shorter, the time required for step driving can be reduced. Thereby, it is also possible to reduce the FDD seek sound.

Hereinafter, the buffered seek operation described above will be specifically described with reference to FIG.
As shown in the figure, in the FDD according to the present invention, since the input of the external step pulse (D) is also begun, until the elapse of the predetermined time T _B is prohibited step driving of the magnetic head, the The current track (F) indicated by the one-track counter 7 remains at zero track. On the other hand, the second track counter 8 receives the input of the external step pulse (D) and counts the target track (G) one by one.
The count is incremented for each pulse. Therefore, the predetermined time T
_{By the time B} elapses, there is a difference of three tracks between the current track (F) and the target track (G).

[0026] Thus, at the time when the step drive permission signal after a lapse of a predetermined time T _B is output, the current comparison result signal that the track (F) and the desired track (G) is a mismatch of the magnetic head ( H) is output from the comparator processing means 9. Receiving the comparison result signal (H), the step pulse switching means 6b drives the magnetic head to step drive to the target track (G).
A buffered seek operation for sending an internal step pulse (E) to the stepper signal processing means 11 is performed.

When the output of the first track counter 7 matches the output of the second track counter 8 by the internal step pulse (E), the comparator processing means 9 sets the current track (F) and the target track (F). G) and a comparison result signal (H) indicating that the two match. Upon receiving the comparison result signal (H), the step pulse switching means 6b shifts to the normal seek operation in which the external step pulse (D) inputted thereafter is sent directly to the stepper signal processing means 11.

Next, the operation of the comparator processing means 9 and the timing processing means 10 will be described. As described above, the comparator processing means 9 compares the output of the first track counter 7 with the output of the second track counter 8 and outputs the comparison result as a comparison result signal (H). The timing of the rate operation is controlled by the timing processing means 10. The timing processor unit 10 waits for a predetermined time t _d external step pulse (D), or an internal step pulse (E) each time the output to the stepping motor,
A comparator pulse (I) is output. The comparator processing means 9 receives the comparison pulse (I), performs a comparison operation, and outputs a comparison result signal (H).

[0029] Here, in the FDD in the present embodiment, by setting the predetermined time t _d to 2.7 ms. This is a value in consideration of the response performance of a stepping motor that drives the magnetic head stepwise. Generally, the response performance of the stepping motor is 2.5
ms, and cannot respond to a step pulse input at a shorter interval. Therefore, if the comparison operation is performed simultaneously with the input of the step pulse, immediately after the current track (F) of the magnetic head coincides with the target track (G) (within 2.5 ms),
When the external step pulse (D) is input, the external step pulse (D) is not accepted by the stepping motor, and a seek error occurs.

On the other hand, the FDD in the present embodiment
External step pulse (D), or internal step pulse (E) after waiting for a predetermined time t _d for each to be output to the stepping motor, an output and a second track counter of the first track counter 7 as 8 can be compared with the external step pulse (D) immediately after the current track (F) and the target track (G) of the magnetic head coincide with each other. However, no seek error occurs because the buffered seek operation is continued. With this, FDD
Can be improved.

Further, in the FDD of the present embodiment, reset pulse processing means 12 is provided for the purpose of improving impact resistance. FIG. 4 is a timing chart of the track counter reset. When an impact or the like is applied to the FDD, the position of the magnetic head is shifted regardless of the step pulse, and the current track (F) output from the first track counter 7 and the actual track (M) of the magnetic head are output. ) May not match. The host determines such a state as a seek error based on the data read from the FD, and moves the magnetic head to the initial position (0).
An external step pulse (D) for returning to (track) is output to the step pulse processing means 6.

At this time, if the magnetic head is deviated in the outer circumferential direction from the track position where it should originally exist due to the above-mentioned impact, the magnetic head has already returned to the zero track by the external step pulse (D). However, the output of the first track counter 7 and the second track counter 8 may cause an erroneous recognition that the magnetic head has not yet returned to track 0. In such a state, the subsequent step driving cannot be performed normally.
You have to shut down the power supply once.

In order to solve such a problem, when the host detects that the actual head position (M) has reached the initial position (0 track), the reset pulse processing means 1
For 0, a 0 track pulse (K) is output. Here, the reset pulse processing means 12 receiving the input of the zero track pulse (K) checks the direction of the direction signal (J), and the direction signal (J) is still in the F direction.
If it is detected that faces the outer circumferential direction and D, sends a reset pulse (L) for a predetermined time _{t a (t a <t 1} ) first after the waiting track counter 7 and the second track counter 8 I do.

As a result, the counts of the first track counter 7 and the second track counter 8 are both reset to 0, so that the current track (F) output from the first track counter 7 and the output from the second track counter 8 are output. The target track (G) to be recorded and the track (M) actually existing on the magnetic head all match. In the present embodiment, the predetermined time t _a external step pulse (D)
Since you are input interval t ₁ is shorter than the value of (for example t _a = 2.5ms), the input of the external step pulse (D) despite the head is returned to track 0 to prevent a problem is continued be able to.

On the other hand, when the host detects the output of the reset pulse (L), it switches the direction signal (J) inward, and again returns the external step pulse (D) to return the magnetic head to the original track before impact. Start output of With the above configuration, even when a shock or the like is applied to the FDD and a seek error occurs, the seek operation can be quickly restored to a state in which the seek operation can be retried.

In the above embodiment, the FD
Although D has been described as an example, the present invention is not limited to FDD, and can be widely applied to a device that accesses a disk by step-driving a head.

[0037]

According to the disk device of the present invention,
Until a predetermined time T _B has elapsed prohibits step driving of the head, after a predetermined time T _B has elapsed on the basis of the output of the comparator means, when the head is not located at the destination track, inner step pulse And the head is step-driven using an external step pulse when the head is positioned on the target track.

By performing such a buffered seek operation, when the disk cannot be accessed, the time for holding the head on the target track can be shortened, so that wasteful power consumption can be reduced and the operation is very economical. is there. In particular, when the disk device is driven by using a battery, the life of the battery can be greatly extended. In addition, by setting the creation interval of the internal step pulse to be shorter than the shortest input interval of the external step pulse, the time required for the step drive can be shortened, and the seek noise can be reduced.

Further, the external step pulse or after waiting a predetermined time t _d each for outputting said internal step pulses to the stepping motor, the output of the first track counter, the output of the second track counter Are compared with each other to control the comparing means. Thus, even if the external step pulse is input immediately after the current track of the head matches the target track, the buffered seek operation is continued, so that no seek error occurs.
Thereby, the error rate characteristic of the seek operation can be improved.

Further, the disk device according to the present invention has means for simultaneously resetting both counts of the first track counter and the second track counter when an error occurs in the step drive of the head. . With such a configuration, even when a seek error occurs due to an impact or the like applied to the disk device, the seek operation can be quickly restored to a state in which the seek operation can be retried.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an FDD LSI according to the present invention.

FIG. 2 is a block diagram illustrating an outline of a control section of a stepper section in the control circuit 2.

3 is a timing chart of a buffered seek by a control circuit 2. FIG.

FIG. 4 is a timing chart of a track counter reset.

[Explanation of symbols]

 Reference Signs List 1 LSI for FDD 2 Signal processing circuit 3 Large current driver circuit 4 Control circuit 5 Ready signal processing means 6 Step pulse processing means 6a Internal step pulse generation means 6b Step pulse switching means 7 First track counter 8 Second track counter 9 Comparator means DESCRIPTION OF SYMBOLS 10 Timing processing means 11 Stepper signal processing means 12 Reset pulse processing means

Claims (5)

[Claims] A head for transmitting and receiving information to and from a disk, a spindle motor for rotating the disk, and a stepping motor for stepwise driving the head in a radial direction of the disk based on input of a step pulse. In addition to the external step pulse input from the host,
A means for creating an internal step pulse, and a switching means for outputting only one of the external step pulse and the internal step pulse to the stepping motor are provided, and by controlling the switching means, A predetermined time T _B after the spindle motor starts rotating
There until passage prohibits step driving of the head by the external step pulse or said inner step pulse, after the predetermined time T _B has elapsed when the head is not located at the destination track, the inner step pulse And a step driving the head using the external step pulse when the head is positioned on a target track. Wherein from the spindle motor is started to rotate to the predetermined time T _B has elapsed, and means for inhibiting the creation of the internal step pulse, the external step pulse or the internal step output from the switching means By counting the pulses,
A first track counter that outputs a current track where the head is located, a second track counter that outputs a target track where the head is to be located by counting the external step pulse input from the host side, the output of one track counter, a comparator means for comparing the output of the second track counter, provided with a, by controlling the switching means based on an output of said comparator means, is the predetermined time T _B until passage prohibits step driving of the head by the external step pulse or said inner step pulse, after the predetermined time T _B has elapsed, when the head is not located at the destination track, the inner step pulse Step driving the head using
2. The disk drive according to claim 1, wherein when the head is located on a target track, the head is step-driven using the external step pulse. The method according to claim 3, wherein the external step pulse or said inner step pulse after waiting a predetermined time t _d for each to be output to the stepping motor, the output of the first track counter, the output of the second track counter 3. The disk device according to claim 2, wherein the comparing unit is controlled so as to compare. 4. The apparatus according to claim 2, further comprising means for simultaneously resetting both counts of a first track counter and a second track counter when an error occurs in the step driving of the head. The disk device according to item 1. 5. The disk device according to claim 1, wherein an interval at which said internal step pulse is created is shorter than an interval at which said external step pulse is input.