KR930001796B1 - Disk recording controller for recording device - Google Patents

Abstract

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Description

Disk record control device of storage device

1 is a block diagram showing the basic system configuration of a floppy disk device according to a first embodiment of the present invention.

2 is a block diagram showing the configuration of a write control circuit and its peripheral circuit in accordance with the first embodiment of the present invention.

3 is a block diagram showing the configuration of a write control circuit and its peripheral circuit in accordance with the second embodiment of the present invention.

4 is a block diagram showing the configuration of an FDC and a peripheral circuit thereof according to the first embodiment of the present invention.

5 is a block diagram showing the configuration of the read / write circuit and its peripheral circuit according to the first embodiment of the present invention.

6 is a block diagram showing the structure of a disk drive mechanism according to the first embodiment of the present invention.

7A is a plan view showing the structure of a disk case surface in accordance with the first embodiment of the present invention.

7B is a plan view showing the structure of a disk case surface in accordance with the first embodiment of the present invention.

8 is a block diagram showing the configuration of an FDC and a peripheral circuit thereof according to a third embodiment of the present invention.

9 is a flow chart for explaining the operation of the present invention.

* Explanation of symbols for main parts of the drawings

10: host system 11: host computer

12: floppy disk controller 13: floppy disk drive

15: recording control circuit 16: disk drive mechanism

21, 22: head 23: carriage mechanism

30: density mode detection sensor 50: data bus buffer

51: status register 52: data register

53: R / W control circuit 53: drive interface circuit

56: serial interface circuit 57: density selection circuit

58: data serial-parallel conversion circuit 59: input port

60: output port 61: recording control logic circuit

62: light current source circuit 63: light driver

64: head selection circuit 65: lead circuit

70: clock generator 71: selection circuit

The present invention relates to a disk recording control apparatus of a storage device used for a floppy disk device of, for example, a high density mode, which is compatible with the low density mode.

Conventionally, for example, in a 3.5-inch floppy disk device, a device having a high density mode (2HD mode) having a disk storage capacity of, for example, 1.6 / 2MB (megabyte) has been developed. The device in the high density mode is configured such that the storage capacity of the disk is compatible with the device in the low density mode (2DD mode) of 1 MB, for example. That is, the high-density mode disk drive FDD reads / writes appropriate for each of the high density mode and the low density mode in response to the density mode signal DS indicating the recording density mode transmitted from the host system that controls the operation of the FDD. write) operation. However, for the density mode specified by the density mode signal DS from the host system, when a disk different from the density mode is set in the FDD, the FDD corresponds to the density mode signal DS for the set disk. Executes read / write operation. For this reason, particularly in the write operation mode in which data is recorded on the disc, the FDD performs an inappropriate recording operation on the disc in the density mode which is different from the density mode specified by the density mode signal DS. For this reason, there is a drawback that, by an inappropriate recording operation, recorded data such as a disk format of a disk set in FDD is destroyed.

On the other hand, a write protector for prohibiting data recording operation is provided on the disc. The light protector is a slide switch installed in the case of the disk on a 3.5-inch disk. In the FDD, when a disc housed in a case is set, a light protection sensor (for example, a micro switch) is provided for detecting a hole formed in the case by the operation state of the slice switch. In the FDD, when the write protect signal is output from the write protect sensor, the write operation to the set disk is prohibited. As a result, the write operation to the disc can be prohibited, but it is necessary to operate the write protector before setting to the FDD. Therefore, when the disc in the mode different from the density mode specified by the density mode signal DS is set in the FDD by mistake, the write protection function as described above cannot prevent the inappropriate recording operation.

SUMMARY OF THE INVENTION An object of the present invention is to provide a disk recording control apparatus of a storage device that can prohibit writing operation of data on a disk when a disk having a mode different from the density mode specified by the host system is set in the FDD. have.

It is also an object of the present invention that a disc write control of a storage device capable of instructing the host system to prohibit the write operation of data on a disc when a disc having a mode different from the density mode specified by the host system is set in the FDD. To provide a device.

The present invention provides a density mode detection means for detecting a recording density mode of a disc set in a disc drive, a recording density mode of a disc instructed from a host system for executing drive control of the disc drive, and a mode detected by the density mode detection means. Is compared with each other, and the recording control means for generating a recording control signal for prohibiting the recording operation of the data on the disc in the case of a discrepancy, and permitting the recording operation of the data on the disc if the comparison result is identical. And a recording operation corresponding to the recording density mode instructed by the host system when the recording operation is permitted, in response to the recording control signal output from the recording control means, for the disc set in the disk drive, and the recording operation is prohibited. To prevent writing to disc It is a device with the recording means.

In summary, the present invention is characterized in that the apparatus includes a signal transmission means for instructing a write control signal prohibiting a write operation output from the write control means to instruct the recording of data on the disc and transmitting the write control signal to the host system as a write inhibit signal. One device.

1 shows a basic system configuration of a floppy disk device according to the first embodiment of the present invention. This apparatus is composed of a host computer 11, a floppy disk controller (FDC) 12, and a floppy disk drive (FDD) 13, which roughly constitute a host system 10. FIG. In response to the control of the host computer 11, the FDC 12 transmits various interface signals, write data WD, and the like for executing the operation control of the FDD 13. The FDC 12 is a circuit constituting the interface between the host computer 11 and the FDD 13, and specifically, is an LSI corresponding to, for example, the model µPD765A of NEC of Japan.

The FDD 13 includes a read / write circuit (R / W circuit) 14, a write control circuit 15, and a disk drive, as shown in FIG. 1 (but only elements necessary for the present invention). A mechanism 16 and a floppy disk mechanical controller (FDMC) 17 are provided. The R / W circuit 14 performs an appropriate read / write operation in the high density mode or the low density mode corresponding to the density mode signal DS transmitted from the FDC 12. The R / W circuit 14 executes a write operation corresponding to the write data WD output from the FDC 12 in the output period of the write gate signal WG output from the write control circuit 15 in the write operation mode. The write control circuit 15 is a circuit of the present invention, and is a circuit for controlling the write operation of the R / W circuit 14 by the write gate signal WG. The FDMC 17 is a control circuit for controlling various circuits and mechanisms of the FDD 13, and executes input and output of various interface signals necessary for the operation control of the disk drive mechanism 16 with the FDC 12.

As shown in FIG. 6, the disk drive mechanism 16 includes a disk rotating mechanism 20 and a S0 head 21, S1 for rotating the disk 19 of a 3.5-inch type, for example, housed in the case 18. As shown in FIG. The carriage mechanism 23 which mounted each magnetic head of the head 22 is provided. The disk rotating mechanism 20 has a chucking portion 24 for chucking the disk 19 set in the FDD 13 and a spindle motor 25 for rotationally driving the chucking portion 24. The carriage mechanism 23 is a mechanism that moves in the radial direction of the disk 19 by the driving force of the stepping motor, and seeks the mounted heads 21 and 22 in the radial direction of the disk 19. . The S0 head 21 is a head for performing read / write on the data surface of the side 0 of the disk 19. The S1 head 22 is a head that reads and writes the data surface of the side 1 of the disk 19.

The write control circuit 15 has logic gate circuits of the EX-OR circuit 26, the OR circuits 27, 28, and the NOR circuit 29, as shown in FIG. In the EX-OR circuit 26, the density mode signal DS transmitted from the FDC 12 is input to one input terminal, and the output signal from the density mode detection sensor 30 (mode signal M) to the other input terminal. Is input. Here, the disk drive mechanism 16 is provided with a density mode detection sensor 30 and a write protect mode detection sensor (WP sensor) 31 serving as a micro switch, for example. As shown in FIG. 7A, when the density mode detection sensor 30 detects the high density detection hole 40 provided in the case 18 for accommodating the disk 19, the density mode detection sensor 30 detects the mode signal of the logic level [H]. Output M). When the WP sensor 31 detects the write prohibition hole formed by the write protect 41 provided in the case 18, the WP sensor 31 inputs the write protect signal WP having a logic level [H] to one of the OR circuits 27. Output to the terminal.

In the OR circuit 27, the output signal of the EX-OR circuit 26 is input to the other input terminal. In the OR circuit 28, the write enable signal WE output from the FDC 12 is input to one input terminal, and the output signal of the OR circuit 27 is input to the other input terminal. In the NOR circuit 29, the output signal of the OR circuit 28 is input to one input terminal, and the write protect signal WP from the WP sensor 31 is input to the other input terminal. The NOR circuit 29 transmits the write prohibition instruction signal W1 of the logic level L to the FDC 12.

The FDC 12, as shown in FIG. 4 (but only elements necessary for the description of the present invention), the data bus buffer 50, status register 51, data register 52 and read / write control Circuit (R / W control circuit) 53 is provided. The data buffer 50 is connected to the data bus 54 of the host system 10 and is a buffer memory for storing commands and data transmitted from the host system 10. The status register 51 indicates the state of the FD 12. The status register 51 indicates a status indicating, for example, BUSY (e.g., indicating that the FDD 13 is in a seek operation) or an input / output state of data to the host system 10. Is a register containing. The data register 52 is a register that stores, for example, write data transmitted from the host system 10 or read data transferred from the FDC 12 to the host system 10, various commands from the host system 10, and the like. The R / W control circuit 52 corresponds to various control signals output from the host system 10, and provides control signals for controlling the input / output operation of each circuit of the FDC 12 (for example, the data bus buffer 50). It is a circuit that occurs. In this embodiment, the R / W control circuit 53 writes data transmitted from the host system 10 to the FDC 12 in response to the control signal WR output from the host system 10 in the write operation mode. Generates a control signal to

In addition, the FDC 12 includes a drive interface circuit 55, a serial interface circuit 56, a density selection circuit 57, a data serial-to-parallel conversion circuit (data SP / PS circuit) 58, an input port 59, and an output. The port 60 is provided. The drive interface circuit 55 inputs status prohibition signals W1 and status signals such as READY transmitted from the FDD 13 through the input port 59. In addition, the interface circuit 55 passes through the output port 60 a STEP (a pulse signal for executing the seek of each head 21, 22) and a DIRECTION signal (a signal for specifying the direction of the seek). And an interface signal are output to the FDMC 17 of the FDD 13.

In the same example, the serial interface circuit 56 outputs the write enable signal WE to the write control circuit 15 of the FDD 13 in response to a write command from the host system 10. The density selection circuit 57 is a circuit for outputting the density mode signal DS indicating either the high density mode or the low density mode to the FDD 13 in response to the density mode designation from the host system 10. The data SP / PS circuit 58 converts the write data WD transmitted from the host system 10 into serial data and transmits the serial data to the R / W circuit 14 of the FDD 13.

The R / W circuit 14 has a write control logic circuit 61, a write current source circuit 62, and a write driver 63 as shown in FIG. 5 (however, only elements necessary for the description of the present invention are shown). And a head selection circuit 64 and a lead circuit 65. The write control logic circuit 61 is a circuit for controlling the operation of each circuit related to the write operation. Specifically, drive control of the write driver 63 and selection control of the head selection circuit 64 are executed. The write current source circuit 62 is a circuit for generating the write current necessary for the write operation. The write driver 63 is a head driving circuit which supplies the write current from the write current source circuit 62 to each of the heads 21 and 22 through the write data WD from the logic circuit 61 and executes the write operation. . The head selection circuit 64 is a circuit for selecting either the SO head 21 or the S1 head 22. The read circuit 65 is a circuit that executes a read operation for outputting read data read by the S0 head 21 or the S1 head 22 to the FDC 12.

Next, the operation of the embodiment will be described.

The disk 19 is housed in a plastic case 18 as shown in Figs. 7A and 7B. The case 18 is provided with a shutter 42, and the shutter 42 has an arrow as shown in FIG. 7A when the case 18 is set in the disk rotating mechanism 20 of the FDD 13. Open in the direction of A. The shutter 42 is provided with a head window 43. In the state where the shutter 42 is open, the heads 21 and 22 come into contact with the surface of the disk 19 through the head window 43. As shown in FIG. In the center portion of the disk 19, a metal chucking plate 44 is provided, as shown in FIG. 7B. As shown in FIG. 6, the disk 19 is absorbed by the magnet installed in the chucking portion 24 and chucked by the chucking portion 24. As shown in FIG. The disk 19 chucked by the chucking portion 24 is rotated by the rotational driving force of the spindle motor 25 (step S1 in FIG. 9).

The carriage mechanism 23 moves in the radial direction of the disk 19 in response to the drive control signal C of the stepping motor output from the FDMC 17, and moves the S0 head 21 and the S1 head 22 to the target track. Seek it. The carriage mechanism 23 is provided with a track zero sensor for detecting a track zero as a reference position. When the track zero sensor detects a moving position of a carriage corresponding to the track zero, the track zero signal TRO is sent to the FDMC 17. ) (Figure 1). In the seek mode of the S0 head 21 and the S1 head 22, each interface signal of the step signal and the DIRECTION signal is transmitted from the FDC 12 to the FDMC 17. The step signal is a pulse signal outputted by the number of pulses (one track one pulse) corresponding to the seek distances (track number) of the heads 21 and 22.

The DIRECTION signal is a signal for indicating the seek direction of each of the heads 21 and 22 (inner circumferential direction or outer circumferential direction of the disk 19).

In the data write operation mode, as shown in FIG. 1, the write enable signal WE is output from the FDC 12 to the write control circuit 15, and the write data WD is output to the R / W circuit. It is outputted to 14. In the R / W circuit 14, the write control logic circuit 61 outputs the write data WD from the FDC 12 and the output period of the write gate signal WG outputted from the write control circuit 15 (logic level). In synchronization with [L]). The write driver 63 supplies the write current corresponding to the write data WD from the logic circuit 61 to one of the S0 head 21 or the S1 head 22 selected by the head selection circuit 64. . As a result, the S0 head 21 or the S1 head 22 that seeks to the target track in the seek mode performs a magnetic recording operation corresponding to the write data WD with respect to the target track of the disc 19.

In the FDC 12, as shown in FIG. 4, when the control signal WR from the host computer 11 is transmitted to the R / W control circuit 53 in the recording operation mode, the R / W control is performed. In response to the control signal from the circuit 53, the data bus buffer 50 inputs a write command and write data WD from the host computer 11. The write data WD is stored in the data register 52 and transferred to the data SP / PS circuit 58. The data SP / PS circuit 58 converts the write data WD into serial data and outputs the data to the R / W circuit 14. In addition, the write enable signal WE of the logic level [L] is output from the serial interface circuit 56 to the write control circuit 15 in response to the write command and the control signal WR from the host computer 11.

In the write control circuit 15, as shown in FIG. 2, the write enable signal WE of the logic level [L] output from the FDC 12 is input to one input terminal of the OR circuit 28. As shown in FIG. do. If the output signal of the logic level [L] from the OR circuit 27 is input to the other input terminal of the OR circuit 28, the write gate circuit WG of the logic level [L] from the OR circuit 28 is input. Is output to the R / W circuit 14. The write gate signal WG of this logic level L is a write permission signal that permits a write operation. Here, when the write protector 41 provided in the case 18 of the disk 19 set in the FDD 13 is in the OFF state, the WP sensor 31 of the disk drive mechanism 16 writes the logic level [L]. The protection signal WP is output. That is, the WP sensor 31 turns on the switch shown in FIG. 2 when the write protector 41 is not in the write protect mode, and outputs the write protect signal WP having a logic level [L]. (Step S2 of FIG. 9).

In the write mode, the density mode signal DS is output from the density selection circuit 57 of the FDC 12 to the FDD 13. In response to the instruction from the host computer 11, the FDC 12 outputs the density mode signal DS of logic level [L] in the high density mode, and the density mode signal DS of logic level [H] in the low density mode. Output The R / W circuit 14 is configured to execute a recording operation appropriate to the specified density mode in response to the density mode signal DS from the FDC 12. Specifically, the level of the write current generated from the write current source circuit 62 changes in response to the density mode signal DS.

For example, in response to the instruction of the host computer 11, it is assumed that the density mode signal DS of the logic level [L] indicating the high density mode is output from the FDC 12. On the other hand, assuming that the disk 19 for the high density mode in which the high density detection hole 40 is provided in the case 18 is set in the disk drive mechanism 16 of the FDD 13, the disk drive mechanism 16 is provided. The density mode detection sensor 30 detects the high density detection hole 40 of the set case 18 (Step S3 in FIG. 9), and outputs the mode signal M of logic level [L] ( The switch of FIG. 2 is ON). Accordingly, the density mode mode signal DS and the mode signal M of logic level [L] are input to each input terminal of the EX-OR circuit 26 of the recording control circuit 15 (Step 9 in FIG. S4)). For this reason, the output signal of logic level [L] is output from the EX-OR circuit 26 to one input terminal of the OR circuit 27. The write protect signal WP of logic level [L] is input to the other input terminal of the OR circuit 27. For this reason, the output signal of logic level [L] is output from the OR circuit 27 to one input terminal of the OR circuit 28. As shown in FIG. Therefore, from the OR circuit 28, the write permission signal which is the write gate signal WG of the logic level [L] is output to the R / W circuit 14 (Step (S6) in FIG. 9).

Here, assuming that the disk 19 of the low density mode in which the case 18 has no high density detecting hole 40 is set in the disk drive mechanism 16 of the FDD 13, the density mode detection sensor 30 is a stylish case. Since the high-density detection hole 40 cannot be detected from (18), the mode signal M of logic level [H] is output (the state in which the switch of FIG. 2 is OFF). In the EX-OR circuit 26 of the recording control circuit 15, a density mode signal DS having a logic level [L] indicating a high density mode is input to one input terminal. For this reason, from the EX-OR circuit 26, the output signal of the logic level H is output to one input terminal of the OR circuit 27. The write protect signal WP of logic level [L] is input to the other input terminal of the OR circuit 27. From the OR circuit 27, an output signal of logic level [H] is output to one input terminal of the OR circuit 28. As a result, the write gate signal WG having the logic level [H] is output from the OR circuit 28 to the R / W circuit 14. The write gate signal WG of this logic level H is a write prohibition signal for prohibiting the write operation. In the R / W circuit 14, the write control logic circuit 61 stops output of the write data WD to the write driver 63 when the write gate signal WG of the logic level [H] is input. . As a result, the data write operation by the S0 head 21 or the S1 head 22 is prohibited (step S8 in FIG. 9).

When the write gate signal WG of the logic level [H] is output from the OR circuit 28, the write prohibition instruction signal WI of the logic level [L] is output from the NOR circuit 29 to the FDC 12. (Step S9 in FIG. 9). This write inhibit instruction signal WI is transmitted to the drive interface circuit 55 through the input port 59, as shown in FIG. 4. Thus, the status register The stator instructing that the FDD 13 is in the write prohibited state is stored in the 51. The host computer 11 reads the status from the status register 51, so as to recognize that the FDD 13 is in the write prohibited state. do.

On the other hand, even when the density mode signal DS of the logic level [H] indicating the low density mode is output from the FDC 12, the disk 19 of the same mode as the density mode signal DS is set as described above. At that time, the write gate signal WG of the logic level [L] is output to the R / W circuit 14. When the disk 19 of the high density mode different from the density mode signal DS is set in the FDD 13, the write gate signal WG of the logic level [H] is output to the R / W circuit 14. That is, when the disk 19 for high density mode is set in the disk drive mechanism 16, the density mode detection sensor 30 detects the high density detection hole 40 of the set case 18, and the logic level [ L] mode signal M is outputted. Accordingly, the density mode signal DS of logic level [H] is input to the EX-OR circuit 26 of the recording control circuit 15, and the logic level [L] to the other input terminal. The mode signal M of is input. For this reason, the output signal of logic level [H] is output from the EX-OR circuit 26 to one input terminal of the OR circuit 27. The write protect signal WP of logic level [L] is input to the other input terminal of the OR circuit 27. For this reason, the output signal of logic level [H] is output from the OR circuit 27 to one input terminal of the OR circuit 28. As shown in FIG. Therefore, the write prohibition signal, which is the write gate signal WG of the logic level [H], is output from the OR circuit 28 to the R / W circuit 14.

Then, when the write protector 41 provided in the case 18 of the disk 19 set in the FDD 13 is in the ON state, the WP sensor 31 of the disk drive mechanism 16 is set to the logic level [H]. The write protect signal WP is output. That is, the WP sensor 31 detects that the write protector 41 is in the write protect mode, the switch shown in FIG. 2 is turned OFF, and outputs the write protect signal WP of logic level [H]. do. As a result, the write prohibition signal, which is the write gate signal WG of the logic level [H], is output from the OR circuit 28 to the R / W circuit 14. From the NOR circuit 29, the write inhibit instruction signal W1 of logic level [L] is transmitted to the FDC 12.

In this manner, in the data recording operation mode of the FDD 13, the density mode indicated by the density mode signal DS from the FDC 12 and the density mode of the disk 19 to be set (density mode detection sensor 30). When the mode signal M is different from the above, the write prohibition signal, which is the write rate signal WG of the logic level [H], is output from the write control circuit 15 by the R / W circuit 14. Therefore, when the density mode indicated by the FDC 12 and the density mode of the disk 19 to be set are different, the recording operation of data is surely prohibited by the R / W circuit 14. As a result, when the FDD 13 executes the recording operation of the data in the high density mode, for example, by the instruction from the FDC 12, it is possible to prevent the situation in which the recording data of the disc 19 in the low density mode is destroyed.

3 is a block diagram showing the configuration of the write control circuit 15 according to the second embodiment of the present invention. In the second embodiment, as shown in FIG. 3, in the first embodiment, the NOR circuit 29 for transmitting the write inhibit instruction signal W1 to the FDC 12 is omitted. In addition, in the first embodiment, a negative logic OR circuit 32 is provided instead of the OR circuit 28.

In the recording control circuit 15 of the same embodiment, if the logic level of the density mode signal DS from the FDC 12 and the mode signal M from the density mode detection sensor 30 are the same, the OR circuit 27 is used. Is outputted to one input terminal of the OR circuit 32. Here, the write protector 41 is turned off, and the write protect signal WP of logic level [L] is output from the WP sensor 31. Since the write enable signal WE of the logic level [L] is output from the FDC 12 to the other input terminal of the OR circuit 32, the write gate signal of the logic level [L] from the OR circuit 32 is generated. (WG) is output to the R / W circuit 14. That is, the write gate signal WG, which is a write permission signal, is output from the OR circuit 32 to the R / W circuit 14.

On the other hand, when the density mode signal DS of the logic level [L] indicating the high density mode is output from the FDC 12 in response to the instruction of the host computer 11, the disk 19 of the low density mode is FDD. It is assumed that it is set in (13). In this case, since the density mode detection sensor 30 does not detect the high density detection hole 40, it outputs the mode signal M of logic level [H]. For this reason, the output signal of logic level [H] is output from the EX-OR circuit 26 to one input terminal of the OR circuit 27. The write protect signal WP of logic level [L] is input to the other input terminal of the OR circuit 27. From the OR circuit 27, an output signal of logic level [H] is output to one input terminal of the OR circuit 32. Accordingly, the write gate signal WG of the logic level [H] is output from the OR circuit 32 to the R / W circuit 14. The write gate signal WG of this logic level H is a write prohibition signal for prohibiting the write operation.

If the write protector 41 is in the ON state, the WP sensor 31 of the disk drive mechanism 16 outputs the write protect signal WP of logic level [H].

For this reason, the output signal of the logic level [H] from the OR circuit 27 is output to one input terminal of the OR circuit 32. As a result, the write inhibit signal, which is the write gate signal WG of the logic level [H], is output from the OR circuit 332 to the R / W circuit 14.

8 is a block diagram according to a third embodiment of the present invention. In the third embodiment, the density mode signal DS is outputted from the host computer 11 to the FDD for the configuration in which the density mode signal DS is output from the FDC 12 to the FDD 13 in the first embodiment. It is a configuration transmitted to (13). Therefore, in the third embodiment, the density selection circuit 57 shown in FIG. 4 is not provided in the FDC 12 in the first embodiment. In the third embodiment, a selection circuit 71 is provided for switching the frequencies of clocks? 1 and? 2 generated from the clock generator 70 provided in the FDC 12 in response to the density mode. The clock generator 70 is a circuit for generating clocks? 1 and? 2 necessary for the operation of various circuits of the FDC 12 with respect to the input clock?. The selection circuit 71 is an externally attached circuit of the FDC 12 and is a circuit for switching the frequency of the input clock ø.

In the third embodiment, the density mode signal DS output from the host computer 11 is also transmitted to the R / W circuit 14, the recording control circuit 15, and the FDMC 17 of the FDD 13. In the FDD 13, the operation on the density mode signal DS is the same as in the case of the first embodiment. On the other hand, in the high density mode by the selection circuit 71 in the FDC 12, for example, an 8 MHz input clock? Is input to the clock generator 70, and in the low density mode, for example, an 4 MHz input clock. ? is input to the clock generator 70. Accordingly, in the FDC 12, the operation for the density mode instructed by the host computer 11 is executed by switching the frequencies of the clocks? 1 and? 2 from the clock generator 70.

Claims (2)

Density mode detection 30 for detecting a recording density mode of a disc set in the disc drive 13; The mode of recording density of the disc instructed from the host system 10 for executing drive control of the disc drive 13 is compared with the mode detected by the density mode detecting means 30, and the comparison result is Recording control means (15) for prohibiting the recording operation of data on the disc in the case of inconsistency, and generating a recording control signal for permitting the recording operation of the data on the disc in the case of the comparison result; In response to the storage control signal output from the recording control means 15, when the recording operation is permitted, a recording operation corresponding to the recording density mode instructed from the host system 10 is sent to the disk drive 13. And recording means (14) for executing the set disk and forbiding the recording operation to the disk when the recording operation is prohibited. A method of operating recording control of data for a disc, comprising the steps of: (S1) setting the disc in a disc drive (13); Detecting a recording density mode of the disc (S3); Comparing (S4) the recording density mode of the disk and the detected mode instructed from a host system (10) for executing drive control of the disk drive (13); Inhibiting (S5, S8) the recording operation of the data on the disc in the case where the comparison result by this comparing operation is inconsistent; In the case of a match, the step (S5, S6, S7) of allowing data recording operation on the disc; And (S9) instructing to prohibit writing of data on the disc and transmitting a write prohibition signal to the host system (10) when prohibiting a recording operation.

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