JP3758921B2 - Disk unit - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a disk device such as a floppy disk drive used as an external storage device of a computer system.
[0002]
[Prior art]
Here, a conventional disk device will be described by taking a floppy disk drive (hereinafter referred to as FDD) as an example. The FDD is a device that performs information reading and writing operations (hereinafter referred to as read / write operations) on a floppy disk (hereinafter referred to as FD) having a plurality of concentric tracks. Here, the number of tracks in the FD is 81, and each track is distinguished by assigning numbers such as 1 to 81 tracks in order from the outermost track to the innermost track. Note that the initial position (retraction position) of the magnetic head is 0 track, which is further outside the outermost track of the FD.
[0003]
When performing a read / write operation on the FD, the magnetic head is positioned in the target track by step-driving in the radial direction of the FD, and the magnetic head is moved to the track by rotating the FD by a spindle motor. Need to scan along. Of these, a stepping motor is used as means for step-driving the magnetic head in the radial direction of the FD, and its operation is controlled by supplying a direction signal and a step pulse from the host (CPU) side. . That is, the stepping motor steps drives the magnetic head by the number of step pulses in a direction indicated by the direction signal.
[0004]
[Problems to be solved by the invention]
Here, in the conventional FDD, a predetermined time T after the spindle motor starts rotating. _A Until the time elapses, the read / write operation for the FD is not permitted. This predetermined time T _A Is the time required for the rotational speed of the spindle motor to become stable at 300 to 360 rpm. _A = About 500 ms. However, in the conventional FDD, when the step pulse is input from the host side, the stepping motor is driven immediately in synchronization with the step pulse. For this reason, since the magnetic head is step-driven even when the read / write operation for the FD is not permitted, the time for holding the magnetic head at the target track position is unnecessarily long and no data is exchanged. The problem is that the power consumption is large.
[0005]
In view of the above problems, an object of the present invention is to provide a disk device that realizes power saving by prohibiting step driving of a head in a state where an access operation to the disk is not permitted.
[0006]
[Means for Solving the Problems]
In order to achieve the above object, in the disk device according to the present invention,
In a disk apparatus comprising: a head that exchanges information with a disk; a spindle motor that rotates the disk; and a stepping motor that steps the head in the radial direction of the disk based on a step pulse input.
A means for creating an internal step pulse separately from an external step pulse input from the host side, and a switching means for outputting only one of the external step pulse and the internal step pulse to the stepping motor; And a predetermined time T after the spindle motor starts to rotate by controlling the switching means. _B Until the time elapses, step driving of the head by the external step pulse or the internal step pulse is prohibited, and the predetermined time T _B When the head is not positioned on the target track after the elapse of time, the head is step-driven using the internal step pulse, and when the head is positioned on the target track, the external step pulse is used. The head is configured to be step driven.
[0007]
Specifically, a predetermined time T after the spindle motor starts rotating. _B Until the time elapses, the means for inhibiting the creation of the internal step pulse and the external step pulse or the internal step pulse output from the switching means are counted to output the current track on which the head is positioned. A one-track counter, a second track counter that outputs the target track on which the head should be positioned by counting the external step pulse input from the host side, an output of the first track counter, and a second track counter Comparing means for comparing the output with the output, and controlling the switching means based on the output of the comparing means, the predetermined time T _B Until the time elapses, step driving of the head by the external step pulse or the internal step pulse is prohibited, and the predetermined time T _B After the elapse of time, if the head is not positioned on the target track, the head is step-driven using the internal step pulse, and if the head is positioned on the target track, the external step pulse is used. The head is step-driven.
[0008]
Here, every time the external step pulse or the internal step pulse is output to the stepping motor, a predetermined time t _d The comparator means may be controlled so that the output of the first track counter and the output of the second track counter are compared after waiting. The disk device according to the present invention further includes means for simultaneously resetting both the counts of the first track counter and the second track counter when an error occurs in the step driving of the head. The creation interval of the internal step pulse is shorter than the input interval of the external step pulse.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
The disk device according to the present invention will be described by taking FDD as an example, as in the prior art. The FDD in the present embodiment is configured to control read / write operations and the like for the FD by processing various signals obtained from the host (CPU) side with the FDD LSI. FIG. 1 is a block diagram showing an FDD LSI according to the present invention.
[0010]
As shown in the figure, the FDD LSI 1 includes a control circuit 2, a large current driver circuit 3, and a signal processing circuit 4. The control circuit 2 is a logic unit that controls the large current driver circuit 3 and the signal processing circuit 4 based on a signal from the host (CPU) side. The large current driver circuit 3 is a driver circuit for driving a stepping motor or the like (not shown) that requires a relatively large current, and functions as a stepper unit. The signal processing circuit 4 is a circuit for processing a read signal for controlling reading of information and a write signal for controlling writing, and has a function as a read / write unit for controlling the operation of the magnetic head.
[0011]
Here, the configuration and operation of the control circuit 2 will be described in detail. FIG. 2 is a block diagram showing an outline of the control part of the stepper unit in the control circuit 2. FIG. 3 is a timing chart of buffered seek by the control circuit 2. As shown in FIG. 2, the control part of the stepper unit in the control circuit 2 includes a ready signal processing means 5, a step pulse processing means 6, a first track counter 7, a second track counter 8, a comparator processing means 9, and a timing processing means. 10 includes a stepper signal processing unit 11 and a reset pulse processing unit 12.
[0012]
The ready signal processing means 5 is based on the disk-in signal (A), motor-on signal (B), and index signal obtained from the host (CPU) side, and the ready signal (C) H for the ready signal (C) that restricts the read / write operation to the FD / L is switched. Here, the disc-in signal (A) is a signal indicating the insertion state of the FD, and is at the H level when the FD is not inserted and at the L level when the FD is inserted. The motor-on signal (B) is a signal indicating on / off of the spindle motor that rotates the FD, and is at the H level when the motor is off and at the L level when the motor is on. The index signal is a signal that depends on the rotational speed of the FD. The ready signal (C) is a signal sent to the signal processing circuit 4.
[0013]
As shown in FIG. 3, in order to allow the read / write operation with respect to the FD when the ready signal (C) is at the L level, the FD is inserted and the spindle motor starts rotating. Time T _A It is necessary to pass (generally about 500 ms). However, the predetermined time T _A If the index signal is unstable even after the lapse of time, the ready signal (C) maintains the H level until the index signal is stabilized. This is because when the rotational speed of the spindle motor is unstable, an error is likely to occur in the read / write operation, and in the worst case, information recorded on the FD may be destroyed.
[0014]
Further, signals such as an external step pulse (D) and a direction signal (J) are irregularly input to the control circuit 2 from the host (CPU) side. These signals are necessary for step-driving the magnetic head in the radial direction of the FD. The external step pulse (D) is a signal instructing how many steps the magnetic head is driven, and the direction signal (J) is a signal instructing the direction of step driving. By controlling the stepping motor based on these signals, the magnetic head can be positioned on the target track. The input interval t of the external step pulse (D) ₁ Is longer than 3 ms at the shortest, usually about 6 ms.
[0015]
Here, in the FDD in this embodiment, the magnetic head is not immediately configured to be step-driven in synchronization with the input of the external step pulse (D) as in the prior art, but a read / write operation with respect to the FD is permitted. The step driving of the magnetic head is prohibited immediately before starting, that is, immediately before the ready signal (C) becomes L level.
[0016]
First, an external step pulse (D) from the host (CPU) side is input to the step pulse processing means 6. The step pulse processing means 6 comprises an internal step pulse creating means 6a and a step pulse switching means 6b. The internal step pulse creating means 6a creates a unique internal step pulse (E) separately from the external step pulse (D). The internal step pulse (E) generation interval t ₂ Is the input interval t of the external step pulse (D) ₁ It is shorter than 3 ms to 4 ms.
[0017]
The step pulse switching means 6 b is a switching means for outputting only one of the external step pulse (D) and the internal step pulse (E) to the stepper signal processing means 11. Here, the output of the step pulse switching means 6b is sent not only to the stepper signal processing means 11 but also to the first track counter 7, and the current track (F) where the magnetic head is located is counted. ing. The stepper signal processing means 11 forms a stepper signal based on the step pulse output from the step pulse processing means 6 and sends it to the large current driver circuit 3. The stepper signal is a signal whose phase is controlled in order to drive the stepping motor composed of a bipolar four-phase motor or the like.
[0018]
Here, in order to prohibit the step drive of the magnetic head until just before the read / write operation becomes possible, the step pulse processing means 6 keeps the internal step pulse until the ready signal processing means 5 outputs a step drive permission signal. The creation of the internal step pulse (E) by the creation means 6a is prohibited. On the other hand, the step pulse switching means 6b is initially set to prohibit the sending of the external step pulse (D) to the stepper signal processing means 11. As described above, the external step pulse (D) input from the host (CPU) side during the period in which the step driving is prohibited is sent to the second track counter 8 not only to the step pulse processing means 6 one by one. The target track (G) where the magnetic head should be positioned is counted.
[0019]
The step drive permission signal is a predetermined time T after the motor-on signal (B) becomes L level. _B It is a signal output after elapse. Here, in order to reduce the step drive in a state where data cannot be exchanged, the predetermined time T _B Should be taken longer. For example, T _B = T _A If such extreme settings are made, it is true that unnecessary step driving can be completely eliminated. However, since the magnetic head finally starts step driving after the read / write operation is possible, access to the FD is delayed, which is not good.
[0020]
Therefore, in the FDD in this embodiment, the output interval t of the internal step pulse (E) ₂ Is 3 ms to 4 ms, and the number of FD tracks is 81, the predetermined time T is as follows: _B The value of is set. That is, a predetermined time T required until a read / write operation can be performed. _A Based on the value obtained by subtracting the longest time required for step driving (81 tracks × 4 ms = 324 ms) from (≈500 ms), T _B = 200 ms is set. Thereby, the time for holding the magnetic head at the target track position can be shortened as much as possible, and the magnetic head can be positioned at the target track until the read / write operation becomes possible. The predetermined time T _A And a predetermined time T _B For the counting means, the ready signal processing means 5 may be provided with a clock counter or the like.
[0021]
Further, in the FDD in this embodiment, the current track (F) of the magnetic head matches the target track (G) by comparing the output of the first track counter 7 and the output of the second track counter 8. Comparator processing means 9 is provided for determining whether or not it is correct. Here, the timing of the comparator operation is controlled by the timing processing means 10, and the comparison result signal (H) output from the comparator processing means 9 is sent to the step pulse switching means 6b at a predetermined timing.
[0022]
The comparison result signal (H) is a signal that is at the L level if the current track (F) and the target track (G) match, and that is the H level if they do not match. Here, the step pulse switching means 6b is controlled by the comparison result signal (H). If the comparison result signal (H) is L level, the external step pulse (D) is directly output, and conversely, if it is H level. For example, an internal step pulse (E) is output. The operations of the comparator processing unit 9 and the timing processing unit 10 will be described in detail later.
[0023]
Predetermined time T _B When the step driving permission signal is output after the elapse of time, the internal step pulse generating means 6a starts generating the internal step pulse (E). On the other hand, the step pulse switching means 6b sends the internal step pulse (E) to the stepper signal processing means 11 until the current track (F) of the magnetic head matches the target track (G) based on the comparison result signal (H). Is sent to. By such a buffered seek operation, the magnetic head performs step driving to a target track. Then, when the current track (F) coincides with the target track (G), the operation is switched to the normal seek operation for sending the external step pulse (D) to the stepper signal processing means 11.
[0024]
With such a configuration, the time for holding the magnetic head on the target track can be shortened, so that wasteful power consumption can be reduced, which is very economical. In particular, when the FDD is driven using a battery, the FDD drive time can be greatly extended. On the other hand, the output interval t of the internal step pulse (E) ₂ The input interval t of the external step pulse (D) ₁ By making it shorter, the time required for step driving can be shortened. Thereby, it is also possible to reduce the seek sound of FDD.
[0025]
Hereinafter, the buffered seek operation described so far will be specifically described with reference to FIG. As shown in the figure, in the FDD according to the present invention, even when the input of the external step pulse (D) starts, a predetermined time T _B Until the time elapses, step driving of the magnetic head is prohibited, so the current track (F) indicated by the first track counter 7 remains 0 track. On the other hand, the second track counter 8 receives the external step pulse (D) and counts the target track (G) one by one, and increases the count for each pulse. Therefore, the predetermined time T _B By the time elapses, there is a difference of 3 tracks between the current track (F) and the target track (G).
[0026]
Thereby, the predetermined time T _B When the step drive permission signal is output after the elapse of time, a comparison result signal (H) indicating that the current track (F) and the target track (G) of the magnetic head do not match is output from the comparator processing means 9. The Upon receiving this comparison result signal (H), the step pulse switching means 6b sends an internal step pulse (E) to the stepper signal processing means 11 in order to drive the magnetic head to the target track (G). Perform buffered seek operation.
[0027]
Then, when the output of the first track counter 7 and the output of the second track counter 8 coincide with each other due to the internal step pulse (E), the comparator processing means 9 determines that the current track (F), the target track (G) A comparison result signal (H) indicating that they match is output. In response to the comparison result signal (H), the step pulse switching means 6b shifts to a normal seek operation in which the external step pulse (D) inputted thereafter is directly sent to the stepper signal processing means 11.
[0028]
Next, operations of the comparator processing unit 9 and the timing processing unit 10 will be described. As described above, the comparator processing means 9 compares the output of the first track counter 7 and the output of the second track counter 8 and outputs the comparison result as a comparison result signal (H). The timing of the rate operation is controlled by the timing processing means 10. The timing processing means 10 outputs a predetermined time t every time an external step pulse (D) or an internal step pulse (E) is output to the stepping motor. _d Then, the comparator pulse (I) is output. Comparator processing means 9 performs a comparison operation in response to this comparison pulse (I) and outputs a comparison result signal (H).
[0029]
Here, in the FDD in the present embodiment, a predetermined time t _d Is set to 2.7 ms. This is a value considering the response performance of the stepping motor that drives the magnetic head stepwise. Generally, the response performance of the stepping motor is about 2.5 ms, and it cannot react to step pulses input at shorter intervals. Therefore, if the comparator operation is performed simultaneously with the step pulse input, the external step pulse (within 2.5 ms) immediately after the current track (F) and the target track (G) of the magnetic head coincide with each other. When D) is input, the external step pulse (D) is not accepted by the stepping motor, and a seek error occurs.
[0030]
In contrast to this, every time an external step pulse (D) or an internal step pulse (E) is output to the stepping motor as in the FDD in the present embodiment, a predetermined time t. _d The output of the first track counter 7 and the output of the second track counter 8 are compared with each other, so that the current track (F) and the target track (G) of the magnetic head can be obtained. Even if an external step pulse (D) is input immediately after the match, a seek error does not occur because the buffered seek operation is continued. Thereby, the error rate characteristic of FDD can be improved.
[0031]
Further, in the FDD in the present embodiment, the reset pulse processing means 12 is provided for the purpose of improving the impact resistance performance. FIG. 4 is a timing chart of the track counter reset. When an impact or the like is applied to the FDD, the position of the magnetic head shifts regardless of the step pulse, and the current track (F) output from the first track counter 7 and the actual track (M ) May not match. The host determines such a state as a seek error based on the data read from the FD, and outputs an external step pulse (D) for returning the magnetic head to the initial position (0 track) to the step pulse processing means 6. To do.
[0032]
At this time, if the magnetic head is deviated in the outer circumferential direction from the track position where it should originally exist due to the impact, the magnetic head has already returned to 0 track by the external step pulse (D). In the outputs of the 1-track counter 7 and the second track counter 8, there is a misconception that the magnetic head has not yet returned to the 0-track. In such a state, the subsequent step drive cannot be performed normally, and the power supply must be shut down once.
[0033]
In order to solve such a problem, the host outputs a 0 track pulse (K) to the reset pulse processing means 12 when detecting that the actual head position (M) has reached the initial position (0 track). Here, the reset pulse processing means 12 receiving the input of the 0 track pulse (K) confirms the direction of the direction signal (J) and detects that the direction signal (J) is still directed toward the outer periphery of the FD. If this is the case, the predetermined time t _a (T _a <T ₁ ), A reset pulse (L) is sent to the first track counter 7 and the second track counter 8.
[0034]
As a result, the counts of the first track counter 7 and the second track counter 8 are both reset to 0, so that the current track (F) output from the first track counter 7 and the output from the second track counter 8 The track (G) and the actual track (M) of the magnetic head all coincide. In the present embodiment, the predetermined time t _a The input interval t of the external step pulse (D) ₁ Shorter values (eg t _a = 2.5 ms), it is possible to prevent a problem that the input of the external step pulse (D) is continued even though the head returns to the 0 track.
[0035]
On the other hand, when the host detects the output of the reset pulse (L), it switches the direction signal (J) inward and outputs the output of the external step pulse (D) again to return the magnetic head to the original track before the impact. Start. With the above configuration, even when an impact or the like is applied to the FDD and a seek error occurs, the seek operation can be promptly restored to a state where it can be retried.
[0036]
In the above-described embodiment, the FDD has been described as an example. However, the present invention is not limited to the FDD, and can be widely applied to an apparatus that accesses a disk by step-driving the head. can do.
[0037]
【The invention's effect】
In the disk device according to the present invention, the predetermined time T _B Until the time elapses, step driving of the head is prohibited and a predetermined time T _B When the head is not positioned on the target track based on the output of the comparing means after the time elapses, the head is stepped using an internal step pulse, and when the head is positioned on the target track The head is step-driven using an external step pulse.
[0038]
By performing such a buffered seek operation, the time for holding the head on the target track in a state where the disk cannot be accessed can be shortened, so that wasteful power consumption can be reduced, which is very economical. In particular, when the disk device is driven using a battery, the life of the battery can be greatly extended. Note that by setting the internal step pulse generation interval shorter than the shortest input interval of the external step pulse, the time required for step driving can be shortened, so that the seek sound can be reduced.
[0039]
Further, every time the external step pulse or the internal step pulse is output to the stepping motor, a predetermined time t _d The comparator is controlled so that the output of the first track counter and the output of the second track counter are compared after waiting. As a result, even if the external step pulse is input immediately after the current track and the target track of the head coincide with each other, the buffered seek operation is continued and no seek error occurs. Thereby, the error rate characteristic of the seek operation can be improved.
[0040]
Further, the disk device according to the present invention has means for simultaneously resetting both the counts of the first track counter and the second track counter when an error occurs in the step drive of the head. With such a configuration, even when an impact or the like is applied to the disk device and a seek error occurs, the seek operation can be promptly restored to a state where it can be retried.
[Brief description of the drawings]
FIG. 1 is a block diagram showing an FDD LSI according to the present invention.
2 is a block diagram showing an outline of a control portion of a stepper unit in a control circuit 2. FIG.
FIG. 3 is a timing chart of buffered seek by the control circuit 2;
FIG. 4 is a timing chart of track counter reset.
[Explanation of symbols]
1 LSI for FDD
2 Signal processing circuit
3 Large current driver circuit
4 Control circuit
5 Ready signal processing means
6 Step pulse processing means
6a Internal step pulse generation means
6b Step pulse switching means
7 First track counter
8 Second track counter
9 Comparator means
10 Timing processing means
11 Stepper signal processing means
12 Reset pulse processing means

Claims (5)

In a disk apparatus comprising: a head that exchanges information with a disk; a spindle motor that rotates the disk; and a stepping motor that steps the head in the radial direction of the disk based on a step pulse input.
A means for creating an internal step pulse separately from an external step pulse input from the host side, and a switching means for outputting only one of the external step pulse and the internal step pulse to the stepping motor; And controlling the switching means,
Said from the spindle motor is started to rotate until the predetermined time T _B has elapsed prohibit any step driving of the head by the inner step pulse and step driving of the head by the external step pulse, said predetermined time T _B When the head is not positioned on the target track after the elapse of time, the head is step-driven using the internal step pulse, and when the head is positioned on the target track, the external step pulse is used to A disk device characterized by step-driving a head. Until said spindle motor has elapsed the predetermined time T _B from the start of rotation, and means for inhibiting the creation of the internal step pulse,
A first track counter that outputs the current track on which the head is located by counting the external step pulse or the internal step pulse output from the switching means;
A second track counter that outputs a target track on which the head is to be positioned by counting the external step pulse input from the host side;
Comparing means for comparing the output of the first track counter and the output of the second track counter;
Provided with a said by controlling said switching means based on the output of the comparator means, wherein until a predetermined time T _B has elapsed the head by the inner step pulse and step driving of the head by the external step pulse step driven either prohibited, and after the predetermined time T _B has elapsed, when the head is not located at the destination track to drive step the head with the internal step pulse, the head object 2. The disk apparatus according to claim 1, wherein when the head is positioned on a track, the head is step-driven using the external step pulse. The external step pulse or said inner step pulse after waiting a predetermined time t _d for each to be output to the stepping motor, so as to compare the output of the first track counter and an output of the second track counter 3. The disk device according to claim 2, wherein the comparing means is controlled. 4. The disk apparatus according to claim 2, further comprising means for simultaneously resetting both counts of the first track counter and the second track counter when an error occurs in the step driving of the head. . The disk apparatus according to claim 1, wherein the internal step pulse generation interval is shorter than the input interval of the external step pulse.

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