JP2001168833A - Ofdm receiver - Google Patents

Abstract

PROBLEM TO BE SOLVED: To stably output a clock error signal, independently of the performance of a specific demodulation module. SOLUTION: Correlation outputs are synthesized on the basis of a peak value of each demodulation module. A measurement result of peak timing is fed to an error detection circuit 112 and a buffer circuit of each demodulation module. The error detection circuit 112 generates a clock error signal from the difference between a peak timing and a specified timing and gives the clock error signal to a clock recovery circuit 113. The clock recovery circuit 113 controls the oscillation frequency of a local oscillator 105 so as to decrease the clock error signal and its output signal is fed to each demodulation module, and all the demodulation modules are operated by a common clock.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an OFDM for receiving an OFDM signal in which one symbol period is composed of a guard period and an effective symbol period, and a part after the effective symbol period is cyclically copied in the guard period. Regarding the receiving device,
In particular, the present invention relates to a clock recovery technique in a diversity receiving apparatus.

[0002]

2. Description of the Related Art In recent years, orthogonal frequency division multiplexing (hereinafter referred to as OFDM), which is a type of multicarrier digital modulation, has been used as a modulation system for digital terrestrial broadcasting and mobile reception.
Attention has been paid to modulation schemes. In addition, a clock recovery method is known to obtain timing for receiving transmission data. As a clock recovery method in an OFDM receiving apparatus that receives an OFDM modulated signal, for example, a method of obtaining a correlation between a guard period and an effective symbol period is known. This operating principle is shown in FIG. The transmission symbol period of OFDM includes an effective symbol period and a guard period. The effective symbol period is a signal period necessary for data transmission. The guard period is a signal period for reducing the effect of multipath (ghost), and is a signal obtained by copying a part of the signal waveform in the effective symbol period. Therefore, a correlation waveform obtained by multiplying the received signal by a signal obtained by delaying the received signal by the effective period to obtain a moving average of the guard period width shows a peak at a symbol boundary. When clock reproduction is ideally performed, the peak appearance interval is always constant. However, actually, the peak appearance interval fluctuates due to the clock error. Therefore, clock recovery is performed by observing the cycle of this peak and controlling the cycle to be constant.

[0003] In mobile reception, the received signal is susceptible to fading in which the received signal fluctuates greatly over time. Therefore, it is known that the reception performance can be improved by configuring the receiving device to have a diversity configuration including a plurality of demodulation modules. This is to improve the reception performance by complementing the signal of the demodulation module whose received power has been reduced due to the fluctuation with the signal of another module which is less affected by the fluctuation.

Conventionally, as an example of the configuration of an OFDM receiver having a diversity configuration, the configuration shown in FIG. 6 is known.

In FIG. 6, a received signal is input to tuners 11 and 12 of each demodulation module in parallel. The input received signal is frequency-converted to the IF band by the tuners 11 and 12, and then the A / D converter 1
3 and 15. A / D converters 13 and 15 convert the signals into digital signals, and output the signals to IQ demodulators 17 and 1.
8 is supplied. The IQ demodulators 17 and 18 convert the input digital signal into a complex baseband signal.
Of the complex baseband signals obtained by the IQ demodulators 17 and 18, the I-axis signal is input to the correlation detection circuits 19 and 22. The correlation detection circuits 19 and 22 perform the guard correlation detection described above, and the resulting correlation output is supplied to peak detection circuits 25 and 26. The peak detection circuits 25 and 26 measure a peak appearance location (peak timing) and a peak value from the correlation output. The peak timing signal obtained here is input to FFT (fast Fourier transform) circuits 27 and 28 and error detection circuits 20 and 23.
In the FFT circuits 27 and 28, this peak timing is
It is used as the start timing of the FT processing (conversion from the time domain to the frequency domain). Further, the error detection circuits 20, 2
In 3, a clock error signal is generated by taking the difference between the peak timing signal and the predetermined timing signal. The generated clock error signal is supplied to clock recovery circuits 21 and 24.
Supplied to In the clock recovery circuits 21 and 24, the local oscillators 14 and 24 reduce the clock error signal.
16 is controlled.

On the other hand, the complex baseband signals output from the IQ demodulators 17 and 18 are also supplied to FFT circuits 27 and 28. In the FFT circuits 27 and 28, FFT processing is performed for an effective symbol period in one symbol period of the OFDM reception signal. The above-described peak timing is used as the start timing of the FFT processing.
The outputs of the FFT circuits 27 and 28 are output from the demodulation circuits 29 and
30 and receive data from each demodulation module. Finally, the received data obtained by each demodulation module is combined into one and becomes the final output. However, the inputs to each demodulation module are physically separated,
In addition, since each demodulation module independently performs clock reproduction and demodulation processing, clocks and received data are not synchronized between the demodulation modules. Therefore, in order to combine the received data obtained by each demodulation module into one, it is necessary to change the clock and adjust the delay of the received data. In this method, one of the demodulation modules serves as a master module, and supplies a clock and a timing signal to other modules (slave modules). A buffer circuit 32 is prepared in the slave module, and performs clock switching and delay adjustment of received data using a signal supplied from the master module. As a result, the data received from each demodulation module is synchronized with the clock and output timing of the master module, and is finally output with the signal complemented by the synthesis circuit 31. As described above, in the OFDM receiver having the diversity configuration, it is possible to prevent the deterioration of the reception performance even in the presence of fading.

However, since the processing in the buffer circuit provided in each demodulation module is performed by using the signal from the master module in common, the performance of the clock recovery of the entire receiving device is the performance of the master module alone. Will depend on Once the received signal fluctuates due to fading, the guard correlation waveform described above does not show a stable peak in the symbol period,
It is impossible to stably output the clock error signal. That is, the fading only affects the master module, and the clock regenerating ability as the receiving device is reduced.

[0008]

As described above, in an OFDM receiver having a diversity configuration, the clock recovery performance of the entire receiver depends on the performance of a single master module. When affected, the clock recovery performance deteriorated.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problem, and provides an OFDM receiver which can stably output a clock error signal without depending on the performance of a specific demodulation module. With the goal.

[0010]

In order to achieve the above object, the present invention provides an OFDM (orthogonal frequency division multiplex) in which one symbol period is composed of a guard period and an effective symbol period.
After receiving the signal and performing A / D conversion on the basis of the oscillation frequency of the local oscillator, the signal is converted into a complex baseband signal, and demodulation modules for demodulating symbol data from the complex baseband OFDM signal are arranged in parallel. In the OFDM receiving apparatus having a diversity configuration, each demodulation module includes: a correlation detecting means for detecting a correlation waveform in a guard period in a complex baseband OFDM signal; and a peak value and a peak value of the correlation waveform from an output of the correlation detecting means. First peak detecting means for detecting a timing (appearance position) signal, buffering means for performing delay adjustment on the complex baseband OFDM signal, and a buffer in the complex baseband OFDM signal which has been delayed and adjusted by the buffering means. By converting the effective symbol period from a time domain to a frequency domain signal, OF And fast Fourier transform means for demodulating the data of each subcarrier of the M signals, provided with a demodulating means for demodulating the symbol data being transmitted from the output of the fast Fourier transform unit to each subcarrier,
A correlation synthesizing means for inputting a correlation waveform signal from the correlation detecting means in each demodulation module and a peak value from the first peak detecting means to synthesize a correlation waveform; Second peak detecting means for detecting a peak timing signal; error detecting means for generating a clock error signal from a difference between the peak timing signal detected by the second peak detecting means and a predetermined timing signal; Clock recovery means for inputting a clock error signal from the means and controlling the oscillation frequency of the local oscillator so that the clock error signal is reduced;
Combining means for combining demodulated data from the output of the demodulation means in each demodulation module; and
A peak timing signal of a correlation waveform for each demodulation module is input from the first peak detection means, and a peak timing signal of a composite correlation waveform is input from the second peak detection means, and delays are performed so as to absorb a delay difference between the demodulation modules. I am adjusting.

According to the above configuration, all demodulation modules operate with a common clock, and the buffer circuits disposed in each demodulation module adjust the delay of the received signal.
The delay difference for each demodulation module is absorbed.

[0012]

Embodiments of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a block diagram showing a configuration of an OFDM receiving apparatus according to an embodiment of the present invention. In FIG. 1, received signals are input in parallel to tuners 101 and 102 of each demodulation module. The input received signal is frequency-converted to the IF band by the tuners 101 and 102, and then the A / D converter 10
3,104. A / D converters 103 and 104
Is converted to a digital signal, and its output is output to the IQ demodulator 106,
107. The IQ demodulators 106 and 107 convert the input digital signal into a complex baseband signal. Of the complex baseband signals obtained by the IQ demodulators 106 and 107, I-axis signals are input to correlation detection circuits 108 and 109. This correlation detection circuit 10
At 8 and 109, guard correlation detection is performed, and the resulting correlation output is supplied to peak detection circuits 114 and 115 and a correlation synthesis circuit 110. Peak detection circuit 1
In steps 14 and 115, the location of the peak (peak timing) and the peak value are measured from the input correlation output. The peak timing signal obtained here is supplied to the buffer circuit 11
6,117. On the other hand, the peak value is supplied to the correlation synthesis circuit 110.

The correlation synthesis circuit 110 synthesizes a correlation output based on the peak value from each demodulation module. Details of the processing here will be described later. The correlation output from the correlation synthesis circuit 110 is supplied to a peak detection circuit 111. The peak detection circuit 111 measures the peak timing of the correlation output obtained by the correlation synthesis circuit 110. This measurement result is supplied to the error detection circuit 112 and the buffer circuits 116 and 117 of each demodulation module.
The error detection circuit 112 generates a clock error signal by calculating the difference between the peak timing signal and the predetermined timing signal. The generated clock error signal is supplied to the clock recovery circuit 113. The clock recovery circuit 113 controls the transmission frequency of the local oscillator 105 so that the clock error signal becomes smaller. The output signal from the local oscillator 105 is output to the A / D converter 10 of each demodulation module.
3, 104 respectively. Therefore, all demodulation modules operate on a common clock.

The buffer circuit provided in each demodulation module adjusts the delay of the received signal and absorbs the delay difference between the demodulation modules. Buffer circuit 11
6, 117 are supplied with a complex baseband signal from the IQ demodulation circuits 106 and 107 and two kinds of peak timing signals. One of the two types of peak timing signals is a peak detection circuit 114, 11 for each demodulation module.
5 and the other is supplied from a peak detection circuit 111 commonly used in the entire receiving apparatus. The former is used as a write timing signal to the buffer circuits 116 and 117. On the other hand, the latter is used as a read timing signal from the buffer circuits 116 and 117. That is, the readout timing signal is common between the demodulation modules. Therefore, data signals synchronized in timing in all demodulation modules are output from buffer circuits 116 and 117. The data from the buffer circuits 116 and 117 is supplied to FFT circuits 118 and 119 at the subsequent stage. The FFT circuits 118 and 119 perform fast Fourier transform processing (conversion from the time domain to the frequency domain) for an effective symbol period in one symbol period of the OFDM signal. Then, outputs of the FFT circuits 118 and 119 are supplied to demodulation circuits 120 and 121, and reception data in each demodulation module is obtained. Finally, the received data obtained by each demodulation module is supplied to the synthesizing circuit 122, where the data is synthesized into a final output.

Here, the synthesis of the correlation output will be described. FIG. 2 shows the operation of the correlation synthesis circuit 110 in FIG. First, the peak values peak0 and peak1 from each demodulation module are supplied to the proportional calculator 201, and the proportional values factor0 and factor1 corresponding to the peak values are calculated.
These proportional values are supplied to one input terminal of multipliers 202 and 203. The other input terminals of the multipliers 202 and 203 are supplied with correlation output signals in0 and in1, respectively. Multiplier 2
The result of the multiplication of 02 and 203 is sent to the adder 204, where the signal of each demodulation module is added. By these series of processes, the correlation outputs from each demodulation module are combined.

Next, another embodiment of the OFDM receiver according to the present invention will be described with reference to FIG.

The configuration of the OFDM receiver shown in FIG.
It has the same components as those described in FIG.
Instead of the correlation synthesis circuit 110 and the peak detection circuit 111, a peak selection circuit 123 is added to the configuration. Therefore, the same reference numerals are given to the same portions in FIG. 1 and FIG. 3, and the description of the same portions is partially omitted.

In FIG. 3, the correlation detection circuits 108 and 10
The correlation output from 9 is supplied only to the peak detection circuits 114 and 115. Not only the peak value but also a peak timing signal is supplied from the peak detection circuits 114 and 115 to the peak selection circuit 123. Peak selection circuit 12
At 3, any one of the input peak timing signals is selected. The selected timing signal is supplied to the error detection circuit 112 and the buffer circuit 116 of each demodulation module.
117.

Here, the processing of the peak selection circuit will be described. FIG. 4 shows the operation of the peak selection circuit 123 in FIG. The peak values peak0 and peak1 from each demodulation module are supplied to the comparator 205, and the maximum value is calculated. The obtained maximum value is output to the multiplexer 206.
Supplied to The multiplexer 206 selects and outputs the peak timing signal from the demodulation module corresponding to the maximum value.

With such a configuration, a multiplier and an adder used for synthesizing the correlation output and a peak detection circuit are not required as compared with the embodiment shown in FIG. 1, and the circuit scale can be reduced. it can.

[0021]

As described above, according to the present invention, even when an OFDM receiver is configured by a diversity configuration, a clock error signal can be stably output without depending on the performance of a specific demodulation module. OFDM receiving apparatus can be provided.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of an OFDM receiving apparatus according to the present invention.

FIG. 2 is a block diagram showing a specific configuration of the correlation synthesis circuit according to the embodiment.

FIG. 3 is a block diagram showing another embodiment of the OFDM receiving apparatus according to the present invention.

FIG. 4 is a block diagram showing a specific configuration of a peak selection circuit according to the embodiment.

FIG. 5 is a diagram for explaining a conventional guard period correlation detection method.

FIG. 6 is a block diagram showing an example of a conventional OFDM receiving apparatus having a diversity configuration.

[Explanation of symbols]

101, 102: Tuner, 103, 104: A / D converter, 105: Local oscillator, 106, 107: IQ demodulation circuit, 108, 109: Correlation detection circuit, 110: Correlation synthesis circuit, 111, 115: Peak detection circuit , 112... Error detection circuit, 113... Clock recovery circuit, 116, 11
7 ... Buffer circuit, 118, 119 ... FFT circuit, 12
0, 121: demodulation circuit, 122: synthesis circuit, 123: peak selection circuit, 201: proportional value calculation unit, 202: multiplier, 203: multiplier, 204: adder, 205: comparator, 206: multiplexer, 11 , 12 ... Tuner,
13 ... A / D converter, 14, 16 ... Local oscillator, 15 ...
A / D converters, 17, 18 ... IQ demodulation circuits, 19, 22
... Correlation detection circuit, 20, 23 ... Error detection circuit, 21, 22
4: clock recovery circuit, 25, 26: peak detection circuit,
27, 28 ... FFT circuit, 29, 30 ... demodulation circuit, 31
... Synthesis circuit, 32 ... Buffer circuit.

Continued on the front page F term (reference) 5K022 DD01 DD13 DD17 DD19 DD33 DD44 5K047 AA03 AA05 AA11 BB01 CC01 EE02 GG11 GG34 GG37 HH15

Claims (4)

[Claims] 1. An OFDM (Orthogonal Frequency Division Multiplexing) signal in which one symbol period is composed of a guard period and an effective symbol period is received, and A is determined based on the oscillation frequency of a local oscillator.
/ D conversion, converts the complex baseband signal into a complex baseband signal, and a diversity demodulation module in which demodulation modules for demodulating symbol data from the complex baseband OFDM signal are arranged in parallel. Is a correlation detection means for detecting a correlation waveform of a guard period in the complex baseband OFDM signal, and a first peak detection for detecting a peak value and a peak timing (appearance position) signal of the correlation waveform from an output of the correlation detection means. Means, buffering means for performing delay adjustment on the complex baseband OFDM signal, and conversion of the effective symbol period in the complex baseband OFDM signal adjusted by the buffering means from a time domain to a frequency domain signal. By doing so, it is possible to demodulate the data of each subcarrier of the OFDM signal. Fourier transforming means, and demodulating means for demodulating the symbol data transmitted to each subcarrier from the output of the fast Fourier transforming means, and the correlation waveform signal from the correlation detecting means in each demodulation module, Correlation synthesizing means for inputting the peak values from the first peak detecting means and synthesizing a correlation waveform, and second peak detecting means for detecting a peak timing signal of the synthesized correlation waveform synthesized by the correlation synthesizing means. Error detecting means for generating a clock error signal from a difference between the peak timing signal detected by the second peak detecting means and a predetermined timing signal; and inputting the clock error signal from the error detecting means, Clock recovery means for controlling the oscillation frequency of the local oscillator so that the error signal is reduced; Synthesizing means for synthesizing demodulated data from the output of the demodulation means in the modulation module, wherein the buffering means transmits the peak timing signal of the correlation waveform for each demodulation module from the first peak detection means to the 2, a peak timing signal of the combined correlation waveform is input from the peak detecting means 2 and
An OFDM receiver, wherein a delay is adjusted so as to absorb a delay difference between demodulation modules. 2. The correlation synthesizing means, having inputted the peak value from each demodulation module, calculates a proportional value according to the peak value, and after multiplying the proportional value by each correlation output signal,
2. The OFDM receiver according to claim 1, wherein the multiplication results are added to generate a synthetic correlation signal. 3. An OFDM (Orthogonal Frequency Division Multiplexing) signal in which one symbol period is composed of a guard period and an effective symbol period is received, and A is determined based on the oscillation frequency of a local oscillator.
/ D conversion, converts the complex baseband signal into a complex baseband signal, and a diversity demodulation module in which demodulation modules for demodulating symbol data from the complex baseband OFDM signal are arranged in parallel. Correlation detection means for detecting a correlation waveform of a guard period in the complex baseband OFDM signal, peak detection means for detecting a peak value of a correlation waveform and a peak timing (appearance position) signal from an output of the correlation detection means, Buffering means for adjusting the delay of the complex baseband OFDM signal, and converting the effective symbol period in the complex baseband OFDM signal adjusted by the buffering means from a time domain to a frequency domain signal. , A high-speed demodulator for demodulating the data of each subcarrier of the OFDM signal. D conversion means, and a demodulation means for demodulating the symbol data transmitted to each subcarrier from the output of the fast Fourier transform means, and the peak value of the correlation waveform from the peak detection means in each demodulation module A peak selecting means for inputting a peak timing signal and selecting one of the peak timings as a selected timing signal, and a clock error signal is generated from a difference between the selected timing signal selected by the peak selecting means and a predetermined timing signal. Error detecting means for inputting the clock error signal from the error detecting means, controlling the oscillation frequency of the local oscillator so as to reduce the clock error signal, and the demodulating means in each demodulating module. Combining means for combining demodulated data from the output of The buffering unit inputs a peak timing signal of a correlation waveform for each demodulation module from the peak detection unit and a selection timing signal from the peak selection unit, and adjusts the delay so as to absorb a delay difference for each demodulation module. An OFDM receiver characterized by the above-mentioned. 4. The apparatus according to claim 3, wherein said peak selecting means compares peak values from each demodulation module and selects a peak timing signal from the demodulation module corresponding to the maximum value as a selection timing signal. OFD
M receiving device.