JP2001168397A - Chip type semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To strengthen fixing of a semiconductor element to a conductive pattern and to reduce the using amount of a metal material used for the pattern. SOLUTION: A plurality of holes are formed at the fixed part of the semiconductor element of at least the conductive pattern. Here, it is preferred that the opening area per one hole is in a range of 0.8 to 2% of the area of the fixed part of the element from the points of view of continuity and fixing effect with the element, and it is preferred that the overall opening area of the fixed part of the element is in the range of 40 to 60% of the area of the fixed part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip type semiconductor device, and more particularly to a chip type semiconductor device capable of firmly bonding a semiconductor element and reducing the amount of a conductive pattern material used.

[0002]

2. Description of the Related Art With the recent trend toward smaller and thinner electronic devices, the demand for electronic components that can be surface-mounted on circuit boards, that is, chip-type semiconductor devices, is rapidly increasing. A chip-type semiconductor device (hereinafter sometimes referred to as a chip-type device) usually has a shape close to a rectangular parallelepiped block, and a terminal electrode is formed on a bottom surface or a side surface near the bottom surface. A chip-type device is arranged on a circuit board so that the terminal electrode and a wiring pattern on the circuit board are in contact with each other, and the chip-type device is fixed on the substrate using a conductive adhesive such as cream solder.

FIG. 4 shows a conventional typical chip type device.
Shown in Terminal electrodes 2 and 2 ′ are formed at both ends in the longitudinal direction of the upper surface of the chip substrate 1 having a rectangular shape in a plan view. Then, on the surface of the substrate 1, a first conductive pattern 9 electrically connected to the terminal electrode 2 is formed integrally with the terminal electrode 2,
Similarly, the second conductive pattern 10 electrically connected to the terminal electrode 2 '
Are formed integrally with the terminal electrode 2 ′. The semiconductor element 5 is fixed to the first conductive pattern 9 with a silver paste (conductive adhesive) 8, and the second conductive pattern 10 is formed with a wire bonding portion (not shown). It is connected to an electrode (not shown) by a bonding wire 6. Then, the semiconductor element 5 and the bonding wire 6, the first and second conductive patterns 9, 10
Is sealed with a transparent or translucent resin.

[0004]

Incidentally, the above-mentioned conductive pattern is generally formed of a metal material such as Au, Ni or Cu. Since the surface of the conductive pattern made of such a metal material is generally smooth, the adhesion strength with a conductive adhesive such as a silver paste is low, and there has been a problem that the semiconductor element peels off together with the silver paste in a manufacturing process or the like. In order to prevent such a problem, for example, Japanese Utility Model Laid-Open No. 5-90967 proposes forming a cut in the conductive pattern in the mounting position area of the LED chip in an inward direction. In other words, this proposed technique aims to utilize the adhesion between the substrate and the conductive adhesive by forming cuts in the conductive pattern so that the conductive adhesive flows down from the surface of the conductive pattern onto the substrate. However, when the amount of the conductive adhesive flowing down increases, a short circuit may occur on the substrate.

On the other hand, with respect to the above-mentioned amount of the metal material, if this amount can be reduced, it leads to a reduction in the manufacturing cost of the chip-type semiconductor device, and is desirable from the viewpoint of effective use of resources which has been strongly demanded in recent years. It is. However, a technique mainly aimed at reducing the amount of metal material used for the conductive pattern has not been proposed so far as far as the present inventors have investigated.

The present invention has been made in view of such a conventional problem, and has as its object to reduce the amount of metal material used in a conductive pattern by strengthening the adhesion of a semiconductor element to the conductive pattern.

[0007]

According to the present invention, there is provided a chip type semiconductor device in which a semiconductor element is fixed to a conductive pattern formed on a surface of a chip substrate with a conductive adhesive. A chip-type semiconductor device is provided, wherein a plurality of holes are formed in a portion where the semiconductor element is fixed in the pattern.

Here, from the viewpoint of the conductivity with the semiconductor element and the effect of fixing, the opening area per hole is preferably in the range of 0.8 to 2% of the area of the fixing part of the semiconductor element. It is preferable that the total opening area of the holes in the fixed portion of the semiconductor element is in the range of 40 to 60% of the area of the fixed portion.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION The inventors of the present invention have sought to strengthen the fixation of a semiconductor element to a conductive pattern and to reduce the amount of metal material used for the conductive pattern in a chip-type semiconductor device, which was not recognized as a conventional problem. As a result, the present inventors have made intensive studies to solve these problems at the same time. As a result, they have found that a plurality of holes may be formed in the conductive pattern at the fixing portion of the semiconductor element, and have accomplished the present invention.

Hereinafter, the present invention will be described in detail with reference to the drawings. In these drawings, the same members and portions as those in FIG. 4 are denoted by the same reference numerals. FIG. 1 is a perspective view of a chip-type semiconductor device of the present invention. Terminal electrodes 2 and 2 ′ are formed at both ends in the longitudinal direction of the chip substrate 1. On the surface of the chip substrate 1, a first conductive pattern 3 and a second conductive pattern 4 are formed integrally with the terminal electrodes 2 and 2 ', respectively.
A plurality of holes 31 are formed around a portion of the first conductive pattern 3 to which the semiconductor element 5 is fixed, and a silver paste 8 as a conductive adhesive is applied thereto, and then the semiconductor element 5 is mounted and fixed. Is done.

FIG. 2 is a sectional view taken along the line AA of FIG. Since the silver paste 8 applied to the first conductive pattern 3 has a certain degree of fluidity, it flows on the surface of the conductive pattern 3 and fills the holes 31 (through holes in FIG. 3) if any. . The contact area of the silver paste 8 with the substrate 1 increases by the amount of the holes 31 formed. In addition, when the holes 31 are through holes, the silver paste 8 also comes into contact with the chip substrate 1 whose surface is rougher than the conductive pattern. The conductive pattern 3
The semiconductor element 5 can be more firmly fixed thereon.

By forming such holes 31, the amount of metal material used for the conductive pattern 3 can be reduced.

In FIG. 1, a bonding wire 6 connected to an upper electrode (not shown) of a semiconductor element 5 is
Are connected to the conductive pattern 4. The semiconductor element 5, the conductive patterns 3 and 4, and the bonding wires 6 are sealed with a transparent or translucent translucent resin sealing body 7.

The opening area per hole formed in the conductive pattern is not particularly limited as long as it is smaller than the fixing area of the semiconductor element. The range of 0.8 to 2% of the area of the fixed portion of the element is preferable, and the range of 0.9 to 1.9% is more preferable. 0.8% opening area per hole
If it is smaller, the semiconductor element may be peeled off, and if the opening area is larger than 2%, poor conduction may occur. The opening areas of the holes need not be the same, and various holes having different opening areas may of course be mixed.

The total opening area of the hole in the fixed portion of the semiconductor element is 40 to 60 times the area of the fixed portion.
%, More preferably 45 to 55%. If the total open area of the holes is less than 40%,
There is a possibility that the semiconductor element is peeled off. On the other hand, if it is larger than 60%, a poor conduction may occur.

The shape of the opening of the hole to be formed is not particularly limited, and may be a square, a triangle, or the like as shown in FIGS.
Any shape such as a circle may be used, and two or more shapes may be combined.

The arrangement of the holes is not particularly limited, and may be determined in consideration of the size and shape of the semiconductor element to be fixed. However, from the viewpoint of reducing the number of conductive pattern materials and increasing the contact area with the conductive adhesive. It is desirable that the arrangement is such that the dispersion density of the holes is high.

The depth of the hole to be formed is not limited, and may be appropriately determined in consideration of the opening shape of the hole, the dispersion density, and the like. Since the chip substrate generally has a rough surface compared to the conductive pattern, if the hole formed in the conductive pattern is a through hole, a part of the conductive adhesive passes through the hole and the surface of the chip passes through the hole. This is desirable because it can reach the rough chip substrate surface and come into close contact with the chip substrate to increase the bonding strength of the semiconductor element. The depths of the holes do not necessarily have to be the same, and may be appropriately adjusted as needed. For example, only the holes in the fixing portion area of the semiconductor element may be formed as through holes to efficiently increase the fixing strength of the semiconductor element. .

FIG. 1 shows a chip-type device having one semiconductor element 5, but a chip-type device having a plurality of semiconductor elements is also included in the chip-type semiconductor device of the present invention.

The semiconductor element used in the semiconductor device of the present invention is not particularly limited, and a conventionally known semiconductor element such as a light emitting element, a light receiving element, and a composite element can be used.

The shape of the conductive pattern is not particularly limited, and may be appropriately determined based on the number and shape of the semiconductor elements to be fixed, the shape of the chip substrate, and the like.

The conductive patterns 3 and 4 are formed by forming a metal conductor film of Au, Ni, Cu or the like on the entire surface of the chip substrate 1 by a method such as printing or vapor deposition, and removing unnecessary portions by etching. Can be performed. Specifically, for example, a Cu thin film is uniformly formed on the surface of the substrate 1 by plating, and unnecessary portions including the hole portions are removed by etching. Next, a Ni thin film and an Au thin film are sequentially formed on the remaining Cu thin film by plating. By such a process, a conductive pattern having a three-layer structure of Cu, Ni, and Au can be formed, and holes can be formed at the same time. Of course, after forming the conductive pattern, holes may be formed by means such as etching.

In the chip type semiconductor device shown in FIG. 1, the transparent or translucent translucent resin sealing member 7 for sealing the semiconductor element 5, the electrodes 3, 4 and the bonding wires 6 is, for example, epoxy resin or unsaturated resin. Examples thereof include a polyester resin, a silicone resin, and a urea-melamine resin. Among them, an epoxy resin can be more preferably used from the viewpoint of translucency.

The epoxy resin is not limited as long as it has two or more epoxy groups in one molecule and is used as an epoxy resin molding material. Phenol novolak type epoxy resin, orcresol novolak type epoxy resin Of phenols and aldehydes represented by epoxidized novolak resin, reaction of epichlorohydrin with polybasic acids such as diglycidyl ethers such as bisphenol A, bisphenol F, bisphenol S, hydrogenated bisphenol A, phthalic acid and dimer acid Diglycidyl ester type epoxy resin obtained by, diaminodiphenylmethane, glycidylamine type epoxy resin obtained by the reaction of epichlorohydrin with polyamine such as isocyanuric acid, olefin bond by peracid such as peracetic acid, Turned into cotton-like aliphatic epoxy resin obtained, and the like can be mentioned alicyclic epoxy resins, and these can be used alone or as a mixture of two or more. These epoxy resins are sufficiently purified, and may be liquid or solid at room temperature, but it is preferable to use a resin which is as transparent as possible when liquefied.

In FIG. 1, the translucent resin sealing body 7 has a trapezoidal side cross section. However, the shape of the translucent resin sealing body 7 is not limited to this. What is necessary is just to determine suitably from the shape of the apparatus | tool and components which use the chip-type semiconductor device of this invention. As a sealing method, for example, a transfer molding method can be used. In the case of the transfer molding method, the molding conditions are usually a molding temperature of 140 to 160 ° C,
Pressure 400 to 1200 N / cm ² , Molding time 1 to 5 m
in range.

The chip-type semiconductor device of the present invention is mounted on a circuit board by, for example, disposing a wiring pattern on the circuit board and a terminal electrode of the chip-type semiconductor device on a circuit board so as to make contact with each other. This is performed by applying a conductive adhesive such as solder to the terminal electrodes and the wiring patterns, and heating in a reflow furnace to melt the cream solder.

[0027]

According to the chip type semiconductor device of the present invention, since a plurality of holes are formed at least in the conductive pattern at the fixing portion of the semiconductor element, the semiconductor element can be firmly fixed to the conductive pattern, and at the same time, the conductive pattern can be formed. The amount of metal material used for the pattern can be reduced.

[Brief description of the drawings]

FIG. 1 is a perspective view of a chip-type semiconductor device of the present invention.

FIG. 2 is a sectional view taken along line AA of FIG.

FIG. 3 is an enlarged plan view of a conductive pattern in which holes are formed.

FIG. 4 is a perspective view showing a conventional chip-type semiconductor device.

[Explanation of symbols]

 REFERENCE SIGNS LIST 1 chip substrate 2, 2 ′ terminal electrode 3 first conductive pattern 4 second conductive pattern 5 semiconductor element 6 bonding wire 7 translucent resin sealing body 8 silver paste (conductive adhesive) 9, 10 conductive pattern

Claims (3)

[Claims] 1. A chip-type semiconductor device in which a semiconductor element is fixed to a conductive pattern formed on a surface of a chip substrate with a conductive adhesive, wherein a plurality of holes are formed in at least a portion of the conductive pattern where the semiconductor element is fixed. A chip type semiconductor device characterized by the above-mentioned. 2. The chip-type semiconductor device according to claim 1, wherein an opening area per one hole is in a range of 0.8 to 2% of an area of a fixing portion of the semiconductor element. 3. The chip-type semiconductor device according to claim 1, wherein a total opening area of the holes in the fixed portion of the semiconductor element is in a range of 40 to 60% of an area of the fixed portion.