JP2001168341A - Semiconductor device activation method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can maintain reliability thereof suitably even if activation is carried out by using optical energy, and an activation method of the semiconductor device. SOLUTION: A first insulation film 4 and a second insulation film as a gate insulation film are provided between a semiconductor layer 2 formed on an insulation substrate 1 and a gate electrode 3. The gate electrode 3 is formed to cover a channel region 2d and functions as a mask during implantation of impurities. The first insulation film 4 and the second insulation film 5 are formed to cover an LDD region 2c, and its film thickness is set to adjust the amount of impurities implanted to the LDD region 2c. The composition of the second insulation film 5 is SiOxNy, and absorption coefficient of optical energy changes according to the ratio of Ox and Ny. The quantity of light supplied to the LDD region 2c is controlled by the ratio and the film thickness.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device for implanting impurities into a semiconductor layer and then activating at least a region into which the impurities are implanted, and a method for activating a semiconductor device.

[0002]

2. Description of the Related Art For example, MOS (Metal Oxide Semiconductor)
MIS for uctor) type transistors and thin film transistors
(Metal Insulator Semiconductor) type semiconductor devices are generally manufactured using a self-alignment method. As an example of a manufacturing method using this self-alignment method, a gate insulating film is formed on a semiconductor layer, a gate electrode is formed thereon, and impurities are implanted using the gate electrode as a mask by an ion implantation method or the like. There is a way to do that. Here, in a region of the semiconductor layer into which impurities have been implanted, the crystallinity is impaired, so activation is performed to improve the crystallinity. And this activation method includes furnace annealing and the like.
Methods for supplying thermal energy and methods for irradiating light energy such as laser annealing are known.

[0003]

However, of these activation methods, the method of activating by supplying the above-mentioned thermal energy requires a long time for manufacturing and is difficult to cope with a large substrate. There is such a problem. On the other hand, in the method of activating by irradiation of light energy, since the temperature rises instantaneously, the energy irradiation time can be extremely short, and the beam shape can be processed linearly using an optical system. This method has various advantages as compared with the method of activating by thermal energy, for example, because it can be easily applied to a substrate having a large area.

However, even with this method of activating by light energy, the above-described MI manufactured by a self-alignment method is used.
When employed in the manufacture of S-type semiconductor devices and the like, the following disadvantages cannot be ignored.

That is, when manufacturing such a semiconductor device, a member used as a mask at the time of impurity implantation is
It exists as a member that blocks light energy during the activation. In the above-described example, when the gate electrode is activated, irradiation of light energy to the semiconductor layer is prevented. For this reason, a region where light energy is irradiated and a region where light energy is not irradiated are formed on the semiconductor layer, and a sharp temperature gradient is generated at the boundary between them. The temperature gradient causes a new problem that the semiconductor layer near the boundary is microcrystallized. In the case where a part of the semiconductor layer is microcrystallized in this way, inconveniences such as insufficient electrical characteristics of the semiconductor device are not obtained.

SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has as its object to provide a semiconductor device and a semiconductor which can maintain the reliability thereof suitably even when activation is performed using light energy. An object of the present invention is to provide a method for activating an apparatus.

[0007]

The means for achieving the above object and the effects thereof will be described below. The gist of the invention described in claim 1 is that a dimming film that makes at least one of the reflectance and the absorptance of light energy variable is formed above the semiconductor layer.

According to the above configuration, it is possible to adjust the amount of light energy applied to the semiconductor layer through at least one of the amount of reflection and absorption of light energy by the light control film, and to adjust the degree of activation thereof. Becomes Therefore, even when the same semiconductor layer is selectively activated by light energy irradiation, a sharp temperature gradient at the boundary between the selected region and the non-selected region due to the light energy irradiation is reduced. It becomes possible. That is, the above-described microcrystallization at the boundary is also suppressed, and the performance as the semiconductor device is appropriately maintained.

According to a second aspect of the present invention, in the first aspect of the present invention, the dimming film has a variable absorptivity of the light energy based on a change in at least one of the film thickness and the composition. The gist is that there is.

When a film absorbs light, the amount of absorption varies depending on the thickness of the film. The amount of absorption depends on the composition of the film. Therefore, if the composition of the film can be adjusted, the absorption amount of light energy can be made variable. According to the above configuration, the amount of light energy applied to the semiconductor layer can be adjusted by changing the absorptivity of light by paying attention to these properties. Obtainable.

[0011] The invention according to claim 3 is the invention according to claim 1 or 2.
In the invention described above, the gist is that the light control film is made of a nitride film and an oxide film is interposed between the light control film and the semiconductor layer.

According to the above configuration, by using the nitride film as the light control film, the light absorption can be appropriately adjusted. However, for example, in the case where a silicon layer is adopted as the semiconductor layer, the compatibility between the silicon layer and the nitride film is poor. There is a concern that electrical characteristics may be degraded at the interface with the film, and appropriate capacitor characteristics may not be realized between the silicon film and the gate electrode. Therefore, the performance of the semiconductor device using the light control film can be improved by interposing an oxide film having good compatibility with the silicon layer between the two. Further, at the time of etching the nitride film, there is no fear that the surface of the semiconductor layer is shaved because the oxide film functions as a protective film.

According to a fourth aspect of the present invention, there is provided the semiconductor device according to any one of the first to third aspects, wherein the gate electrode is formed above the semiconductor layer via a gate insulating film. It is a gate type transistor, and the gist is that the dimming film is provided as the gate insulating film.

According to the above configuration, the light control film is used for the above purpose and is used as a gate insulating film of a top gate type transistor, so that it can be effectively used in a semiconductor device.

According to a fifth aspect of the present invention, in the fourth aspect of the present invention, the light control film is formed to have a larger film width than the gate electrode, and the light control film of the semiconductor layer is formed. The gist is that a source region and a drain region of the transistor are formed outside the region covered by the transistor.

According to the above structure, for example, at least a part of the light energy is blocked by the gate electrode at the time of activation, so that the region below the gate electrode of the semiconductor layer and the source region and the drain region are interposed. The above-mentioned temperature gradient generated in the region can be reduced by irradiating the region with light energy controlled through the light control film. Further, the impurity amount can be adjusted by injecting the impurity into the semiconductor layer through the light control film in the same region.
This is effective for forming D and the like in a self-aligned manner.

According to a sixth aspect of the present invention, in the semiconductor device according to any one of the first to third aspects, the semiconductor device comprises a gate insulating film and a semiconductor layer above the gate electrode formed above the insulating substrate. It is a bottom-gate transistor that is sequentially formed, and the gist is that the light control film is provided as an interlayer insulating film above the semiconductor layer.

According to the above configuration, the light control film can be used to achieve the above object, and can be effectively used as an interlayer insulating film of a bottom gate type transistor.
The invention according to claim 7 is the invention according to claim 6,
The light control film is formed to have a larger film width than the gate electrode, and a shielding film is further formed above the light control film in accordance with the position and size of the gate electrode. The gist is that a source region and a drain region of the transistor are formed outside a region of the semiconductor layer covered by the light control film.

According to the above configuration, for example, at least a part of the light energy is blocked by the shielding film at the time of activation, so that the region below the shielding film of the semiconductor layer and the source region and the drain region are interposed. The above-mentioned temperature gradient generated in the region can be reduced by irradiating the region with light energy controlled through the light control film. Further, if the amount of impurities is adjusted via this light control film, for example, L
The DD region can be easily formed. Note that when a member for shielding light is used as the shielding film, light can be prevented from entering the channel portion, which is particularly effective in application to a display device in which a backlight may enter.

According to an eighth aspect of the present invention, there is provided an activation of a semiconductor device in which after implanting an impurity into a semiconductor layer, the semiconductor layer including at least the region into which the impurity is implanted is irradiated with light energy to activate the region. A method, wherein a light control film that changes at least one of a reflectance and an absorption coefficient of light energy is formed above the semiconductor layer, and at least one of the film thickness and the composition of the light control film is adjusted. Thus, the gist of the invention is to adjust the light energy applied to the semiconductor layer.

Generally, when activating a region into which impurities are implanted by irradiating light energy, there are various factors that hinder irradiation of the semiconductor layer with light energy. This is due to a mask used in the manufacturing process, in addition to parts that are finally incorporated in the semiconductor device, such as a gate electrode, an insulating film, and a wiring. If the light energy applied to the semiconductor layer becomes non-uniform due to these factors and the non-uniformity becomes remarkable, the above-mentioned problem of the temperature gradient may occur.

Therefore, according to the above method, at least one of the amount of light energy absorption and the amount of reflection is made variable by adjusting at least one of the film thickness and the composition of the light control film formed above the semiconductor layer. The amount of light energy supplied to a predetermined region of the semiconductor layer is adjusted. That is, the light energy supplied to the intermediate region between the region where the amount of light energy supplied in the semiconductor layer is the largest and the region of the semiconductor layer where at least part of the irradiation of the light energy is prevented due to the various factors described above. The problem described above can be addressed by adjusting the light control film.

According to a ninth aspect of the present invention, in the invention of the eighth aspect, the dimming film further adjusts an amount of the impurity to be implanted into a specific region of the semiconductor layer when the impurity is implanted. That is the gist.

According to the above method, when the impurity needs to be implanted into the semiconductor layer in a non-uniform manner, the amount of the impurity to be implanted can be adjusted through the light control film. Note that the energy required for activation increases as the amount of impurities implanted into the semiconductor layer increases. However, if the amount of impurities is controlled by the thickness of the light control film, the active region increases as the amount of impurities implanted increases. Since it is possible to set such that the energy supplied at the time of fabrication is increased, it is also possible to suitably manufacture a self-aligned semiconductor device.

According to a tenth aspect of the present invention, in the invention of the eighth or ninth aspect, an oxide film is formed on a part or all of the semiconductor layer prior to the step of forming the light control film as a nitride film. The gist of the present invention is to further include a step of performing

According to the above method, the function as the light control film can be properly provided by using the nitride film. In addition, by providing a step of forming an oxide film on part or all of the semiconductor layer prior to the step of forming the light control film, the effect of the third aspect of the invention can be obtained.

[0027] According to an eleventh aspect of the present invention, there is provided a dimming film for changing at least one of the reflectance and the absorptivity of light energy above a semiconductor layer to be a transistor region, and a gate electrode for shielding at least a part of the light energy Forming a material sequentially, and etching the light control film and the gate electrode so that a step is formed between the semiconductor layer and the light control film and between the light control film and the gate electrode material. A step of implanting an impurity into the semiconductor layer through the light control film while using the gate electrode material as a mask; and a step of interposing the gate electrode material and the light control film into the impurity-implanted semiconductor layer. And a step of irradiating light energy.

According to the above method, the impurity can be implanted in a self-aligned manner by using the gate electrode as a mask. At this time, since the gate electrode covers only a part of the light control film, impurities are injected into the semiconductor layer even through a region of the light control film which is not covered with the gate electrode. Here, the LDD region can be manufactured in a self-aligned manner by adjusting the amount of impurities implanted into the intermediate region according to the thickness of the light control film and the like. Further, the problem of the above-mentioned temperature gradient caused by the gate electrode hindering the irradiation of light energy at the time of activation can be solved by adjusting the mixing ratio of the components of the light control film, etc. This can be avoided by adjusting the amount of energy. Therefore, a semiconductor device having a highly reliable top gate structure can be manufactured in a self-aligned manner.

According to a twelfth aspect of the present invention, a step of forming a gate electrode of a transistor on an insulating substrate; a step of forming a gate insulating film so as to cover the formed gate electrode; Forming a semiconductor layer as a transistor region, and forming a light control film for changing at least one of the reflectance and the absorptivity of light energy and a shielding film for shielding at least a part of the light energy above the semiconductor layer. Forming sequentially, and etching the dimming film and the shielding film so that a step is formed between the semiconductor layer and the dimming film and between the dimming film and the shielding film, Implanting an impurity into the semiconductor layer through the light control film using the shielding film as a mask, and applying light energy to the semiconductor layer into which the impurity is injected through the shield film and the light control film. Further comprising the step of morphism as its gist.

According to the above method, when impurities are implanted using the shielding film formed in a part above the light control film as a mask, the impurities are also injected into the semiconductor layer via the light control film.
By controlling the amount of impurities injected through the light control film by adjusting the film thickness of the light control film, the LDD region can be suitably formed. In the activation step after the impurity implantation, at least a part of the light energy applied to the semiconductor layer is blocked by the shielding film, so that a region located below the shielding film of the semiconductor layer and a semiconductor layer There is a possibility that a temperature gradient may occur between the upper side and a region not covered with the light control film. Here, by controlling the absorptance by adjusting the composition of the light control film, the LD
The amount of light energy supplied to the D region is adjusted, and
The above temperature gradient can be reduced. Therefore, a highly reliable bottom-gate transistor can be favorably manufactured. When the semiconductor device is used for a display device, the backlight may enter a region of the semiconductor layer below the shielding film, which may degrade the performance of the semiconductor device. If a material that does not transmit light is used, this problem can be avoided.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS (First Embodiment) A first embodiment in which a semiconductor device according to the present invention is applied to a top gate type thin film transistor will be described below with reference to FIG.

FIG. 1 is a sectional view of a semiconductor device according to the present embodiment. As shown in FIG. 1, in this thin film transistor, a semiconductor layer 2 made of a polycrystalline silicon film is formed on an insulating substrate 1, and further, a gate electrode is provided via a first insulating film 4 and a second insulating film 5. 3 are provided. These upper surfaces are covered with an interlayer insulating film 6.

Here, the semiconductor layer 2 is formed in the source region 2
a, drain region 2b, channel region 2d, and LDD
(Lightly Doped Drain) area 2c. The source region 2a and the drain region 2b are
Each is connected to a wiring 8 via a contact hole 7.

The LDD region 2c provided in each region between the source region 2a and the channel region 2d and between the drain region 2b and the channel region 2d.
Is provided as a measure against hot carriers, and is formed by injecting impurities into the semiconductor layer 2 in an amount smaller than the amount of impurities implanted into the source region 2a and the drain region 2b. In the present embodiment, the formation (dimensions) of the gate electrode 3 and the first and second insulating films 4 and 5 are set so that the LDD region is formed in a self-aligned manner. Hereinafter, this structure will be specifically described.

As shown in FIG. 1, the gate electrode 3 is provided above the channel region 2d, and the area of the gate electrode 3 is substantially equal to that of the channel region 2d.
This is because impurities are implanted in a self-aligned manner using the gate electrode 3 as a mask. As mentioned above, LD
The amount of the impurity implanted into the D region 2c depends on the amount of the source region 2a.
In addition, the predetermined amount is set to be considerably smaller (usually about two to three digits) than the amount of impurities implanted into the drain region 2b. In addition, the impurity is thus implanted, so that the LDD region 2c becomes the source region 2a and the drain region 2c.
b, the first insulating film 4 and the second
The thickness of the insulating film 5 is set. That is, by setting the film thickness so that the amount of the impurity implanted into the semiconductor layer 2 through these two insulating films 4 and 5 becomes the above-mentioned predetermined amount, the LDD region 2c And the source region 2a and the drain region 2b are formed simultaneously and in a self-aligned manner.

In such a semiconductor device, as is well known, in order to reduce the electric resistance and promote the generation of carriers in the region into which impurities are implanted in the semiconductor layer 2, the region is activated. Need to be In the semiconductor device according to the present embodiment, as the activation method, a method of irradiating light energy, specifically, a laser annealing of irradiating an excimer laser KrF is employed.

Here, when such laser annealing is adopted, the gate electrode 3 functions as a mask and the channel region 2d is not irradiated with light energy during the irradiation with the excimer laser KrF. , A sharp temperature gradient occurs between the source region 2a and the drain region 2b and the channel region 2d. As described above, when such a temperature gradient occurs, the silicon crystal of the semiconductor layer 2 is microcrystallized, and sufficient electrical characteristics cannot be obtained as described above.

In this respect, in this embodiment, as described above, the LDD region 2c exists between the source region 2a and the drain region 2b and the channel region 2d, and the amount of impurities implanted into this region 2c is , The amount of energy required for activating the source region 2a and the drain region 2b is considerably smaller than the amount of impurities implanted into the source region 2a and the drain region 2b.
The structure is smaller than that required for the two regions 2a and 2b. By the way, in the present embodiment, the second insulating material is set such that the amount of light energy supplied to the LDD region 2c is substantially "1/2" of the amount of light energy supplied to the source region 2a and the drain region 2b. The film characteristics of the film 5 are set. Next, the film characteristics of the second insulating film 5 will be described.

The second insulating film 5 provided in this embodiment is formed of a film having a composition such as “SiO _x N _y ” (hereinafter referred to as a SiON film). This Si
For the ON film, "" Position-controlled excimer laser crystallization of Si using fine wire structure "Motohiro Ozawa, Masakiyo Matsumura, Tokyo Institute of Technology,
Proceedings of the 55th Symposium on Semiconductor / Integrated Circuit Technology sponsored by the IEICE Electronic Materials Committee p81-p86
It is known that the absorptance to light energy can be changed by adjusting the composition, as described in "December 10, 11 1998". Therefore, by adjusting the composition, in other words, the ratio between “O _x ” and “N _y ”, the amount of light energy supplied to the LDD region 2c can be adjusted (dimming).

As described above, the second insulating film 5 of SiO
Through the N film, it becomes possible in principle to adjust the amount of impurities supplied to the LDD region 2c and the amount of light energy supplied to the LDD region 2c. However, the nitride film has poor compatibility with silicon (Si), and electrical characteristics are deteriorated at the interface. Therefore, it is not possible to directly form the nitride film as a gate insulating film on the semiconductor layer 2 using silicon. Not preferred. In consideration of such circumstances, in the present embodiment, an oxide film not bad in compatibility with silicon, specifically, an SiO film is used as the first insulating film 4 between the semiconductor layer 2 and the nitride film. Let me. The light energy absorption of this SiO film is so small as to be negligible.

Hereinafter, a method for manufacturing the semiconductor device according to the present embodiment will be described in detail with reference to FIGS. 2 and 3 show an example of a procedure for manufacturing the semiconductor device according to the present embodiment.

In manufacturing this semiconductor device (thin film transistor), first, as shown in FIG. 2A, amorphous silicon to be a semiconductor layer 2 is formed on an insulating substrate 1 by PE-CVD, and excimer This is polycrystallized by laser irradiation or another crystallization method. That is, a polycrystalline silicon layer 2 'is formed.

Subsequently, as shown in FIG. 2B, the polycrystalline silicon layer 2 'is patterned and etched by a photolithographic technique so as to be used as the semiconductor layer 2.
An island 2 ″ is formed.

After the island 2 ″ is formed, the island 2 ″ is formed as shown in FIG.
As shown in FIG. 2, an SiO film serving as a first insulating film 4 and a SiO film serving as a second insulating film 5 are formed on the island 2 ″ and the insulating substrate 1.
An N film 5 'is sequentially formed by the PE-CVD method, and an amorphous silicon film 3' serving as the gate electrode 3 is formed thereon.

Subsequently, as shown in FIG. 2D, the amorphous silicon film 3 'and the SiON film 5' are etched using the mask 10 to form the second insulating film 5. In this etching, a chlorine-based etching gas is applied to the amorphous silicon
For the ON film 5 ′, dry etching using a fluorine-based etching gas is used. Thus, a sufficient selectivity of at least the second insulating film 5 with respect to the first insulating film 4 serving as a base can be ensured.

Further, as shown in FIG. 3A, the amorphous silicon 3 'is formed in the shape of the gate electrode 3 by etching the amorphous silicon 3' with a chlorine-based etching gas.

As a subsequent step, as shown in FIG. 3B, impurities are implanted by an ion implantation method to form a source region 2a, a drain region 2b and an LDD region 2c. At this time, the impurity is prevented from being implanted into the channel region 2d by using the amorphous silicon film 3 'as a mask. In addition, the second above the LDD region 2c
Since the insulating film 5 is formed, a desired amount of impurity smaller than the amount of impurities implanted into the source region 2a and the drain region 2b is implanted into the LDD region 2c through the single impurity implantation. Is done.

Further, each of the regions 2 into which the impurities are implanted.
In the step shown in FIG. 3C, the substrate is irradiated with an excimer laser KrF in order to activate a, 2b and 2c.
In this step, by irradiating light with an energy amount that can sufficiently activate the source region 2a and the drain region 2b, sufficient activation energy can be supplied to the LDD region 2c for the above-described reason. Note that, through this step, the amorphous silicon film 3 ′ is also suitably activated as the gate electrode 3.

When the above-described activation step is completed, an interlayer insulating film 6 is formed on the substrate by a step not shown, and then a contact hole 7 is formed by using a photolithographic technique and an etching technique. Further, a conductive film is formed, and the wiring 8 is formed by using photolithography technology and etching technology, whereby the semiconductor device shown in FIG. 1 is completed.

The relationship between the thickness of each of the first insulating film 4 and the second insulating film 5 and the light energy supplied to the semiconductor layer 2 when the excimer laser KrF is used for laser annealing. Will be discussed with reference to FIGS.

FIG. 4 is a graph showing the relationship between the thickness of the polycrystalline silicon (semiconductor layer 2) and the reflectivity of an excimer laser KrF having a wavelength of 248 nm. As shown in the graph, by changing the thickness of the polycrystalline silicon,
The amount of light energy supplied into the polycrystalline silicon varies greatly. Here, the following conditions (a1) to (a3)
The reflectance (r) is “0 to 0.2”, “0.2 to
The thickness of the polycrystalline silicon layer is classified according to the area of “0.4” and “0.4 to 0.6”.

0 ≦ r ≦ 0.2 (a1) 0.2 ≦ r ≦ 0.4 (a2) 0.4 ≦ r ≦ 0.6 (a3) In this case, polycrystalline silicon Has a film thickness of
When the reflectance under the condition (a1) such as “30 to 40 nm”, “around 70 nm”, or “around 100 nm”, the amount of reflected light energy is the smallest. Therefore, when the polycrystalline silicon has these film thicknesses, the source region 2a
It can be seen that light energy can be most efficiently taken into the drain region 2b.

Next, the silicon layer is used under these conditions (a1)
FIG. 5 shows the relationship between the reflectance (r) and the SiO film thickness when a sample is taken from each of the films having a film thickness satisfying (a) to (a3) and an SiO film is formed thereon.
Is shown in the graph. Note that the reflectance referred to here is SiO 2
It is defined as the ratio between the amount of light emitted from above the film and the total amount of light returned above the SiO film.

As described above, since the SiO film hardly absorbs the excimer laser KrF, the reflectance r
Can estimate the amount of light energy supplied to the silicon layer. Here, for example, in the case of a silicon film having a reflectance under the condition (a1), the reflectance is hardly larger than “0.2” when the thickness is adjusted using an SiO film. Even if the silicon film is irradiated with an excimer laser through the silicon film, the amount of energy supplied to these two films hardly changes. Therefore, when a semiconductor device is manufactured in a self-aligned manner by using the SiO single film as the gate insulating film, the problem of the above-described temperature gradient cannot be avoided.

Next, an SiO film is formed on the silicon film sample corresponding to each of the conditions (a1) to (a3) so that the reflectance r becomes the smallest, and further, S
FIGS. 6 to 8 are graphs showing the relationship between the thickness of the SiON film and the ratio of the amount of energy supplied to the silicon film to the irradiation energy when the iON film is formed.

FIG. 6 shows a silicon film satisfying the condition (a1), a SiO film formed so as to have the lowest reflectance, and a silicon film formed when an SiON film is formed on the upper surface thereof. Is the calculated value of the ratio of the amount of energy to be applied. At the time of activation, from the viewpoint of the temperature gradient described above, L
The most preferable amount of energy supplied to the DD region 2c is
This is about half of the amount of energy supplied to the source region 2a and the drain region 2b. However, in this case, the amount of energy supplied to the source region 2a and the drain region 2b is
Since about 20% of the irradiation energy amount has a value of about 80% reflected, according to the graph of FIG.
It is only necessary to secure a film thickness of about 3 to 0.5 ".
It can be seen that this condition is satisfied near "0 nm". Therefore, by adjusting the thickness of the SiON film to such a value, the amount of light energy reaching the LDD region 2c can be adjusted to an appropriate amount.

Here, the thickness of the SiON film is set to around the above “25 nm” and “70 nm” in consideration of the necessity of controlling other parameters such as the amount of impurities injected into the LDD region 2 c or the gate capacitance. When the value is set to a value, a problem may occur. However, as described above, the SiON film used as the second insulating film 5 in the present embodiment changes the composition, that is, the ratio of “O _x ” to “N _y ” to change the light energy absorption coefficient. Therefore, the amount of energy supplied to the LDD region 2c can be adjusted by changing the mixture ratio of the components without necessarily changing the film thickness. The SiON film makes at least one of the reflectance and the absorptance of light energy variable based on at least one of the change of the film thickness and the composition. The optimal film thickness and the composition are obtained through experiments or computer simulation. It is possible to ask for.

Incidentally, the graph shown in FIG. 6 shows “O _x ”
And the ratio of “N _y ” is calculated as 1: 4. Therefore, for example, the ratio of “O _x ” to “N _y ” is 1: 1.
The absorption coefficient can be reduced by increasing the ratio of oxygen atoms. Specifically, the thickness of the film thickness “25 nm” at which the ratio of the supplied light energy amount takes a value of about “0.3” is fixed, and the component ratio between “O _x ” and “N _y ” is one to one. If it is changed to 1, the ratio of the same energy amount is estimated to be larger than "0.3".

Similarly, FIG. 7 corresponding to the above condition (a2)
Also, the ratio between “O _x ” and “N _y ” is calculated at 1: 4. In this case, since the ratio of the energy taken into the silicon film is about 70% (about 30% is reflected), the energy is supplied in order to make the amount of energy supplied to the LDD region 2c a preferable amount. It can be seen that it is desirable to set the film thickness so that the ratio of the energy amounts is close to “0.35”. Therefore, the thickness of the SiON film may be set to about 70 nm. For the above-described reason, by increasing the ratio of “N _y ” in the ratio between “O _x ” and “N _y ”, for example, it is possible to use even when the thickness of the SiON film is about “50 nm”. can do.

In FIG. 8 corresponding to the above condition (a3), the ratio between “O _x ” and “N _y ” is calculated as 1: 4. In this case, since the ratio of energy taken into the silicon film is about 50% (about 50% is reflected), the energy is supplied to the LDD region 2c in order to make it a preferable amount. It is desirable to set the film thickness such that the ratio of the energy amount becomes a value close to “0.2”. However, in this case, even if the film thickness is changed, the corresponding ratio cannot be obtained, so that “O _x ” and “N _y ”
In this ratio, it is necessary to increase the ratio of “N _y ”.

As described above, according to the semiconductor device and the method of manufacturing the same according to the above embodiment, the following effects can be obtained. (1) Thickness and composition (mixing ratio of components) of second insulating film 5
By adjusting at least one of the above, the amount of light energy supplied to the LDD region 2c can be suitably adjusted (dimming), and the problem of generation of a sharp temperature gradient due to irradiation of light energy can be avoided. Can be.

(2) The second film is formed by PE-CVD.
By controlling the film thickness of the insulating film 5, the amount of impurities implanted into the LDD region 2c can be suitably controlled. (3) Since the amount of impurities implanted into the LDD region 2c through the first insulating film 4 and the second insulating film 5 is controlled in a self-aligned manner using the gate electrode as a mask, the manufacturing process can be simplified. it can.

The above embodiment may be modified as follows. In the above embodiment, the first insulating film is used as the gate insulating film.
Although a two-layer film composed of the insulating film 4 and the second insulating film 5 is used, the semiconductor layer 2 is a film that can suitably control the amount of light energy and the amount of impurities injected into the LDD region 2c as a gate insulating film. A single film may be used as long as a film compatible with the material can be used.

In the above embodiment, the source region 2
Although the first insulating film 4 is formed also on the a and the drain region 2b, the first insulating film 4 may not be formed on this portion. In this case, the first
LDD region 2c and source region 2a
And the relative amount of the impurity implanted into the drain region 2b and the amount of the supplied light energy can be adjusted.

As long as the gate electrode 3 is a member that functions as a mask when impurities are implanted and blocks at least a part of the light energy, the same effect as in the above embodiment can be obtained.

(Second Embodiment) A second embodiment in which the semiconductor device according to the present invention is applied to a bottom gate type thin film transistor will be described below with reference to FIGS.

FIG. 9 is a sectional view of the semiconductor device according to the present embodiment. As shown in FIG. 9, in the present embodiment, a gate electrode 13 is formed on an insulating substrate 11, and a semiconductor layer 12 is formed via a gate insulating film 14. The semiconductor layer 12 includes a source region 12a, a drain region 12b, a channel region 12d, and an LDD region 1.
2c. The semiconductor layer 12 is covered with insulating films (interlayer insulating films) 15 and 16, and the source region 12a and the drain region 12b are
7 is connected to the wiring 18.

In the present embodiment, the SiON film used in the first embodiment is formed on the upper surfaces of the LDD region 12c and the channel region 12d of the semiconductor layer 2 as the insulating film 15 as shown in FIG. Have been. Furthermore,
A shielding film 19 is formed on a portion of the insulating film 15 corresponding to the channel region 12d. This shielding film 19
Is the channel region 12 when the semiconductor device is used.
It is made of a material that can prevent light from entering the d, and is particularly effective in forming a thin film transistor for driving, for example, a liquid crystal display device.

On the other hand, the shielding film 19 is
Since it is formed above 2d, it is also effective in implanting impurities in a self-aligned manner using this as a mask.
At this time, the amount of impurities implanted into the LDD region 12c is controlled by the thickness of the insulating film 15. Further, in the activation after the impurity implantation, the amount of light energy supplied to the LDD region 12c is controlled to control the channel region 12d.
The composition (mixing ratio of components) of this insulating film 15 is set so as to reduce the temperature gradient between the source region 12a and the drain region 12b.

In this embodiment, the semiconductor layer 1
The insulating film 15 made of a SiON film is formed directly on the upper surface of the second substrate 2. However, since the insulating film 15 is not used as a gate insulating film, it is difficult to form an electric film as in the first embodiment. This is because there is no concern that the characteristics will be affected.

Next, a method of manufacturing the semiconductor device according to the present embodiment will be described with reference to FIGS.
10 to 12 show an example of a procedure for manufacturing the semiconductor device according to the present embodiment.

In manufacturing this semiconductor device (thin film transistor), first, as shown in FIG. 10A, a conductive film 13 ′ serving as a gate electrode 13 is formed on an insulating substrate 11 by a CV method.
As shown in FIG. 10B, the gate electrode 13 is formed by patterning and etching using a photolithographic technique, as shown in FIG.

Subsequently, as shown in FIG. 10C, a gate insulating film 14 made of an SiO film is formed on the gate electrode 13 and the insulating substrate 11, and the semiconductor layer 1 is formed thereon.
PE-CVD of amorphous silicon layer 12S to be 2
The film is formed by the method. Then, as shown in FIG.
The amorphous silicon layer 12S is polycrystallized by an excimer laser annealing method, and the polycrystalline silicon layer 12 'is formed.
To form

Further, as shown in FIG. 11A, the polycrystalline silicon layer 12 'is patterned by using the photolithographic technique and etched to form the island 12 ".
To form

In a subsequent step, as shown in FIG. 11B, a SiON film 15 'as an insulating film 15 is formed by PE-CVD on the island 12 "and the gate insulating film 14. A metal 19 ′ serving as a shielding film 19 is formed thereon.

When the steps related to the film formation are completed, first, as shown in FIG. 11C, the SiON film 15 ′ and the metal 19 ′ are etched using the mask 20 to form the insulating film 15 ′. . Then, in the step shown in FIG. 12A, the metal 19 ′ is etched using the mask 21 to form the shielding film 19.

After the above-described etching process, FIG.
As shown in FIG. 2B, the source region 12a, the drain region 12b, and the LDD region 1 are self-aligned by implanting impurities into the island 12 ″ by ion implantation.
2c is formed. At this time, the amount of impurities supplied to the LDD region 12c is controlled by the thickness of the insulating film 15. Further, the shielding film 19 serves as a mask, and the channel region 1 is formed.
Prevent the implantation of impurities into 2d.

After the implantation of the impurities, the semiconductor layer 12 is activated by irradiating the semiconductor layer 12 with an excimer laser KrF as shown in FIG. Here, LDD region 1
The amount of light energy supplied to 2c is set to about “１ ／” of the amount of energy supplied to the source region 12a and the drain region 12b by adjusting the mixture ratio of the components of the insulating film 15.

After this activation step, as an unillustrated step, an interlayer insulating film 16 is formed on the substrate, and then a contact hole 17 is formed by using photolithography and etching techniques. After the film formation, the wiring 18 is formed by using the photolithography technique and the etching technique, whereby the semiconductor device shown in FIG. 9 is completed.

In the structure of this embodiment in which the SiON film (insulating film 15) is formed directly on the silicon film (semiconductor layer 12), the SiON film under the above conditions (a1) to (a3) is used. The relationship between the film thickness and the ratio of the amount of energy supplied to the silicon film to the amount of irradiation energy is shown in FIG. 12 for reference. Also in this case, the ratio between “O _x ” and “N _y ” is calculated by setting the ratio to 1: 4 as in the first embodiment.

According to the semiconductor device of the present embodiment and the method of manufacturing the same as described above, the same effects as those of the first embodiment can be obtained by adjusting the thickness and composition of the insulating film 15.

In particular, in the case of the present embodiment, by forming the shielding film 19 above the channel region 12d, it is possible to prevent light from entering the same region when the semiconductor device is used. It is also suitable for use in a liquid crystal display device or the like in which incidence of light is concerned.

The above-described embodiment may be modified as follows. -The shielding film 19 and the insulating film 15 may be removed during the manufacturing process of the semiconductor device. That is, the shielding film 19 and the insulating film 15 may be used only for adjusting the impurity implantation amount and the light energy amount.

The shielding film 19 only has to function as a mask at the time of impurity implantation. If this member blocks at least a part of the light energy, it is supplied to the LDD region 12c by the insulating film 15. It is meaningful to adjust the amount of light energy.

Also in the second embodiment, a base film capable of securing a sufficient selection ratio with respect to the insulating film 15 may be provided between the insulating film 15 and the semiconductor layer 12. In addition, there are the following elements that can be changed in common when implementing the above-described embodiments.

The etching techniques exemplified in the above embodiments are not necessarily limited thereto. Any etching technique can be adopted as long as a sufficient selection ratio with respect to the base film can be ensured. Further, it is not always necessary to perform dry etching.

In each of the above embodiments, an ion implantation method is employed as an impurity implantation method, but any method such as an ion shower method or a doped film method can be used. Note that the implantation of impurities into the LDD region, the source region, and the drain region may be performed as separate steps. In addition, when the impurity is implanted into the LDD region, adjustment is performed by another method without performing the above-described film adjustment. You may. Further L
The DD region does not necessarily have to be provided.

In each of the above embodiments, the PE-CVD method is used as the film forming method.
An arbitrary film forming method such as a CVD method such as a CVD method and a PVD method such as a sputtering method may be used. The point is that, when supplying a desired amount of light energy to the semiconductor layer or injecting a desired amount of impurity into the semiconductor layer, it is possible to control the film thickness so as to obtain sufficient accuracy. I just need.

In each of the above embodiments, the excimer laser KrF is used as the method of activating the semiconductor layer.
It is not necessarily limited to this. In addition, ArF, X
pulsed excimer laser such as eCl, Ar ⁺ , YA
A continuous emission laser such as G, infrared rays, or the like may be used, or a mercury lamp or the like may be used. At this time, a member that absorbs a part of these light energies and an arbitrary substance whose absorption coefficient can be changed by changing its composition ratio can be selected and used. Furthermore, these light energies need not be monochromatic. However, when monochromatic light energy is used, the reflectance and the like can be easily grasped. Therefore, the amount of energy supplied to the semiconductor layer is changed by changing the thickness of the film formed above the semiconductor layer. Can be easily adjusted. Further, the light control film does not necessarily need to absorb light energy, and may adjust only the reflectance.

The steps used in each of the above embodiments are:
This is merely an example of a method for manufacturing a semiconductor device having a top gate structure or a bottom gate structure, and the manufacturing method is not necessarily limited to this. Further, the present invention is not limited to a semiconductor device having a top gate structure and a bottom gate structure. In short, it is necessary to activate the semiconductor layer using light energy. At this time, there is a possibility that a steep temperature gradient may occur in the semiconductor layer due to, for example, some member existing above the semiconductor layer. Can be applied to the method of manufacturing a semiconductor device. Further, as for the mitigation of the temperature gradient, it is not always necessary to set the film so that the amount of light applied to the region between the region where the irradiation light amount is the largest and the region where the irradiation light amount is the smallest is almost “１ ／”. What is necessary is just to set so that an appropriate light quantity may be irradiated each time.

A film (light control film) used for adjusting the amount of impurities and the amount of light energy may be a plurality of films. This will increase the adjustable parameters,
For example, when it is used for a gate insulating film, it is easy to appropriately set the capacitance. Further, in the case where a problem occurs when the light control film comes into contact with a specific location, a member compatible with the material at the specific location can be interposed. Further, by providing a film capable of securing a sufficient selectivity in etching as a base, the accuracy of etching in the manufacturing process can be improved.

In the above embodiments, polycrystalline silicon is used as the material of the semiconductor layer, but single crystal silicon, amorphous silicon, or the like may be used. Even when amorphous silicon is used, for example, the activation method of the present invention can be applied as a method for activating a semiconductor device in which a part thereof is microcrystallized.

The material of the semiconductor layer is not limited to silicon. In addition, silicon-germanium alloy,
Any semiconductor such as silicon carbide, germanium, cadmium selenide, cadmium sulfide, gallium arsenide, or the like can be used.

Next, the technical ideas that can be grasped from the above embodiments and their modifications will be described below together with their effects. (1) A method for manufacturing a semiconductor device including a step of injecting an impurity amount into a semiconductor layer, the method comprising: forming an injection amount adjusting film above the semiconductor layer; A method for manufacturing a semiconductor device, wherein an amount of an impurity to be implanted into the semiconductor layer is adjusted by controlling a thickness of the implantation amount adjusting film.

Regarding the implantation of impurities into the semiconductor layer, a uniform implantation amount is not always required.
In the case of forming a DD region or the like, it may be necessary to make the amount of impurity implantation into a part of the semiconductor layer smaller than the amount of impurity implantation into another region. According to the above method,
For example, by forming a film while controlling the film thickness by a film forming method such as a CVD method such as PE-CVD or LPCVD and a PVD method such as a sputtering method, an impurity injected into the semiconductor layer through the film is formed. Can be adjusted to a desired amount. By incorporating this method as one of the steps for manufacturing a semiconductor device in a self-aligned manner, for example, using the film as a gate insulating film, a desired semiconductor device can be suitably manufactured.

(2) In the method of manufacturing a semiconductor device according to the above (1), a step of forming the injection amount adjusting film on a part of the semiconductor layer, and a step of forming an impurity on the upper part of the injection amount adjusting film. Forming a shielding film that shields the implantation of impurities.

According to the above method, by providing a shielding film on a portion above the implantation amount adjusting film, the amount of impurities implanted in the semiconductor layer can be reduced to “a portion not covered by the implantation amount adjusting film is maximized. Yes "," The lower part of the shielding film is set to "0"",
In addition, the adjustment can be made in three stages such as “the other part is set to an intermediate value”. By using this method in the process of fabricating a semiconductor device in a self-aligned manner, the manufacturing process can be simplified.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a first embodiment of a semiconductor device according to the present invention.

FIG. 2 is an exemplary sectional view showing the procedure of manufacturing the semiconductor device according to the embodiment;

FIG. 3 is an exemplary sectional view showing the procedure of manufacturing the semiconductor device according to the embodiment;

FIG. 4 is a graph showing the relationship between the thickness of a silicon film and the reflectance.

FIG. 5 is a graph showing the relationship between the thickness of a SiO film on a silicon film and the reflectance.

FIG. 6 is a graph showing the relationship between the thickness of a SiON film on a silicon film and a SiO film and the ratio of energy supplied to the silicon film.

FIG. 7 is a graph showing the relationship between the thickness of a SiON film on a silicon film and a SiO film and the ratio of energy supplied to the silicon film.

FIG. 8 is a graph showing the relationship between the thickness of a SiON film on a silicon film and a SiO film and the ratio of energy supplied to the silicon film.

FIG. 9 is a sectional view showing a second embodiment of the semiconductor device according to the present invention;

FIG. 10 is an exemplary sectional view showing the procedure for manufacturing the semiconductor device according to the second embodiment;

FIG. 11 is an exemplary sectional view showing the procedure of manufacturing the semiconductor device according to the same embodiment;

FIG. 12 is an exemplary sectional view showing the manufacturing procedure of the semiconductor device according to the embodiment;

FIG. 13 is a graph showing the relationship between the thickness of a SiON film on a silicon film and the ratio of energy supplied to the silicon film.

[Explanation of symbols]

1, 11: insulating substrate, 2, 12: semiconductor layer, 2a, 12
a ... source region, 2b, 12b ... drain region, 2c,
12c: LDD region, 2d, 12d: Channel region,
3, 13 gate electrode, 4 first insulating film, 5 second insulating film, 6, 16 interlayer insulating film, 7, 17 contact hole, 8, 18 wiring, 10, 20, 21 ... mask,
14: gate insulating film, 15: insulating film.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (Reference) H01L 29/78 619A F-term (Reference) 5F110 CC02 CC08 EE08 EE44 EE45 FF02 FF04 FF05 FF09 FF28 FF30 FF32 GG01 GG02 GG03 GG04 GG13 GG43 GG45 GG47 HJ13 HJ23 HM15 NN02 NN12 NN22 NN35 NN43 NN46 PP02 PP03 PP11 PP27 QQ11

Claims (12)

[Claims] 2. A semiconductor device comprising: a light control film that changes at least one of a reflectance and an absorptivity of light energy above a semiconductor layer. 2. The semiconductor device according to claim 1, wherein the light control film changes the absorptivity of the light energy based on at least one of a change in a film thickness and a composition. 3. The light control film is made of a nitride film, and an oxide film is interposed between the light control film and the semiconductor layer.
13. The semiconductor device according to claim 1. 4. The semiconductor device according to claim 1, wherein said semiconductor device is a top-gate transistor in which a gate electrode is formed above said semiconductor layer via a gate insulating film. The semiconductor device, wherein the light control film is provided as the gate insulating film. 5. The light control film is formed to have a film width larger than the gate electrode, and a source region of the transistor is provided outside a region of the semiconductor layer covered by the light control film. And a drain region is formed.
13. The semiconductor device according to claim 1. 6. The semiconductor device according to claim 1, wherein a gate insulating film and a semiconductor layer are sequentially deposited and formed above a gate electrode formed above the insulating substrate. A semiconductor device, comprising: a bottom-gate transistor; wherein the light control film is provided as an interlayer insulating film above the semiconductor layer. 7. The light control film is formed to have a larger film width than the gate electrode, and a shielding film corresponding to the position and the size of the gate electrode is provided above the light control film. 7. The semiconductor device according to claim 6, wherein a source region and a drain region of the transistor are formed outside a region of the semiconductor layer covered by the light control film. 8. A method for activating a semiconductor device, comprising: implanting an impurity into a semiconductor layer; and irradiating the semiconductor layer including at least a region into which the impurity is implanted with light energy to activate the region. A light control film that changes at least one of the reflectance and absorption coefficient of light energy is formed above the semiconductor layer, and at least one of the film thickness and the composition of the light control film is adjusted to form the light control film on the semiconductor layer. A method for activating a semiconductor device, comprising: measuring an irradiation light energy. 9. The method of activating a semiconductor device according to claim 8, wherein said light control film further adjusts an amount of an impurity implanted into a specific region of said semiconductor layer when said impurity is implanted. A method for activating a semiconductor device, comprising: 10. The method for activating a semiconductor device according to claim 8, wherein an oxide film is formed on part or all of the semiconductor layer before the step of forming the light control film as a nitride film. A method for activating a semiconductor device, further comprising a step. 11. A step of sequentially forming a dimming film for changing at least one of the reflectance and absorptivity of light energy and a gate electrode material for shielding at least a part of light energy above a semiconductor layer to be a transistor region. Etching the light control film and the gate electrode so that a step is formed between the semiconductor layer and the light control film and between the light control film and the gate electrode material; and Implanting an impurity into the semiconductor layer through the light control film while using the material as a mask; and irradiating the semiconductor layer with the impurity injected with light energy through the gate electrode material and the light control film. A method for activating a semiconductor device, comprising: 12. A step of forming a gate electrode of a transistor on an insulating substrate; a step of forming a gate insulating film so as to cover the formed gate electrode; and a semiconductor as a transistor region above the gate insulating film. A step of forming a layer, and a step of sequentially forming a dimming film for changing at least one of the reflectance and the absorptance of light energy and a shielding film for shielding at least a part of the light energy above the semiconductor layer; Etching the dimming film and the shielding film so that a step is formed between the semiconductor layer and the dimming film and between the dimming film and the shielding film; and using the shielding film as a mask. Implanting impurities into the semiconductor layer through the light control film while irradiating the semiconductor layer with the impurities with light energy through the shielding film and the light control film. An activation method of a semiconductor device provided.