JP2001162524A - Polishing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent a semiconductor wafer from becoming a tapered shape and to improve the flatness of the semiconductor wafer. SOLUTION: Concerning a polishing condition, each number of revolutions of a sun gear 3, an internal gear 4, an upper surface plate 5 and a lower surface plate 6 is decided so as to fix the rotating direction of a semiconductor wafer 1, or each number of revolutions of the sun gear 3, the internal gear 4, the upper surface plate 5 and the low surface plate 6 is decided so as to fix a rotation moment direction applied on the semiconductor wafer 1.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing method for polishing both surfaces of an object to be polished such as a semiconductor wafer.

[0002]

2. Description of the Related Art FIG. 4 is a block diagram of a polishing apparatus. Three carriers 2 loaded with a semiconductor wafer 1 to be polished are provided. Each of the carriers 2 has four semiconductor wafers 1 mounted thereon. These carriers 2
Are the sun gear 3 on the inner peripheral side and the internal gear 4 on the outer peripheral side.
And is located between. These carriers 2 have teeth formed on the outer periphery, and are screwed together with teeth formed on the outer periphery of the sun gear 3 and teeth formed on the inner periphery of the internal gear 4.

[0003] On both sides of each carrier 2, an upper surface plate 5 and a lower surface plate 6 to which polishing cloths are adhered as polishing members are arranged.

In such a polishing apparatus, the sun gear 3
Rotates in the direction of arrow A, and the internal gear 4 rotates in the direction of arrow B. The rotation of the gears 3 and 4 causes each carrier 2 to rotate in the direction of arrow C and rotate and move in the direction of arrow D. At the same time, the upper surface plate 5 and the lower surface plate 6 rotate in directions opposite to each other, for example, so that
Both surfaces of each semiconductor wafer 1 are polished simultaneously.

[0005]

However, in the double-side polishing by the polishing apparatus, the thickness of the polished semiconductor wafer 1 has a tapered shape in which the cross-sectional thickness changes in one direction as shown in FIG. There are cases. With such a tapered shape, the distribution of the pressure applied to the semiconductor wafer 1 becomes non-uniform, and the polishing amount varies within the surface of the semiconductor wafer 1 to deteriorate the flatness.

Accordingly, an object of the present invention is to provide a polishing method capable of preventing a tapered shape and improving the flatness of a semiconductor wafer.

[0007]

According to the present invention, a carrier loaded with an object to be polished is arranged and rotated between an inner peripheral sun gear and an outer peripheral internal gear, and the carrier is polished. In a polishing method of arranging an upper surface plate and a lower surface plate each having a polishing member attached to both surfaces thereof, and rotating these surface plates to polish both surfaces of the object to be polished, the rotation direction of the object to be polished becomes constant. This is a polishing method including the steps of setting the sun gear, the internal gear, and the rotational speeds of the upper surface plate and the lower surface plate.

According to a second aspect of the present invention, a carrier loaded with an object to be polished is arranged and rotated between an inner peripheral sun gear and an outer peripheral internal gear, and polishing members are provided on both sides of the carrier. In a polishing method of arranging an upper surface plate and a lower surface plate to which are attached, and rotating these surface plates to polish both surfaces of the object to be polished, a sun gear in which the direction of a rotational moment applied to the object to be polished is constant. , An internal gear, and a step of setting the number of rotations of the upper surface plate and the lower surface plate.

[0009]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a configuration diagram of a polishing apparatus to which the polishing method of the present invention is applied. Three carriers 2 loaded with semiconductor wafers 1 are provided. Each of the carriers 2 has three semiconductor wafers 1 mounted thereon. These carriers 2 are disposed between an inner peripheral sun gear 3 and an outer peripheral internal gear 4. These carriers 2
Has teeth formed on the outer periphery thereof, and is screwed with teeth formed on the outer periphery of the sun gear 3 and teeth formed on the inner periphery of the internal gear 4.

An upper surface plate 5 and a lower surface plate 6 each having a polishing cloth attached thereto are arranged on both sides of each carrier 2.

The actual dimensions of the semiconductor wafer 1, carrier 2, sun gear 3 and internal gear 4 are shown in the schematic diagram of FIG. As described above, the number of the carriers 2 is three. Each of the carriers 2 has three semiconductor wafers 1 mounted thereon. These semiconductor wafers 1
Have a diameter of 200 mm.

The diameter (carrier diameter) of each carrier 2 is 60
0 mm, the diameter of the sun gear 3 is 400 mm, and the diameter of the internal gear 4 is 1600 mm.

Each carrier 2 has 120 teeth, the sun gear 3 has 70 teeth, and the internal gear 4 has 310 teeth.

The eccentricity between the center of the carrier 2 and the center of the semiconductor wafer 1 is 150 mm.

The upper surface plate 5 and the lower surface plate 6 each have an outer diameter of 1 mm.
It is formed to have a diameter of 600 mm and an inner diameter of 400 mm.

The rotation control means 7 has a function of controlling the number of rotations of the sun gear 3, the internal gear 4, the upper stool 5 and the lower stool 6.

Next, determination of polishing conditions for preventing the tapered shape of the semiconductor wafer 1 and increasing the flatness by using the apparatus configured as described above will be described.

The method of determining the polishing conditions is to determine the number of rotations of the sun gear 3, the internal gear 4, and the upper platen 5 and the lower platen 6 so that the rotation direction of the semiconductor wafer 1 is constant. Further, the rotational speeds of the sun gear 3, the internal gear 4, and the upper platen 5 and the lower platen 6 are determined so that the direction of the rotational moment applied to the semiconductor wafer 1 is constant.

That is, the following equation (1) is defined assuming that the rotational moment applied to the semiconductor wafer 1 is reduced from the relative speed _Vθ to 0 at a time Δt.

[0021] It is. Here, m is the mass of the abrasive grains, and N is the number of the abrasive grains per unit area.

In the above equation (1) representing the rotational moment, the value in parentheses () changes depending on the polishing conditions. This portion is used as a rotational moment evaluation value to determine a polishing condition that does not change.

The polishing conditions are shown in the following table.

[0024]

[Table 1]

FIG. 3 shows the rotational moment evaluation values under the respective polishing conditions a to d shown in this table. The direction of the rotational moment is counterclockwise when the rotational moment evaluation value is positive.

From the rotational moment evaluation values under these polishing conditions a to d, under the polishing conditions a and b, the direction of the rotational moment changes periodically. Therefore, the semiconductor wafer 1
Becomes difficult to rotate in the carrier 2.

On the other hand, only the counterclockwise moment is applied to the semiconductor wafer 1 under the polishing condition c, and only the clockwise moment is applied to the semiconductor wafer 1 under the polishing condition d. And the taper shape is prevented from being formed.

Therefore, under the polishing condition c, the rotation speed of the sun gear 3 is 22 rpm, and the rotation speed of the internal gear 4 is 10 rpm.
rpm, the rotation speed of the upper stool 5 is determined to be 20 rpm, and the rotation speed of the lower stool 6 is determined to be 40 rpm.

Under the polishing condition d, the rotation speed of the sun gear 3 is 15.5 rpm, and the rotation speed of the internal gear 4 is 3.
9 rpm, the rotation speed of the upper stool 5 is determined to be 15 rpm, and the rotation speed of the lower stool 6 is determined to be 40 rpm.

Here, the polishing condition a and the polishing condition d are shown in FIG.
Were polished on both sides of each semiconductor wafer 1 using the polishing apparatus shown in FIG. The following table shows the measurement results.

[0031]

[Table 2]

In this case, the difference between the maximum value and the minimum value of the wafer thickness of the semiconductor wafer 1 is, for example, 2 μm or more, and the case where the thickness changes in one direction is regarded as a tapered shape.
In the above table, TTV (Total Thickness Value)
Is the flatness of the entire semiconductor wafer 1 based on the back surface, SFQR
(Site Front least sQuares Range) is 25 based on the surface standard.
This is the flatness in a cell of mm × 25 mm.

It can be seen that the occurrence of the tapered shape can be prevented by the polishing condition d. Further, in the polishing condition d, both TTV and SFQR are improved as compared with the polishing condition a.

As described above, in one embodiment,
The polishing condition is determined by determining the number of rotations of the sun gear 3, the internal gear 4, and the upper platen 5 and the lower platen 6 so that the rotation direction of the semiconductor wafer 1 is constant, or the direction of the rotational moment applied to the semiconductor wafer 1. Is determined so that the rotational speeds of the sun gear 3, the internal gear 4, and the upper and lower stools 5 and 6 are constant, so that the semiconductor wafer 1 is easily rotated in a fixed direction and has a tapered shape. Can be prevented. The prevention of the tapered shape makes the distribution of the pressure applied to the semiconductor wafer 1 uniform, and the polishing amount becomes uniform within the surface of the semiconductor wafer 1 so that the flatness of the semiconductor wafer 1 can be increased.

The present invention is not limited to the above embodiment, but may be modified as follows.

For example, in the above embodiment, the case where the present invention is applied to double-side polishing of the semiconductor wafer 1 has been described.
It goes without saying that the present invention is not limited to this, and can be applied to polishing both surfaces of various objects to be polished.

The dimensions of the semiconductor wafer 1, the carrier 2, the sun gear 3, the internal gear 4, the upper stool 5 and the lower stool 6 are not limited to those of the above-described embodiment, but may be other dimensions. In this case, each polishing condition is set to obtain a rotational moment evaluation value, and the rotational speeds of the sun gear 3, the internal gear 4, and the upper platen 5 and the lower platen 6 so that the rotation direction of the semiconductor wafer 1 is constant are determined. The number of rotations of the sun gear 3, the internal gear 4, and the upper platen 5 and the lower platen 6 may be determined or determined so that the direction of the rotational moment applied to the semiconductor wafer 1 is constant.

The semiconductor wafer 1 mounted on the carrier 2
May be any number.

[0039]

As described above in detail, according to the present invention, it is possible to provide a polishing method capable of preventing a tapered shape and increasing the flatness of a semiconductor wafer.

[Brief description of the drawings]

FIG. 1 is a configuration diagram showing an embodiment of a polishing apparatus to which a polishing method according to the present invention is applied.

FIG. 2 is a schematic diagram showing dimensions of each part in an embodiment of a polishing apparatus to which a polishing method according to the present invention is applied.

FIG. 3 is a diagram showing a rotational moment evaluation value under each polishing condition in one embodiment of a polishing apparatus to which a polishing method according to the present invention is applied.

FIG. 4 is a configuration diagram of a conventional polishing apparatus.

FIG. 5 is a view showing a tapered shape of a semiconductor wafer in double-side polishing by the polishing apparatus.

[Explanation of symbols]

 1: semiconductor wafer 2: carrier 3: sun gear 4: internal gear 5: upper surface plate 6: lower surface plate 7: rotation control means

Claims (2)

[Claims] 1. A carrier loaded with an object to be polished is disposed between an inner peripheral sun gear and an outer peripheral internal gear and rotated, and a polishing member is attached to both sides of the carrier. In a polishing method in which a plate and a lower platen are arranged, and these platens are rotated to polish both surfaces of the object to be polished, the sun gear, the internal gear and the internal gear so that the rotation direction of the object to be polished is constant. A polishing method comprising a step of setting the number of rotations of an upper stool and the lower stool. 2. A carrier loaded with an object to be polished is arranged and rotated between an inner peripheral sun gear and an outer peripheral internal gear, and a polishing member is mounted on each side of the carrier. In a polishing method in which a plate and a lower platen are arranged, and these platens are rotated to polish both surfaces of the object to be polished, the sun gear and the internal gear so that the direction of a rotational moment applied to the object to be polished is constant. And a step of setting the rotational speed of each of the upper surface plate and the lower surface plate.