JP2001135507A - Network resistor - Google Patents

Network resistor

Info

Publication number
JP2001135507A
JP2001135507A JP31407099A JP31407099A JP2001135507A JP 2001135507 A JP2001135507 A JP 2001135507A JP 31407099 A JP31407099 A JP 31407099A JP 31407099 A JP31407099 A JP 31407099A JP 2001135507 A JP2001135507 A JP 2001135507A
Authority
JP
Japan
Prior art keywords
common potential
terminals
resistance element
patterns
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP31407099A
Other languages
Japanese (ja)
Inventor
Yoshimichi Yoshizawa
好通 吉沢
Shoichi Muramoto
昭一 村本
Kensuke Shitaka
謙介 志鷹
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tateyama Kagaku Kogyo Co Ltd
Original Assignee
Tateyama Kagaku Kogyo Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tateyama Kagaku Kogyo Co Ltd filed Critical Tateyama Kagaku Kogyo Co Ltd
Priority to JP31407099A priority Critical patent/JP2001135507A/en
Publication of JP2001135507A publication Critical patent/JP2001135507A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide a network resistor which has a structure capable of simplifying manufacturing processes by avoiding a process for forming an insulating layer, and can be more miniaturized. SOLUTION: In this network resistor, two kinds of common potential terminals 1, 2 are installed, a plurality of pairs 3 of resistance elements which are connected in series for dividing potential difference between the two kinds of common potential terminals 1, 2 are installed, and junctions of the respective pairs 3 of the resistance elements are installed as intermediate potential terminals 4. The respective common potential patterns 5, 6 which are connected with the two kinds of common potential terminals 1, 2 constitute different conducting layers interposing an insulating board 9, and two resistance element patterns 7, 8 constitute different conducting layers interposing the insulating board 9.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、複数の抵抗器が一
体となったネットワーク抵抗器に関する。
The present invention relates to a network resistor in which a plurality of resistors are integrated.

【0002】[0002]

【従来の技術】従来、図4に示す如く、二種類の共通電
位端子を具備し、当該二種類の共通電位端子間の電位差
|V1−V2|を分圧すべく抵抗器が直列に接続され、
それらの連結部から中間電位Voを引き出す回路構成の
ネットワーク抵抗器を製造するに当たっては、中間電位
端子まで導電パターンを引き出す際に、共通電位端子に
接続された導電パターンと交差させなければならない。
その為に、当該交差する部分に絶縁層を形成し、更に、
導電パターンを形成するという煩雑なプロセスを経なけ
ればならず、ネットワーク抵抗器の小型化も困難であっ
た。
2. Description of the Related Art Conventionally, as shown in FIG. 4, two types of common potential terminals are provided, and resistors are connected in series to divide a potential difference | V1-V2 | between the two types of common potential terminals.
In manufacturing a network resistor having a circuit configuration for extracting the intermediate potential Vo from these connection portions, when the conductive pattern is extracted to the intermediate potential terminal, it must intersect with the conductive pattern connected to the common potential terminal.
For this purpose, an insulating layer is formed at the intersection,
A complicated process of forming a conductive pattern must be performed, and it has been difficult to reduce the size of the network resistor.

【0003】[0003]

【発明が解決しようとする課題】本発明は、上記実情に
鑑みて成されたものであって、絶縁層を形成するという
プロセスを避け製造プロセスを簡略化し得る構造を具備
し、且つ更なる小型化が容易なネットワーク抵抗器の提
供を目的とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and has a structure capable of simplifying a manufacturing process by avoiding a process of forming an insulating layer. It is an object of the present invention to provide a network resistor that can be easily formed.

【0004】[0004]

【課題を解決するための手段】上記課題を解決するため
に成された本発明によるネットワーク抵抗器は、絶縁基
板を基体として二種類の共通電位端子を具備すると共
に、当該二種類の共通電位端子間の電位差を分圧すべく
直列に接続された抵抗素子対を複数具備し、前記絶縁基
板の側縁部に各抵抗素子対の連結部をそれぞれ中間電位
端子として複数具備するネットワーク抵抗器であって、
前記二種類の共通電位端子に接続される各共通電位パタ
ーンが、前記絶縁基板を挟んで各々異なる導電層を構成
すると共に、前記各抵抗素子対を構成する二つの抵抗素
子パターンが前記絶縁基板を挟んで各々異なる導電層を
構成することを特徴とする。
A network resistor according to the present invention, which has been made to solve the above-mentioned problems, has two types of common potential terminals using an insulating substrate as a base and has two types of common potential terminals. A network resistor comprising a plurality of resistor element pairs connected in series to divide a potential difference between the resistor elements, and comprising a plurality of connection portions of the respective resistor element pairs on a side edge portion of the insulating substrate as intermediate potential terminals. ,
Each common potential pattern connected to the two types of common potential terminals constitutes a different conductive layer with the insulating substrate interposed therebetween, and two resistive element patterns constituting each resistive element pair form the insulating substrate. It is characterized in that different conductive layers are configured to be sandwiched therebetween.

【0005】共通電位端子とは、ネットワーク抵抗器に
含まれた素子或いは素子対へ共通して供給される電位を
得る為の外部端子であって、当該端子へ供給される電位
が定電位であるか変化する電位であるかは問わない。ま
た、各抵抗素子対の連結部とは、当該抵抗素子対の連結
点であっても良いし、当該連結点から引き出された部分
であっても良い。前記共通電位端子に接続される共通電
位パターンの一方と、当該共通電位パターンへ直接的に
接続される抵抗素子パターンの全てを別の層として構成
することもできるが、製造プロセスを簡略化させる上で
は、前記共通電位パターンの一方と、当該共通電位パタ
ーンの一方へ直接的に接続される抵抗素子パターンの全
てが同じ導電層を構成する形を採る方が望ましい。尚、
直接的に接続するとは、当該共通電位パターンへ別途素
子を介在することなく接続することとする。
[0005] The common potential terminal is an external terminal for obtaining a potential commonly supplied to an element or a pair of elements included in the network resistor, and the potential supplied to the terminal is a constant potential. Or a changing potential. Further, the connection part of each resistance element pair may be a connection point of the resistance element pair, or may be a part drawn from the connection point. One of the common potential patterns connected to the common potential terminal and all of the resistive element patterns directly connected to the common potential pattern may be formed as separate layers. In this case, it is preferable that one of the common potential patterns and all of the resistive element patterns directly connected to one of the common potential patterns form the same conductive layer. still,
To connect directly means to connect to the common potential pattern without intervening an element separately.

【0006】[0006]

【発明の実施の形態】以下、本発明によるネットワーク
抵抗器の実施の形態を図面に基づき説明する。図1乃至
図3に示す例は、8つの抵抗素子対3を内包したネット
ワーク抵抗器であって、絶縁基板9の表面に、第1の共
通電位端子1を引き込む共通電位パターン5と、第1の
共通電位端子1へ共通電位パターン5を介して直接的に
接続される抵抗素子R1とを形成し、同絶縁基板9の裏
面に、第2の共通電位端子2を引き込む共通電位パター
ン6と、第2の共通電位端子2へ共通電位パターン6を
介して直接的に接続される抵抗素子R2を形成し、抵抗
素子R1,R2の端子のうち、各々共通電位パターン
5,6へ直接的に接続されていない側の端子を、抵抗素
子R1及び抵抗素子R2を一個ずつ組とし各中間電位端
子4において電気的に接続したものである。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the network resistor according to the present invention will be described below with reference to the drawings. The example shown in FIGS. 1 to 3 is a network resistor including eight resistive element pairs 3, and a common potential pattern 5 for drawing a first common potential terminal 1 on a surface of an insulating substrate 9, And a resistance element R1 directly connected to the common potential terminal 1 via a common potential pattern 5, and a common potential pattern 6 for drawing in the second common potential terminal 2 on the back surface of the insulating substrate 9. A resistance element R2 is formed which is directly connected to the second common potential terminal 2 via the common potential pattern 6, and is directly connected to the common potential patterns 5 and 6, respectively, of the terminals of the resistance elements R1 and R2. The terminals on the other side are formed as a set of one resistance element R1 and one resistance element R2, and are electrically connected to each intermediate potential terminal 4.

【0007】当該ネットワーク抵抗器の絶縁基板9は、
方形状を呈し、その側縁に、当該絶縁基板9の表裏に亘
るスルーホールを縦に二等分した形の溝10が形成さ
れ、当該溝10に導電剤を充填することによって中間電
位端子4或いは共通電位端子1,2が形成される。この
例では、図2の如く、当該共通電位端子1,2となる溝
10にかかる様に共通電位パターン5,6を形成する工
程と、前記中間電位端子4及び共通電位パターン5,6
となる溝11にかかる様に抵抗素子パターン7,8を形
成する工程と、前記溝10,11に導電剤を充填・固化
し共通電位端子1,2及び中間電位端子4を形成すると
いう工程を経ることによって、二種類の共通電位端子
1,2間の電位差を分圧すべく直列に接続された複数の
抵抗素子対3の連結部をそれぞれ中間電位端子4として
外部へ引き出している。即ち、当該ネットワーク抵抗器
に形成された回路パターンは、図3に示す電気回路を構
成し、第1の電位V1と第2の電位V2間の電位差|V
1−V2|を、抵抗素子R1と抵抗素子R2とで分圧
し、各々の中間電位端子4に中間電位Voを発生させる
こととなる。
The insulating substrate 9 of the network resistor is
A groove 10 having a rectangular shape is formed on a side edge of the insulating substrate 9 so as to vertically divide a through hole extending over the front and back surfaces of the insulating substrate 9 into two equal parts. Alternatively, common potential terminals 1 and 2 are formed. In this example, as shown in FIG. 2, a step of forming the common potential patterns 5 and 6 so as to cover the grooves 10 to be the common potential terminals 1 and 2 and a step of forming the intermediate potential terminals 4 and the common potential patterns 5 and 6
Forming the resistive element patterns 7 and 8 so as to cover the groove 11 to be formed, and filling and solidifying a conductive agent in the grooves 10 and 11 to form the common potential terminals 1 and 2 and the intermediate potential terminal 4. As a result, the connection portions of the plurality of resistance element pairs 3 connected in series in order to divide the potential difference between the two types of common potential terminals 1 and 2 are respectively drawn out to the outside as intermediate potential terminals 4. That is, the circuit pattern formed on the network resistor constitutes the electric circuit shown in FIG. 3, and the potential difference | V between the first potential V1 and the second potential V2.
1-V2 | is divided by the resistance element R1 and the resistance element R2, and an intermediate potential Vo is generated at each intermediate potential terminal 4.

【0008】この様に、絶縁基板の一面において共通電
位パターン5,6と抵抗素子パターン7,8を積層して
多層構造を形成しているが、別途絶縁層を介在して両者
を電気的に隔することなく、一種広義の導電層(絶縁を
目的としない層)を形成しているので、当該例は、共通
電位パターン5,6の一方と、当該共通電位パターン
5,6の一方へ直接的に接続される抵抗素子パターン
7,8の全てが同じ導電層を構成するネットワーク抵抗
器であると言える。即ち、ここでは、別途絶縁層を介在
して離隔している状態にある層が相互に異なる導電層で
あるということになる。
As described above, the common potential patterns 5 and 6 and the resistance element patterns 7 and 8 are laminated on one surface of the insulating substrate to form a multilayer structure. Since a kind of broadly conductive layer (a layer not intended for insulation) is formed without separation, the example is directly applied to one of the common potential patterns 5 and 6 and one of the common potential patterns 5 and 6. It can be said that all of the resistive element patterns 7, 8 which are electrically connected are network resistors constituting the same conductive layer. That is, here, the layers separated from each other with the insulating layer interposed therebetween are different conductive layers.

【0009】当該例における中間電位端子4は、絶縁基
板9における相反する側の側縁に存在するものがそれぞ
れ対向する様に配置されており、当該抵抗素子の定数も
同じ値に設定されているので、相対向して存在する中間
電位端子4,4間に2つの抵抗素子R1,R1(又はR
2,R2)を一連のパターンとして形成することが可能
となるが、ネットワーク抵抗器内に形成された抵抗素子
の定数及び、抵抗素子対3による分圧比は必ずしも一定
である必要はなく、個々に抵抗素子パターン7,8を形
成したり、適宜トリミングを施すことによって、複数の
中間電位Voを得ることも可能となる。尚、先に示した
例においては、当該トリミングは前記中間電位端子4を
形成する工程の前に行われることとなる。
In this example, the intermediate potential terminals 4 are arranged such that the terminals present on the opposite side edges of the insulating substrate 9 face each other, and the constants of the resistance elements are set to the same value. Therefore, the two resistance elements R1 and R1 (or R1) are connected between the intermediate potential terminals 4 and 4 that are opposed to each other.
2, R2) can be formed as a series of patterns, but the constant of the resistance element formed in the network resistor and the voltage division ratio by the resistance element pair 3 are not necessarily required to be constant. A plurality of intermediate potentials Vo can be obtained by forming the resistance element patterns 7 and 8 or performing trimming as appropriate. In the example shown above, the trimming is performed before the step of forming the intermediate potential terminal 4.

【0010】この様なネットワーク抵抗器は、一枚の絶
縁基板上で升目状に複数形成され、最終的に分割され、
共通電位端子や中間電位端子にメッキを施して個々のネ
ットワーク抵抗器となる。尚、共通電位端子や中間電位
端子の様な端子素材、共通電位パターンに用いる導電素
材、抵抗素子パターンに用いる抵抗素材は従来から用い
られている素材を選択すれば良く、形成工程も、例え
ば、印刷・焼成等その素材にあった手法を用いれば良
い。
A plurality of such network resistors are formed in a grid on a single insulating substrate and are finally divided.
The common potential terminal and the intermediate potential terminal are plated to form individual network resistors. Note that terminal materials such as a common potential terminal and an intermediate potential terminal, a conductive material used for a common potential pattern, and a resistance material used for a resistance element pattern may be selected from conventionally used materials. A method suitable for the material, such as printing and baking, may be used.

【0011】[0011]

【発明の効果】以上の如く、本発明によるネットワーク
抵抗器は、二種類の共通電位端子を具備し、当該二種類
の共通電位端子間の電位差|V1−V2|を分圧すべく
抵抗器が直列に接続され、それらの連結部から中間電位
Voを引き出す回路構成のネットワーク抵抗器を製造す
る際にも、中間電位端子まで導電パターンを引き出す際
に、共通電位端子に接続された導電パターンと交差させ
なければならないという不都合が無く、当該交差する部
分に絶縁層を形成し、更に、導電パターンを形成すると
いう煩雑なプロセスを経る必要もないので、製造プロセ
スの簡略化が容易であるばかりか、更なる小型化が比較
的容易なものとなる。
As described above, the network resistor according to the present invention has two types of common potential terminals, and the resistors are connected in series to divide the potential difference | V1-V2 | between the two types of common potential terminals. Also, when manufacturing a network resistor having a circuit configuration for extracting the intermediate potential Vo from the connection portion thereof, when extracting the conductive pattern up to the intermediate potential terminal, cross the conductive pattern connected to the common potential terminal. It is not necessary to go through the complicated process of forming an insulating layer at the intersection and further forming a conductive pattern, so that the manufacturing process is not only simplified, but also simplified. It becomes relatively easy to reduce the size.

【図面の簡単な説明】[Brief description of the drawings]

【図1】(イ)(ロ)本発明によるネットワーク抵抗器
において絶縁基板の表裏に形成される回路パターンの概
要を例示した説明図である。
FIGS. 1A and 1B are explanatory diagrams exemplifying an outline of a circuit pattern formed on the front and back of an insulating substrate in a network resistor according to the present invention; FIGS.

【図2】(イ)(ロ)本発明によるネットワーク抵抗器
の製造プロセスの一部を例示した概略図である。
FIGS. 2A and 2B are schematic views illustrating a part of a manufacturing process of a network resistor according to the present invention; FIGS.

【図3】図2に示したネットワーク抵抗器の回路パター
ンから斜視図的に引き出して示した電気回路図ある。
FIG. 3 is an electric circuit diagram drawn in a perspective view from the circuit pattern of the network resistor shown in FIG. 2;

【図4】図3と同様の分圧回路の回路構成を従来の不都
合さが明らかとなる様に例示した電気回路図である。
FIG. 4 is an electric circuit diagram illustrating a circuit configuration of a voltage dividing circuit similar to that of FIG. 3 so that disadvantages of the related art become apparent.

【符号の説明】[Explanation of symbols]

1 共通電位端子 2 共通電位端子 3 抵抗素子対 4 中間電位端子 5 共通電位パターン 6 共通電位パターン 7 抵抗素子パターン 8 抵抗素子パターン 9 絶縁基板 10,11 溝 REFERENCE SIGNS LIST 1 common potential terminal 2 common potential terminal 3 resistance element pair 4 intermediate potential terminal 5 common potential pattern 6 common potential pattern 7 resistance element pattern 8 resistance element pattern 9 insulating substrate 10, 11 groove

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 絶縁基板(9)を基体として二種類の共
通電位端子(1,2)を具備すると共に、当該二種類の
共通電位端子(1,2)間の電位差を分圧すべく直列に
接続された抵抗素子対(3)を複数具備し、前記絶縁基
板(9)の側縁部に各抵抗素子対(3)の連結部をそれ
ぞれ中間電位端子(4)として複数具備するネットワー
ク抵抗器であって、前記二種類の共通電位端子(1,
2)に接続される各共通電位パターン(5,6)が前記
絶縁基板(9)を挟んで各々異なる導電層を構成すると
共に、前記各抵抗素子対(3)を構成する二つの抵抗素
子パターン(7,8)が前記絶縁基板(9)を挟んで各
々異なる導電層を構成するネットワーク抵抗器。
1. An insulated substrate (9) having two types of common potential terminals (1, 2) as a base and connected in series to divide the potential difference between the two types of common potential terminals (1, 2). A network resistor including a plurality of connected resistance element pairs (3), and a plurality of connection portions of the respective resistance element pairs (3) as intermediate potential terminals (4) at side edges of the insulating substrate (9). And the two types of common potential terminals (1,
Each of the common potential patterns (5, 6) connected to 2) forms a different conductive layer with the insulating substrate (9) interposed therebetween, and two resistance element patterns forming each of the resistance element pairs (3). (7, 8) Network resistors each forming a different conductive layer with the insulating substrate (9) interposed therebetween.
JP31407099A 1999-11-04 1999-11-04 Network resistor Pending JP2001135507A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP31407099A JP2001135507A (en) 1999-11-04 1999-11-04 Network resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP31407099A JP2001135507A (en) 1999-11-04 1999-11-04 Network resistor

Publications (1)

Publication Number Publication Date
JP2001135507A true JP2001135507A (en) 2001-05-18

Family

ID=18048874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP31407099A Pending JP2001135507A (en) 1999-11-04 1999-11-04 Network resistor

Country Status (1)

Country Link
JP (1) JP2001135507A (en)

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