JP2001109420A - Driving circuit for matrix type display panel and matrix type display device provided therewith - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize power control and heat control not by conventional mechanical parts such as a heat sink but only by signal processing, in a data driver circuit of a capacitive load of a matrix display device. SOLUTION: Power consumption of a data driver is controlled only by signal processing by controlling signal processing of an image processing part so that the power is reduced, based on the detection result from a correlation detecting part for detecting a correlation with display data or from a count part for counting a discharge-nondischarge change-over frequency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a matrix type display device as a so-called capacitive load type display device such as a plasma display, a liquid crystal display panel, and an electroluminescence panel, and more particularly to a function for reducing power consumption thereof. The present invention relates to a matrix-type display device provided with:

[0002]

2. Description of the Related Art A plasma display device will be described below as an example of a capacitive load type display device.
FIG. 19 is a schematic configuration diagram of a conventional AC plasma display device. In the figure, 1 is display data supplied from the outside, 10 is a controller, 14 is a display data processing unit provided in the controller 10, 15 is a sequence controller, 16 is a data driver, 17 is a scan sustain driver, and 18 is a sustain driver. A driver 19 is a sustain power supply for supplying power to the scan sustain driver 17 and the sustain driver 18.

[0003] Reference numeral 20 denotes a data driver power supply for supplying power to the data driver 16, and reference numeral 21 denotes a plasma display panel (hereinafter, referred to as a PDP).

The operation will be described below. The display data 1 supplied from the outside is supplied to a PDP 21 by a display data processing unit 14 provided inside the controller 10.
Are subjected to signal processing for obtaining a signal suitable for driving the data, and are output to the data driver 16.

The output from the data driver 16 is supplied to the write electrode of the PDP 21 as so-called write data, and write discharge occurs due to the relationship with the drive waveform supplied from the scan sustaining driver 17, and the display on the dielectric material in the PDP 21 is displayed. Wall charges are accumulated at the site where discharge is to be performed.

After that, a sustain voltage is applied between the pair of electrodes connected to both drivers by the scan sustain driver 17 and the sustain driver 18 controlled by the sequence controller 15, and the sustain voltage is generated by the previous wall charges. Discharge for display occurs at a portion where the voltage obtained by addition with the voltage (wall voltage) exceeds the discharge threshold.

Thereafter, by alternately changing the sustain voltage applied between the electrode pairs, a display discharge is continuously generated in a portion where a discharge for display occurs (a discharge cell in a display state). Thereby, the display control of the discharge or non-discharge for each discharge cell is performed, so that the PDP 21 realizes the display of an image.

Here, when display data having a large number of times of charge / discharge (the number of times of switching between discharge and non-discharge) such as a screen for displaying a checkered pattern as display data is input, the output from the data driver 16 is: As the number of times of charging and discharging increases, a power loss (increases in proportion to the frequency of charging and discharging) due to the capacitive load of the panel occurs with the increase of the number of times of charging and discharging, so that the power consumption increases. Eventually, exceeding the allowable power loss of the data driver 16 causes the data driver 16 to be damaged or causes the elements constituting the data driver 16 to be overheated.

For this reason, as illustrated in FIG. 20, a heat sink is attached to the back surface of the substrate of the data driver 16,
It was necessary to take heat measures (radiation) such as designing an air path for blowing air to the heat sink.

Further, as the power consumption increases, it is necessary to increase the power capacity of the power supply section (the data driver power supply 20 for supplying power to the data driver 16 shown).

FIG. 21 is a schematic diagram of Japanese Patent Application Laid-Open No. 10-18709.
FIG. 3 is a block diagram illustrating a configuration described in Japanese Patent Publication No. 3 to reduce power consumption in a plasma display device. In the figure, reference numeral 22 denotes a discrete cosine transform processing unit (hereinafter, referred to as DCT); 23, a high-frequency component removing unit configured by a digital filter for removing a high frequency of a signal component; (Hereinafter referred to as IDCT) and 25 are used as to whether or not to use the filter included in the high-frequency component removing unit 23 (ON / O of the filter).
FF).

Hereinafter, the operation will be described. DCT22
Performs discrete cosine transform on the input image data, and converts the image data into data on a frequency space. Thereafter, the output from the DCT 22 is input to the high-frequency component removing unit 23, where the high-frequency component is removed.

In this case, the detection result of the power consumption is externally provided to the filter controller 25, and the high-pass filter included in the high-frequency component removing section 23 is turned on / off based on the output of the filter controller 25.

The high-pass filter of the high-pass component removing unit 23 is OF
In the case of F, the output as it is from the DCT 22 is input as it is, and in the case of ON, the output from which the high frequency component of the output of the DCT 22 is suppressed or removed is input to the IDCT 24, and demodulated into image data.

As described above, the high-frequency component of the image data is removed in accordance with the power consumption of the data driver 16.
In this case, the removal of the high-frequency component is performed uniformly over the entire screen, irrespective of the (in-plane, spatial) distribution of the high-frequency component in the image data. .

Thus, for example, when a checkered screen is inserted in the image data of the trees in the forest, the signal components in the high frequency range are uniformly removed, so that not only the information on the checkered screen is obtained. Since the information of the trees is also lost, the display quality of the input image data is deteriorated.
It is necessary to provide a high band removal filter corresponding to various display data, and it is necessary to optimize each filter.

[0017]

Therefore, in a conventional matrix type display device, a capacitive load caused by the structure of a display panel such as an electrode wiring, a discharge cell, and a liquid crystal arranged in a matrix is driven. Because we have a display image,
When a checkered screen is displayed, in principle, a capacitance component is formed between electrode wirings adjacent to each other, and when the number of times of charging and discharging the capacitance component increases, the power consumption of the data driver is reduced. There is a problem that it becomes difficult.

In addition, there are problems such as the addition of a cooling mechanism for heat generation due to an increase in power consumption, an increase in cost due to the design of an air path, and an increase in space for securing an air path. It becomes noticeable.

Further, there is a problem that the display quality is deteriorated by uniformly removing the high frequency components.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and has as its object to reduce the power consumption, thereby making the PDP module thinner and improving the display quality.

[0021]

A drive circuit for a matrix type display panel according to the present invention is a drive circuit for driving a matrix type display panel having a plurality of display cells capable of displaying an image corresponding to input display data. A circuit,
A time series between display data corresponding to display on a matrix type display panel and a data array in a predetermined region corresponding to a plurality of display cells, for a display unit for counting the number of times display data is switched between display cells for display data. A display data discriminating unit having at least one of a correlation detecting unit for detecting a temporal correlation, receiving an output from at least one of the counting unit and the correlation detecting unit, and discriminating a property of the display data; An image processing unit that performs image processing on the display data based on the output from the determination unit.

Further, in the driving circuit for the matrix type display panel according to the present invention, the image processing section is configured to perform the image processing on the display data when the counting result of the counting section becomes a predetermined value or more.

Further, in the driving circuit for the matrix type display panel according to the present invention, the image processing in the image processing section includes a process for adjusting the brightness of the display cell to be displayed.

In the driving circuit for a matrix type display panel according to the present invention, when the image processing section has a correlation between the display data and the data array in the predetermined area, the image processing section lowers the spatial frequency of the display data corresponding to the predetermined area. It is configured to include a process of replacing with data to be performed.

Further, the driving circuit of the matrix type display panel according to the present invention is constituted by a fixed data arrangement in a predetermined area.

Further, the drive circuit of the matrix type display panel according to the present invention is configured such that the predetermined area is the entire display area of the matrix type display panel.

Further, a matrix type display device according to the present invention includes a matrix type display panel and any one of the above-described matrix type display panel driving circuits connected to the electrodes of the matrix type display panel.

The matrix type display device according to the present invention is characterized in that the matrix type display panel is a plasma display panel.

[0029]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a matrix display device according to the present invention will be specifically described with reference to the drawings showing one embodiment thereof. In the drawings, the same reference numerals indicate the same or corresponding ones as those in the related art.

The PDP display device according to the present invention comprises a PDP
And a drive circuit described in each embodiment connected to the electrodes of the PDP. Embodiment 1 FIG. (Display Data Control Unit: Feedforward Type) Hereinafter, a PDP display device will be described as an example of a matrix type display device. FIG. 1 is a block diagram of a display data control unit in a PDP display device according to an embodiment of the present invention, wherein 1 is display data to be displayed on a PDP, and 3 is switching between discharge and non-discharge within display data on the entire screen. The counting section 4 as a counting section for counting the number of times, the display data discriminating section 4 for discriminating the display data based on the detection result of the counting section 3 and controlling the display data, and the reference numeral 5 It is a display data processing unit as an image processing unit that processes display data.

Hereinafter, the operation will be described with reference to FIG. The display data 1 input from the outside is input to the counting unit 3 and the display data processing unit 5.

The counting section 3 counts the number of times of switching between discharge and non-discharge for the display data 1 corresponding to the entire screen by the configuration and method described later.

The output from the counting section 3 is input to the display data discriminating section 4, where the display data is discriminated as described later.

Then, the display data 1 and the output from the display data discriminating unit 4 are given to the display data processing unit 5, and the display data processing unit 5 outputs a signal obtained by performing a predetermined process on the display data 1.

(Display Data Control: Feedback Type) Although FIG. 1 shows a feedforward type configuration, a feedback type configuration as shown in FIG. 2 is also possible.

In FIG. 2, reference numeral 6 denotes an image adjustment unit as an image processing unit for performing image adjustment such as amplitude control and offset control (brightness control and contrast control). Note that 1, 3, and 4 are the same as those described with reference to FIG.

The operation will be described below with reference to FIG. Display data 1 input from outside (in the figure,
DATA1) is input to the image adjustment unit 6, and then outputs DATA2 in the figure, which is the output of the image adjustment unit 6, and DATA2 is input to the count unit 3.

The counting section 3 counts the number of times of switching between discharge and non-discharge for the display data 1 corresponding to the entire screen by the configuration and method described later.

The output from the counting section 3 is input to the display data discriminating section 4, and the display data is discriminated as described later.

Then, the display data 1 and the output from the display data discriminating unit 4 are given to the image adjusting unit 6, and the display data 1
A signal (DA) obtained by performing a predetermined process on (DATA1)
TA2) is output.

(Power Consumption) Hereinafter, power consumption will be described. FIG. 3 shows a conventional PDP.
FIG. 3 is an explanatory diagram schematically showing a panel driving system and a driving mode of the display device.

In FIG. 3A, reference numeral 21 denotes a PDP, 17
Is a scan sustain driver for driving (driving) scan sustain electrodes of the PDP 21, 18 is a sustain driver for driving (drive) the sustain electrodes of the PDP 21, and 16 is a PD.
This is a data driver for driving the write electrode of P21.

Further, a1, a2, and a3 are write electrodes, and x1, x2, and x3 are sustain scan electrodes (the PDP having 3 × 3 display cells is shown as an example in FIG. 1). . In the drawing, hatched ellipses indicate cells emitting and emitting discharge (that is, in a writing step at a stage prior to the display step, a writing operation is performed on the cells).

FIG. 3B shows a model of the display state displayed on the PDP 21 corresponding to the state shown in FIG. 3A (1 is a cell emitting and emitting light, and 0 is a write operation). And no light emitting cells).

FIG. 3 (c) shows write electrodes a1 and a2 in the upper, middle and lower stages to exemplify what kind of write operation is performed on the above-mentioned cell emitting and discharging.
FIG. 3 is a diagram showing each of a2 and a3 and sustain scan electrodes x1, x2 and x3 (in the figure, the horizontal axis represents the time axis, and the vertical axis represents the voltage of the signal waveform.
Further, a high potential is expressed as H with respect to the reference potential L).

The operation will be described below. FIG.
As one of the methods of driving the PDP 21 shown in (a), wall charges accumulated so far on the dielectric layer included in the PDP 21 are erased (erased) on the entire panel (all display cells). After the step), wall charges are accumulated on the dielectric layer corresponding to the display cell in which the display discharge is to be generated in order to identify the display cell in which the display discharge is to be generated (writing step).

Thereafter, a sustain discharge is performed between the scan sustain electrode and the sustain electrode to generate a display light emission.
The display as shown in (b) is performed (maintenance step).

In order to obtain the display state as shown in FIG. 3B, in the above-described writing step, a writing step as shown in FIG. 3C is performed. That is, a scanning pulse (L signal given to each of the scanning sustain electrodes x1 to x3) for specifying a row to be selected is sequentially applied to the scanning sustain electrodes x1 to x3, and the write electrodes a1 to x3 are sequentially applied.
A data signal (L or H) is applied to a3 so as to correspond to the position of the display cell to be displayed.

For example, the scanning sustain electrode x1 shown in FIG. 3A will be described. The display state is shown in the order of non-display-display-non-display in the direction from the write electrodes a1 to a3 along the scan sustain electrode x1, and in this case, FIG.
(C) As shown in the upper part of FIG.
Is L when the voltage applied to the write electrode a1 is L.

Next, as shown in the middle part of FIG. 3C, the voltage applied to the write electrode a1 when the voltage applied to the scan sustaining electrode x1 is L is set to H.

Subsequently, as shown in the lower part of FIG. 3C, the voltage applied to the write electrode a1 when the voltage applied to the scan sustaining electrode x1 is L is set to L.

The scanning sustain electrodes x2 and x3 are also
The same writing operation is performed, and the writing operation for the entire screen is completed.

FIG. 4 is an explanatory diagram for explaining an equivalent circuit model in the PDP and an operation concept in a write operation. In the figure, W1 and W2 are write electrodes, X is a scan sustain electrode, Y is a sustain electrode, Vw is a write voltage, SW
1... SWn are switches in the data driver 16 corresponding to the scan sustain electrodes X for n horizontal resolutions (FIG. 3).
(A) corresponds to the state of application of the writing voltage when the display state along the scanning sustain electrode x1 is realized.)

Cw-xy is the equivalent capacitance between the write electrode and the scan sustain electrode (or sustain electrode), and Cw-w is the equivalent capacitance between the write electrodes (for example, between write electrodes W1 and W2).

The write operation has been described with reference to FIG. 3. When the write operation is performed, when the data signal between the adjacent write electrodes a1 and a2 becomes HL or LH, In the capacitance component (equivalent capacitance Cw-w) between the write electrodes a1 and a2, charging and discharging are performed.

Therefore, for each electrode in the direction of the writing electrode such as a checkered pattern, white (discharge emission for display is performed),
When performing image display in which black (discharge emission for display is not performed) repeatedly appears, the number of times of charging and discharging between the writing electrodes a1 and a2, a2 and a3,. The power consumption due to the charging and discharging that occurs with this is maximized.

In the case of such a display (checkered pattern) or a similar display state, as described above, the influence of the capacitance component between the write electrodes is remarkable in the write operation. , It is necessary to perform power control in consideration of power consumption.

(Counting of discharge / non-discharge) The number of times of charge / discharge in the address operation described above is determined by counting the number of times of discharge / non-discharge (in the PDP at the time of performing the address operation) as described in detail below. You can know by.

FIG. 5A is an explanatory diagram for explaining a method of counting the number of times of switching between discharge and non-discharge of the display cells in each row and column. In the figure, 0 and 1 in the matrix indicate a discharge state and a non-discharge state for each display cell.

First, the counting of discharge / non-discharge in a row will be described. For example, in the first row, the discharge cells in the column direction are non-discharge (0) -discharge (1) -non-discharge (0)
It is a state of.

Accordingly, in the first row, a non-discharge (0) to a discharge (1) occur between the first row and the first column and the first row and the second column.
Switching from discharge (1) to non-discharge (0) once between the first row and the second column and the first row and the third column. There will be a switch.

Similarly, in the second row, there is one switching between the second row, the second column and the second row, the third column. In the third row, all the columns are in the discharge state and the switching is performed. Does not exist.

Next, counting of discharge / non-discharge in a column will be described. For example, in the first column, the discharge cells in the row direction are non-discharge (0) -non-discharge (0) -discharge (1).
It is a state of.

Accordingly, in the first column, the non-discharge (0) to the discharge (1) occur between the second row and the first column and the third row and the first column.
There will be one switch to.

Similarly, in the second column, discharge (1) to non-discharge (0) occur between the first row and the second column and the second row and the second column.
There is a total of two switchings, one from the non-discharge (0) to one from the discharge (1) between the second row and the second column and the third row and the second column. In the third column, there is one switching between the first row and third column and the second row and third column.

That is, the total of switching between discharge and non-discharge in the row direction is three, and the total of switching between discharge and non-discharge in the column direction is four.

The power consumption can be estimated by counting the number of switching operations in the row direction and the column direction as described above. In the case of a matrix display device, however, in practice,
In particular, when the data of the video signal is a binary signal (b
it).

In such a binarized signal, for example, signal 1 is defined as a signal for discharging, and signal 0 is defined as a signal that is not discharged. In other words, the number of times of switching in the row direction and the column direction is to count the number of times of switching from 1 to 0 or from 0 to 1 for the binary signal applied to the write electrode. The power consumption can also be estimated based on the binarized signal. In this case, the count unit 3 shown in FIGS. 1 and 2 outputs the binary signals 1 to 0 applied to the write electrodes,
Alternatively, the number of times of switching from 0 to 1 is output as the number of times of switching between discharge and non-discharge.

In the following, power consumption is estimated by using a binarized signal (hereinafter, referred to as “bit”), which is a signal form suitable for such an actual scene, and power control based on the analogized power consumption will be described. explain.

(Power Control) FIG. 6 shows an example of the relationship between the counted number of discharge / non-discharge switching and power consumption, and the magnitude of power consumption based on the number of discharge / non-discharge switching. Indicates that it can be analogized. As can be seen from the solid line in the figure, the number of times of switching and the power consumption are in a proportional relationship (the broken line will be described later). In the following description, description will be made with reference to FIGS.

FIG. 7 is an explanatory diagram for explaining an example of a case where display data is controlled by the number of times of switching between discharge and non-discharge output from the counting section 3.

Here, of all the display cells, the intensity of any six consecutive cells is equal to the intensity of 4 cells as shown in the lower table of FIG.
When given as bit data, the total number of times of switching between discharge and non-discharge for each bit is 14 (each bi
The total number of transitions from 0 to 1 or 1 to 0 at the t-th time).

In this case, if the total number of times of switching between discharge and non-discharge for each bit exceeds a predetermined number k (for example, 13 times), the display data discriminating unit 4
A signal to the effect that the predetermined number has been exceeded is output to the image adjustment unit 6,
Upon receiving this signal, the image signal adjustment unit 6 performs control so that the luminance of the entire display screen is reduced to, for example, half. Since the brightness of the entire screen is proportional to the number of discharges, control of reducing the brightness to half is equivalent to performing control of reducing the brightness to half.

When the image adjustment unit 6 is controlled to reduce the luminance by half, the image adjustment unit 6 is basically controlled so that the brightness of each cell is reduced by half as shown in FIG. 7B. I do. This control can be achieved, for example, by setting a discharge / non-discharge state as shown in the table shown in the lower part of FIG. 7B. In this case, switching between discharge / non-discharge for each bit is performed. The total number of times is nine. As a result,
The power control can be performed such that the number of times of non-discharge switching is smaller than that of the original one and power consumption caused by the capacitance component between the write electrodes is reduced.

FIG. 8 is a flowchart of the power control described above. The counting unit 3 counts the number of times of discharge / non-discharge (step S61). Subsequently, when the counted number of times of discharge / non-discharge is counted as n (times), the display data determination unit 4 determines the magnitude relationship with a predetermined numerical value k (step S62).

Here, when n is equal to or less than k, no image adjustment is performed (step S64), and when n> k, an adjustment operation is performed in the image adjustment unit 6 (step S63), whereby FIG. Power control as indicated by the dotted line can be realized.

In the embodiment described with reference to FIG. 7B, the case where the brightness is halved in order to suppress the brightness of the entire screen has been described. It is also possible to adjust the image by adjusting the absolute value (offset) of the contrast) and the brightness, and the number of times of switching between discharge and non-discharge for either the contrast adjustment at an arbitrary magnification or the offset adjustment. It is also possible to carry out adjustment control based on the detected value of.

FIG. 5B shows a display cell in units of an n × m basic pattern (in the illustrated example, a 2 × 2 display cell is a predetermined area and the data array is fixed). The number of times of switching between discharge and non-discharge is counted. That is, the number of reference patterns included in all display cells is counted, and the count value is multiplied in advance by the number of times of switching between discharge and non-discharge included in the basic pattern to thereby determine whether discharge / non-discharge in all display cells is performed. The number of times of switching of discharge can be obtained, and power control can be performed based on a method similar to the above-described embodiment.

Embodiment 2 In the first embodiment, the power control based on the detection result of the counting unit 3 has been described. However, it is also possible to control the power by performing time-series correlation detection in a predetermined area. Hereinafter, such an embodiment will be described.

FIG. 9 is a diagram showing a display data control unit in a PDP display device according to another embodiment of the present invention. In the figure, reference numeral 2 denotes a correlation detection unit. In addition,
1, 4 and 5 are the same as those described in FIG. 1 or FIG.

Hereinafter, the operation will be described with reference to FIG. The display data 1 input from the outside is input to the correlation detection unit 2 and the display data processing unit 5.

The correlation detecting section 2 detects the presence or absence of a correlation for the display data 1 corresponding to the entire screen by the configuration and method described later (in this case, the entire display area of the PDP becomes a predetermined area).

The output from the correlation detecting section 2 is input to the display data determining section 4, where the display data is determined as described later.

Then, the display data 1 and the output from the display data discriminating section 4 are given to the display data processing section 5, and the display data processing section 5 outputs a signal obtained by performing predetermined processing on the display data 1.

(Display Data Control: Feedback Type) Although FIG. 9 shows a feedforward type configuration, a feedback type configuration as shown in FIG. 10 is also possible.

In FIG. 10, reference numeral 6 denotes an image adjustment unit for performing image adjustment such as amplitude control and offset control (brightness control and contrast control). Note that 1, 2, and 4 are the same as those described with reference to FIG.

Hereinafter, the operation will be described with reference to FIG. The display data 1 (DATA1 in the figure) input from the outside is input to the image adjustment unit 6, and then outputs the data DATA2 in the figure, which is the output of the image adjustment unit 6, and the DATA2 is the correlation detection unit 2 Is input to

The correlation detection unit 2 counts the number of times of switching between discharge and non-discharge for the display data 1 corresponding to the entire screen by the configuration and method described later.

The output from the correlation detecting section 2 is input to a display data discriminating section 4, and the display data is discriminated as described later.

Then, the display data 1 and the output from the display data discriminating unit 4 are given to the image adjusting unit 6, and the display data 1
A signal (DA) obtained by performing a predetermined process on (DATA1)
TA2) is output.

(Regarding Correlation Detection) FIG. 11A is a block diagram showing an example of the configuration of the correlation detecting section 2. In the drawing, reference numeral 7a denotes an information detecting section for detecting the i subfield, and 7b denotes j. An information detection unit for detecting a subfield; an operation unit for performing an operation based on an output (subfield SFi) from the information detection unit 7a and an output (subfield SFj) from the information detection unit 7b; A correlation discriminating unit that discriminates a correlation from the output of the arithmetic unit 8.

FIG. 12 is an explanatory diagram for explaining the correlation coefficient. Hereinafter, the operation will be described with reference to FIGS.

Here, in the PDP apparatus described as an example, when expressing the gradation, one field is divided into subfields (SF) which are screens that are temporally subdivided, and the subfields are divided into subfields (SF). The image of one field is expressed by superimposing on the time axis.

In each subfield, the erasing step, the writing step, and the maintaining step are performed as described above for driving the PDP device. A general method of dividing into subfields is, for example, a method of dividing one field into eight subfields when expressing 256 gradations. In this case, the number of times of the sustaining process (the number of times of the sustain emission) in each subfield is basically
It is a power of 2 that realizes the number of maintenance times from 0 to 128 (at this time, the 2 0th bit is the LSB and the 2 7th bit is the MSB).

Since the brightness of the light generated by the display cell is proportional to the number of times of maintenance in the maintenance step, the brightness of the above-mentioned 0 to 12 is obtained.
A gradation expression can be performed by a combination of eight maintenance times (temporal superposition).

When such a signal for each subfield is input to the information detection units 7a and 7b, the information detection unit 7a
a, 7b, SFi and SFj are detected (however,
The subfield is detected so that i ≠ j).

The SFi and SFj detected by the information detectors 7a and 7b are input to an arithmetic unit 8, and the arithmetic unit 8 calculates, for example, an exclusive OR of SFi and SFj. This operation is 1 ≦ i,
i <j ≦ the total SF of the display signal is performed several times, and the result of the calculation is given to the correlation determination unit 9.

The correlation determining section 9 determines whether there is a correlation between SFi and SFj based on the result of this calculation.

FIG. 12 is a diagram showing a P composed of 3 × 3 display cells.
An example is shown in which the correlation coefficient of DP and the presence or absence of correlation are determined (in this case, a 3 × 3 display cell is a predetermined area). In the figures, (a) and (c) denote cells to be discharged in SFi, 1 denotes cells to be discharged, and 0 denotes non-discharged cells. Further, (b) and (d) show the relationship in SFj,
1 indicates a cell to be discharged, and 0 indicates a non-discharged cell.

Hereinafter, the size of the reference determination cell is 1
An example of a size of × 1 or 2 × 2 is given as P
It is possible to determine the presence or absence of a correlation between SFi and SFj as long as the determination cell is within the DP resolution n × m.

Note that SFi and SFj are N in FIG.
The description will be made assuming that it is given as o1 ((a) and (b) in the figure). It is also assumed that 1 × 1 (one matrix coordinate value to be operated) in SFj is used as the reference determination cell here.

In this case, since SFi and SFj have exactly the same value over all matrix coordinates, the correlation coefficient is 1 (= 9/9; (e) in the figure).

Similarly, the reference determination cell is 2 × 2 in SFj.
The correlation coefficient in the case of (the number of matrix coordinates to be operated is four) is also 1 (= 4/4; (f) in the figure).

Next, SFi and SFj correspond to N in FIG.
It is assumed that it is given as indicated by o2 ((c) and (d) in the figure). In addition, as the reference determination cell here, S
Consider the case of 1 × 1 in Fj (there is one matrix coordinate value to be operated on).

In this case, since the values of the matrix coordinates of SFj are all 0 (that is, no discharge occurs in the whole screen), the values have a correlation with the 0 portion of SFi, and the correlation coefficient is 5/9 (see FIG. Medium (g)), and 0 when the reference discrimination cell is 2 × 2 in SFj.
(= 0/4, (h) in the figure).

By comparing the obtained correlation coefficient with a value for determining the presence or absence of a correlation, the correlation in each case can be determined.

FIG. 13 shows three subfields (SF1) as display data of a PDP having display cells of 4 rows × 6 columns.
To SF3) to be displayed, and particularly shows a case where a checkerboard pattern is input as the display data ((a) to (c) in the figure).

In the example shown in the figure, since the same checkerboard pattern is input in SF1 to SF3, the SF
The correlation coefficient between 1 and SF2 (between SF2 and SF3) is 1 as described above, and it is determined that there is a correlation between SFs.

In such a case, for example, SF
The display data is changed from (a) to (d) for 1; from (b) to (e) for SF2; and from (c) to (f) for SF3. In this case, SF3 need not be replaced).

As described above, the SF2 from the SF1 on the LSB side
, The power in the data driver 16 can be reduced to 1/3 times (by leaving the information of SF3, the information display of the signal to be displayed can be reduced). Done).

FIG. 14 is a flowchart for explaining the above control. The correlation detection unit 2 detects a correlation between SFi and SFj (step S101). Next, based on the detected correlation coefficient, it is determined whether there is a correlation between SFi and SFj (step S102).

Here, if it is determined that there is no correlation, the processing in the image adjustment unit 6 is not performed (step S10).
3) If it is determined that there is a correlation, the image adjustment unit 6 replaces data so that, for example, SF1 and SF2 on the LSB side are in a non-discharged state (S10).
3). By doing so, the data driver 16
Power consumption can be suppressed.

It is to be noted that the SF replacement signal is not limited to a non-discharge signal, but may be a combination of discharge and non-discharge signals having a low spatial frequency in a discharge state (a checkered black and white spatial signal). Lower the repetition cycle).

By doing so, for example, when a checkered area is present in a displayed natural image, the checkered area (ie, a part of the entire screen) is checked. By replacing it with a non-discharge state, it is possible to suppress power consumption without significantly lowering the contrast between checkered white and black, and it is particularly effective when a dark display is performed as a whole. It is an effective method.

When the entire screen is close to white, the spatial frequency may be lowered. When the entire screen has an area from a bright part to a dark part, the spatial frequency is adjusted so as to conform to the area. May be lowered.

Further, the replacement of SF is not only performed from the LSB side. For example, SF1 and SF3 are displayed in a checkered pattern (there is a correlation between SF1 and SF3), and SF2 is replaced with SF1. In the case where there is no correlation with (i.e., there is no correlation with SF3), power consumption can be suppressed even if SF2 is replaced with a non-discharged state or a display state in which the spatial frequency is lowered. This is effective when no visual problem occurs due to the image adjustment performed on the intermediate SF as described above.)

In the above description of the embodiment, only the power control based on the SF correlation discrimination has been described.
The correlation discrimination for each time as shown in (b) may be performed. In FIG. 11B, reference numeral 18 denotes a delay unit that delays input display data, and 8 denotes an operation unit that performs an operation on the input display data and the output from the delay unit 18 (for example, an exclusive OR operation). 9) is a correlation discriminating unit.

In the figure, P (t) indicates display data at time t, and Δt indicates a period during which one video display pattern such as one field is completed (for example, one field period or a plurality of field periods). Is shown.

When display data P (t) at time t is input to delay section 18, delay output data P (t-Δt) given a delay of Δt (that is, display data P (t−Δt) input before time t). ) Is output, and the input display data P (t) and the delayed output data P (t-Δt) are input to the calculation unit 8, and, for example, an exclusive OR operation is performed.

The operation result output ΔP output from operation unit 8
(T) is inputted to the correlation discriminating section 9, and it is discriminated whether there is a correlation between the input display data P (t) and the delay output data P (t-Δt), and the explanation will be given with reference to FIG. The same processing as the flow described above is performed in the image adjustment unit 6.

When the display data is a still image, the input display data P (t) and the delayed output data P (t-Δt)
Is 1. That is, in a still image,
Since the display in a particular display cell does not change for a long time,
In the case of a display requiring relatively large write power, a temperature rise of the data driver 16 is caused, and the temperature rise monotonically increases until the temperature rise is saturated.

In this case, due to the heat capacity of the PDP, the temperature rise has a time constant considerably longer than one field period. Therefore, it is not always necessary to set the above-mentioned Δt in one field period, and there is no practical problem even if the Δt is set in 5 to 6 field periods to detect the correlation of the display data.

When the input display data is a moving image, discharge / non-discharge occurs arbitrarily in an arbitrary display cell, so that the power consumption of the data driver 16 in the writing process is kept low.

With the above configuration, it is possible to distinguish between a moving image and a still image, and it is possible to perform optimal power control for each of the moving image and the still image.

Embodiment 3 In the above description of the embodiment, the counting unit 3
The configuration and operation for controlling the image display based on the result of counting the number of times of switching between discharge and non-discharge by the controller and the result of correlation detection by the correlation detector 2 have been described. Both may be provided in the display data control unit.

The configuration shown in FIG. 15 is a block diagram showing a configuration obtained by combining the configurations shown in FIGS. 1 and 9 described above.
The configuration shown in FIG. 16 is a block diagram showing a configuration obtained by combining the configurations shown in FIGS. 2 and 10 described above.

The operation of the configuration shown in FIGS. 15 and 16 is the same as the operation of the individual configuration shown in FIGS. 1 and 9 and the operation of the individual configuration shown in FIGS. 2 and 10, respectively. Therefore, the description is omitted. An example of the operation as a whole will be described below.

FIG. 17 shows an example of a flowchart in the case where the operations of both the counting section 3 and the correlation detecting section 2 are performed. The number of times of switching between discharge and non-discharge in the input display data is counted by the counting unit 3 (step S111), and the display data discriminating unit 4 determines whether or not the counted result is equal to or greater than a set value (step S111). Step 112).

If the counted result does not exceed the set value, the image control unit 6 does not control the image (step S117). If the counted result exceeds the set value, the correlation detecting unit 2 , A correlation between subfields is detected (step S113).

If there is no correlation between two or more subfields in the correlation detection result detected by the correlation detection unit 2, an image based on the number of times of switching between discharge and non-discharge in the input display data. The control by the adjusting unit is performed (step S116).

If there is a correlation between two or more subfields in the correlation detection result detected by the correlation detection unit 2, the image adjustment unit 6, for example, places SF1 and SF2 on the LSB side in a non-discharged state. The data is replaced as described above (step S115).

By performing such an operation, it is possible to perform power control suitable for an image with high thermal reliability.
Temperature control based on that control becomes possible.

Embodiment 4 Further, in the embodiments described above, control of the entire screen has been described as an example, but the present invention is not necessarily limited to this. For example, the display screen may be divided into a plurality of blocks, and the image of each block may be divided. May be controlled.

FIG. 18 is an explanatory diagram for explaining an example of control in the case of block division. When the correlation detection unit 2 detects the correlation for each 2 × 2 block, it is detected that the portion indicated by the broken line in the figure has a correlation (correlation in the block) from SF1 to SF3.

Therefore, by setting the correlated blocks in SF1 (LSB) and SF2 to the non-display state (black display), at least the power consumption of the blocks can be suppressed. Further, since the display corresponding to the original display data of the block is performed in SF3, it is possible to prevent the deterioration of the display quality.

In the above embodiments, a PDP display device has been described as an example. However, as a display device having a similar capacitive load, a display device using a liquid crystal panel and an electroluminescence panel are used. Also in a so-called matrix type display device such as a display device, it is possible to perform the configuration described in the description of each embodiment and the operation using this configuration. is there.

[0137]

Since the present invention is configured as described above, it has the following effects. A driving circuit for a matrix display panel according to the present invention is a driving circuit for driving a matrix display panel having a plurality of display cells capable of displaying an image corresponding to input display data, and displays the display data. A time-series correlation between display data corresponding to display on a matrix-type display panel and a data array in a predetermined area corresponding to a plurality of display cells is calculated by a counting unit that counts the number of times display data is switched between cells. A display data discriminating unit having at least one of a correlation detecting unit for detecting, and an output from at least one of the counting unit and the correlation detecting unit being inputted and discriminating a property of the display data; An image processing unit that performs image processing on display data based on the output, so that power consumption is reduced. It can be reliably performed power control.

Further, in the driving circuit for the matrix type display panel according to the present invention, the image processing section is configured to perform the image processing on the display data when the counting result of the counting section becomes a predetermined value or more. Power control can be performed with a simple configuration.

Further, the driving circuit of the matrix type display panel according to the present invention is configured so that the image processing in the image processing section includes a process of adjusting the brightness of the display cell to be displayed, so that the power consumption can be reduced. It is possible to surely lower it.

In the driving circuit for a matrix type display panel according to the present invention, when the image processing section has a correlation between the display data and the data array in the predetermined area, the image processing section lowers the spatial frequency of the display data corresponding to the predetermined area. Since it is configured to include a process of replacing data with the data to be processed, power consumption can be reliably reduced by a simple configuration.

Further, since the driving circuit of the matrix type display panel according to the present invention is constituted by a circuit in which the data arrangement in the predetermined area is fixed, the correlation detection becomes simple, and the display data of the predetermined pattern is selectively provided. It is possible to realize a significant reduction in power consumption.

Further, the drive circuit of the matrix type display panel according to the present invention is configured so that the predetermined area is the entire display area of the matrix type display panel, so that the power consumption of the entire screen can be reduced. .

The matrix type display device according to the present invention includes a matrix type display panel and any one of the above-described matrix type display panel driving circuits connected to the electrodes of the matrix type display panel. A matrix type display device with lower power consumption than that of the display device can be realized.

Further, the matrix type display device according to the present invention is characterized in that the matrix type display panel is a plasma display panel, so that a device with lower power consumption than the conventional plasma display device can be realized. In addition, the simplification of thermal measures can reduce the thickness of the device and improve the accuracy of power control by signal processing. .

[Brief description of the drawings]

FIG. 1 is a block diagram of a display data control unit according to the first embodiment.

FIG. 2 is a block diagram of a display data control unit according to the first embodiment.

FIG. 3 is an explanatory diagram schematically showing a panel driving system and a driving mode of the PDP display device according to the first embodiment.

FIG. 4 is an explanatory diagram for explaining an equivalent circuit model and an operation concept at the time of a write operation in the PDP according to the first embodiment;

FIG. 5 is an explanatory diagram for describing a method of counting the number of times of switching between discharge and non-discharge in the first embodiment.

FIG. 6 shows the number of discharges counted in the first embodiment.
FIG. 4 is an explanatory diagram illustrating an example of a relationship between the number of times of non-discharge switching and power consumption.

FIG. 7 is an explanatory diagram illustrating an example of a case where display data is controlled based on the number of times of switching between discharge and non-discharge output from the counting unit according to the first embodiment.

FIG. 8 is a flowchart of power control according to the first embodiment.

FIG. 9 is a block diagram illustrating a display data control unit in the PDP display device according to the second embodiment.

FIG. 10 is a block diagram illustrating a display data control unit in the PDP display device according to the second embodiment.

FIG. 11 is a block diagram illustrating an example of a configuration of a correlation detection unit according to Embodiment 2.

FIG. 12 is an explanatory diagram for describing a correlation coefficient according to the second embodiment.

FIG. 13 is an explanatory diagram exemplifying video to be displayed for three subfields (SF1 to SF3) as display data of a PDP having display cells of 4 rows × 6 columns in the second embodiment.

FIG. 14 is a flowchart illustrating image control based on correlation detection according to the second embodiment.

FIG. 15 is a block diagram illustrating a display data control unit in a PDP display device according to a third embodiment.

FIG. 16 is a block diagram illustrating a display data control unit in a PDP display device according to a third embodiment.

FIG. 17 is a flowchart in the case where both operations of a counting unit and a correlation detecting unit are performed in the third embodiment.

FIG. 18 is an explanatory diagram for describing an example of control when block division is performed in the fourth embodiment.

FIG. 19 is a schematic configuration diagram of a conventional AC plasma display device.

FIG. 20 is an explanatory diagram for describing a countermeasure against heat in a conventional device.

FIG. 21 is a block diagram showing a configuration for reducing power consumption in a conventional plasma display device.

[Explanation of symbols]

1 display data, 2 correlation detector, 3 counter, 4
A display determination unit, 5 display data processing unit, 6 image adjustment unit, 7a i subfield information detection unit, 7bj subfield information detection unit, 8 arithmetic unit, 9 correlation determination unit, 18 delay unit.

Claims (8)

[Claims] 1. A drive circuit for driving a matrix display panel having a plurality of display cells capable of displaying an image corresponding to input display data, wherein the display data is displayed between the display cells. A time-series correlation between the display data corresponding to the display on the matrix type display panel and the data array in a predetermined area corresponding to the plurality of display cells is detected. A display data discriminating unit that receives at least one of the counting unit and the correlation detecting unit and determines the property of the display data. An image processing unit for performing image processing on the display data based on the output from the matrix type display panel. Drive circuit. 2. The driving circuit according to claim 1, wherein the image processing unit performs image processing on the display data when the count result of the counting unit is equal to or more than a predetermined value. . 3. The driving circuit for a matrix-type display panel according to claim 2, wherein the image processing in the image processing unit includes a process of adjusting brightness of a display cell to be displayed. 4. The image processing in the image processing unit includes a process of, when display data and a data array in a predetermined area have a correlation, replacing the display data corresponding to the predetermined area with data for lowering a spatial frequency of the display data. 2. The driving circuit for a matrix type display panel according to claim 1, wherein: 5. The driving circuit for a matrix type display panel according to claim 4, wherein a data array in a predetermined area is fixed. 6. The driving circuit for a matrix type display panel according to claim 2, wherein the predetermined area is the entire display area of the matrix type display panel. 7. The matrix type display panel, and connected to electrodes of the matrix type display panel.
A matrix-type display device, comprising: the matrix-type display panel drive circuit according to any one of claims 1 to 6. 8. The matrix type display device according to claim 7, wherein the matrix type display panel is a plasma display panel.