JP2001102699A - Construction of directly layered board and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a construction of a directly layered board and its manufacturing method. SOLUTION: This method for manufacturing a directly layered board is provided with a step for forming a liquid-impregnated insulating layer on the core material of a substrate, a step for making the liquid-impregnated insulating layer semi-promoting, a step for forming a core construction of a multilayer substrate by bonding plural core materials provided with the semi-promoting insulating layer, a step for forming a circuit pattern on the outermost layer of the core construction of the multilayer substrate, and a step for turning the semi-promoting insulating layer into full promoting state.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a substrate, and more particularly to the design of an insulating layer on an inner substrate and the improvement of heat dissipation and dielectric properties of the material.

[0002]

2. Description of the Related Art In an integrated circuit process, a substrate of an integrated circuit is required to have high density and good heat dissipation in order to increase the speed of circuit blocking and increase the degree of integration. Therefore, high-density wiring (Hi
gh Density Interconnection; H
DI) substrates have become the mainstream of today's packaging technology, in which the structure of a multilayer (four-layer) substrate is such that an inner layer circuit (Inner l) is formed on an insulating core material (thin core).
a) pattern, and an insulating layer is formed on the circuit pattern, and the outermost layer of the insulating layer is a copper foil (cupper).
clad). The above-mentioned insulating core material may be provided with a buried bias according to actual needs.
vias), blind bias (blind bia)
s) Alternatively, a through-hole design is provided, and if the substrate is more multilayered, the number of circuit patterns increases.

[0003] Since the above-mentioned insulating core material has blind holes, the flatness of the thickness of the insulating layer on the circuit pattern is controlled,
In addition, filling the blind hole with resin is one of the important issues at present. At present, the following three methods are employed in the substrate manufacturing process. That is, (1) a prepreg heat-press lamination method, (2) a P1 film heat-press lamination method,
(3) R.I. C. C. This is a backside resin copper foil heating and pressing lamination method.

[0004] The prepreg heating and pressurizing lamination method will be described. As shown in FIG.
No. 0 is manufactured and the circuit pattern 20 is formed on both sides thereof. The insulating core material 10 is composed of various types such as an epoxy resin and a curing agent, and the above-mentioned insulating core material 10 includes a design of a blind bias 100 or a through hole (not shown). Subsequently, a prepreg 30 composed of an epoxy resin
Is formed as an insulating layer on the circuit pattern 20, and the prepreg 30, the blackened copper foil 40 and the circuit pattern 20 are joined by heating and pressing. The above-mentioned prepreg heating and pressurizing lamination method uses a flake prepreg 30 of epoxy resin and the amount of the resin is finite, so that the flatness of the copper foil 40 becomes poor and the blind bias 100 is completely filled. Can not be done, so if the blind bias 1
When I tried to fill 00, it was a bomber. other than this,
Glass woven fabric is used as the base material for the prepreg 30 of the epoxy resin prepreg 30, and its dielectric constant (k)
Is between 4.8 and 4.3, the signal transmission delay (R-
C delay), and it is difficult to control the pressure and the reaction time during the heating and pressurizing process, so that the epoxy resin prepreg 30 was difficult to control.

As shown in FIG. 2, the Pl film heating and press laminating method is the same as the prepreg heat and press laminating method described above in using the insulating core material 10, the circuit pattern 20, the blind bias 100 and the copper foil 40. is there. This Pl
The different point of the film heating and pressing lamination method is polyimide 50
And that the sandwich structure formed of the epoxy resins 51 and 52 is used as an insulating layer between the copper foil 40 and the circuit pattern 20. In this method, by improving the material of the insulating layer, the dielectric constant (k) of the material of the insulating layer can be reduced and the signal transmission speed can be increased. The manufacturing method of this method is similar to the above-mentioned prepreg heating / pressing lamination method, and the bonding is performed by the heating / pressing method. Since the Pl heating and pressurizing lamination method uses a flaky sandwich structure (including portions denoted by reference numerals 50, 51 and 52), the amount of resin is finite. And the blind bias 100 could not be completely filled, and there was a risk that a bomb plate would be formed if the blind bias was to be filled hard.
In addition, the dielectric constant (k) of the insulating layer can be reduced by the sandwich structure. However, since the difference in stress between the circuit pattern 20 and the sandwich structure is large, the operation for removing the perforations and the resin residue in the subsequent process is large. There is a possibility that a crack state may occur in the substrate or the insulating layer.

[0006] R. C. C. As shown in FIG. 3, the backside resin copper foil heating and pressing laminating method uses the above-described prepreg heating and pressing laminating method and the Pl film heating in using the insulating core material 10, the circuit pattern 20, the blind bias 100 and the copper foil 40. It is the same as the pressure lamination method. This R. C. C.
A different point of the backside resin copper foil heating / pressing lamination method is that an epoxy resin 60 is applied to the copper foil 40 and directly bonded to the circuit pattern 20 by heating / pressing. Although this method can effectively reduce the dielectric constant by reducing the thickness of the epoxy resin 60, it cannot improve the flatness of the copper foil 40 at all, and completely fills the blind bias 100. However, there is a possibility that a bomb plate may be formed when the filling is performed hard. In addition, this method can only slightly produce the material of the outermost layer, and the step of four or more layers is a bottleneck.

The insulating layer on the inner circuit in the substrate is closest to the dielectric layer of the electronic device, and its dielectric constant (k) directly affects the transmission speed of electronic signals. For this reason, efforts have been made to improve the insulating layer material in the substrate process to increase the flatness of the copper foil so as to be compatible with the fine circuit fabrication of the substrate of the deep submicron electronic device. This is because if the flatness of the copper foil is poor, the critical dimension during the lithography process cannot be reduced. United States Patent No. No. 5,126,192 discloses a method of increasing the electron propagation speed by modifying the dielectric constant of an insulating material in the Pl film heating and pressing lamination method. In addition, Taiwan Patent No. 318996 is described in R.E.
C. C. The present invention relates to improvement of a material of an insulating layer on a copper foil in a backside resin copper foil heating and pressing lamination method.

[0008]

SUMMARY OF THE INVENTION It is a main object of the present invention to improve the yield of fine circuits on a substrate by improving the flatness of an insulating layer and solving the problem of poor copper foil flatness on the substrate. It is an object of the present invention to provide a structure and a manufacturing method of a directly laminated substrate.

Another object of the present invention is to provide a structure and a manufacturing method of a directly laminated substrate, which can improve the yield of filling a resin into a blind bias.

It is still another object of the present invention to provide a structure and a manufacturing method of a directly laminated substrate in which the consistency of the thickness of the substrate is increased so that the substrate is not deformed due to a change in environmental temperature.

Still another object of the present invention is to provide a structure of a directly laminated substrate which does not crack in a substrate or an insulating layer in a subsequent punching process by using the same material for an insulating layer and a core material. It is to provide a manufacturing method.

[0012]

According to the first aspect of the present invention, there are provided the following steps a to e: a. Forming an insulating layer in a liquid-impregnated state on a core material of a substrate; b. Bringing the liquid-impregnated insulating layer into a semi-stabilized state; c. Joining a plurality of core materials having a semi-stabilized insulating layer to form a core structure of the multilayer substrate; d. Forming a circuit pattern on the outermost layer of the outermost layer of the core structure of the multilayer substrate; e. A method for manufacturing a directly laminated substrate, comprising the steps of: bringing the above-mentioned semi-transformed insulating layer into a fully-transformed state; The invention according to claim 2 is that, in the step a), the insulating layer in a liquid-impregnated state is dipped,
The method according to claim 1, wherein the substrate is formed by any one of spin coating, screen coating, and roller coating. The invention according to claim 3, wherein in the substrate structure of a direct lamination, a plurality of core materials, a plurality of insulating layers located in and above the plurality of core materials and surrounding the plurality of core materials, A direct laminated substrate structure comprising the above two outermost circuit patterns connected to the outermost layer of the material. According to a fourth aspect of the present invention, the insulating layer is formed by any one of dipping, spin coating, screen coating, and roller coating. .

[0013]

According to the present invention, a single core material is provided, and a circuit pattern is formed on upper and lower surfaces of the core material. The core material has a plurality of blind biases. Subsequently, a layer of a solvent containing an epoxy resin is formed on the circuit pattern and during the blind bias.
Since the fluidity of the solvent is good, an insulating layer with good flatness can be formed, and the gap during the blind bias can be filled. Subsequently, the insulating layer of the internal wiring pattern is formed by heating the solvent containing the epoxy resin. Subsequently, the bonding between the copper foil and the insulating layer proceeds,
That is, after a resin containing an epoxy resin is spin-coated on the above-mentioned insulating layer, a semi-epitaxial state is formed after heating, and then a step of heating and pressing is performed to join the insulating layer and the copper foil, and thus, Complete the manufacture of the substrate.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention provides a new method of manufacturing a substrate insulating layer, in which the A-stage, that is, a polymer impregnated with a liquid is filled in a blind bias so that air does not exist in the blind bias, In addition, the flatness of the insulating layer formed on the circuit pattern is increased by making the insulating layer material a liquid polymer-impregnated high molecular polymer. In addition, the above-mentioned insulating layer material is heated and pressurized to form a B stage, that is, a semi-polymerized polymer, and the outermost copper foil is directly bonded. A substrate manufactured by using this method is provided for manufacturing a fine circuit with high flatness, and the circuit quality and stability are made better than those obtained by the conventional technology. The following examples are for fabricating two- and four-layer substrates and are provided to illustrate the principles and spirit of the present invention.

The basic structure of the substrate has one insulating core material, and the insulating core material has a circuit pattern on both sides thereof. The circuit pattern is manufactured according to the design, and after the copper foil is pressed, the circuit is formed by lithography. A pattern is defined and formed by an etching method. Insulating layers are formed between circuit patterns to prevent short circuit problems between circuits, and if a four-layer board is manufactured, the outermost layer of insulating layers is another set of insulating core material, circuit patterns and insulating layers One set of circuit patterns and the insulating core material 10 form two layers of internal circuit patterns. In this way, the number of internal circuit pattern layers is increased according to actual demand, and finally the outermost insulating layer To form a substrate having a multilayer internal circuit pattern. In addition, the above-mentioned insulating core material is provided with a design of a circuit conduction hole between layers according to actual demand, and depending on a difference in the position, a blind bias, a through hole, or a through hole is provided. It is called buried bias.

First Embodiment: The first embodiment is an embodiment of a four-layer substrate according to the present invention. First, as shown in FIG. 4, an insulating core material 10 is prepared, and a circuit pattern 20 is formed on both surfaces thereof. The insulating core material 10 is composed of various materials such as an epoxy resin, a curing agent, a low-stress agent, a filler and a binder.
(There may be a plurality of blind biases 100, but only one is shown in the present embodiment), there are designs of through holes (not shown) or buried biases (not shown), and the thickness is 50 ° or more. It is said. After the circuit pattern 20 is defined and formed, the copper of the circuit pattern 20 is blackened.

Before explaining the points of the present invention, three steps for producing a high molecular polymer in the steps of the points of the present invention will be described first. First, materials such as a polymer monomer, a curing agent and an activator are mixed to form a liquid mixture. This state is called an A stage, that is, a liquid impregnated state. Next, the mixture of the A stage is heated from 100 ° C. to 300 ° C. and pressurized to perform half polymerization, and the mixture at this time is in a semi-solid state. This state of the mixture is referred to as the B-stage, which is a semi-stabilized state. Further, the mixture at the B stage is heated to 100 ° C to 300 ° C
The mixture is heated and pressurized to almost completely polymerize the mixture to a completely cured state. This state of the mixture is referred to as C-stage, which is the fully spontaneous state. In the following description of the embodiment, an example of a high molecular polymer made of an epoxy resin material will be described, and the description of the steps of A, B, and C stages will be omitted. However, instead of the polymer used in the present invention, polyimide or bismalimide triazine resin (bismalei) is used.
mid tria Resin) can be used.

Next, the point of the present invention will be described. As shown in FIG. 4, the circuit pattern 20 and the blind bias 100 are covered and filled with an A-stage epoxy resin 500 using a dipping, spin coating, screen coating, or roller coating method. Epoxy resin 5 with good flatness
A layer of No. 00 is formed. Subsequently, the step of setting the epoxy resin 500 to the B stage proceeds, and the epoxy resin 500 is brought into a semi-polymerized state. Subsequently, the copper foil 40 and the circuit pattern 20 are joined using the semi-polymerized state of the epoxy resin 500 part. After the joining, the step of setting the epoxy resin 500 to the C stage proceeds, and the epoxy resin 500 is completely polymerized to be in a completely solidified state.

If the thickness of the applied epoxy resin 500 is insufficient, after the step of forming the B stage or the step of forming the C stage with respect to the above-described epoxy resin 500, the A stage is further continued. Is applied on the above-mentioned B-stage or C-stage epoxy resin 500, and the epoxy resin is applied in this manner so that the thickness does not conform to the process requirements, and the epoxy resin is applied in an overlapping manner. The process of
Epoxy resin 50 as insulating layer on circuit pattern 20
0 has a higher flatness. The situation is shown in FIG.

The flatness of the epoxy resin 500 formed by the above method is good and its thickness can be controlled by the coating process. Thus, when joining the copper foil 40, the copper foil 40 can be kept flat,
The level difference formed by the circuit pattern 20 does not affect the flatness of the copper foil 40. In addition, the thickness of the above-described epoxy resin 500 can be adjusted by overlapping application of the A-stage epoxy resin according to process requirements, and the flatness thereof can be increased. The present invention can also be applied to a substrate without a blind bias or a single-layer circuit pattern design.

Second Embodiment A second embodiment is an example for explaining a method of manufacturing a multi-layer substrate by applying the present invention, taking a six-layer substrate as an example. First, as shown in FIG. 5, one insulating core material 10 is manufactured, and the circuit patterns 2 are formed on both sides thereof.
0 is formed. The insulating core material 10 and the circuit pattern 20
Are the same as those of the first embodiment.

Next, the points of this application embodiment will be described. As shown in FIG. 5, the epoxy resin 5 of the A stage is immersed, spin-coated, screen-coated or roller-coated.
00 covers the circuit pattern 20 and fills the blind bias 100 to form a layer of epoxy resin 500 with good flatness on the circuit pattern 20. At this time A
Since the epoxy resin of the stage is in a liquid state, the epoxy resin 500 is completely filled in the blind bias 100 and the flatness of the layer of the epoxy resin 500 formed on the circuit pattern 20 is good. However, if the thickness of the epoxy resin 500 is insufficient, the thickness of the insulating layer is increased by repeating the steps of applying the epoxy resin described in the first embodiment. Also in this embodiment, instead of the epoxy resin 500, polyimide or bismalimide triazine resin (bismalemid) is used.
etriazine Resin) can be used.

Subsequently, as shown in FIG. 5, the insulating core material 10 and the circuit pattern 2 manufactured and completed as described above are formed.
After manufacturing two laminates composed of the epoxy resin 500 and the epoxy resin 500, the outermost layer of the epoxy resin 500 is held on the B stage to maintain the bonding ability, thereby directly bonding without applying other bonding materials. As shown in FIG. 5, after the joining of the two laminates is completed, as shown in FIG. 5, utilizing the fact that the epoxy resin 500 on the unjoined surface of the outermost layer is a B stage, the same as in the first embodiment, After the direct bonding with the copper foil 40, the step of setting to the C stage is advanced to cure the epoxy resin 500. After bonding the structure shown in FIG. 5 in this manner, further drilling is performed (not shown), thus completing the laminated core structure for a six-layer substrate of this embodiment. The copper foil 40 in this embodiment can also be formed by a chemical copper plating method, and the outermost circuit pattern 22 is formed by a lithography and etching method, thus completing a six-layer printed circuit board. The structure of the completed printed circuit board is as shown in FIG.

The difference between this embodiment and the first embodiment is as follows. That is, in this embodiment, there are two more circuit patterns 20 and the insulating core material 10 than the first embodiment between the copper foil 40 or the outermost circuit pattern 22.

[0025]

In summary, the structure and manufacturing method of the direct laminated substrate provided by the present invention have the following advantages as compared with known techniques. 1. The flatness of the insulating layer manufactured according to this embodiment is good,
For this reason, there is no need to consider the flatness of the copper foil to be joined, and the present invention is suitable for manufacturing fine circuits on a substrate. 2. The material of the insulating layer is in a liquid state, so the amount of resin provided during the blind bias is larger than the method using a well-known dry film, the blind bias can be easily filled, and the phenomenon caused by the remaining air occurs. Do not let. 3. Since the transmission speed and transmission consistency of an electronic signal are related to the material properties and material thickness of the insulating layer, in the present invention, the uniformity of the thickness of the insulating layer is controlled by a method of forming the insulating layer by an overlapping coating process. ing. 4. Since the material of the insulating layer and the material of the insulating core material are the same, it is not necessary to consider the stress due to the difference in the material of each layer in the subsequent punching process, and therefore the factors that need to be considered in the process are reduced and required. Technology is correspondingly lower, which improves product yield. 5. The liquid coating method can increase the thickness of the substrate and increase the uniformity of the substrate.

Of course, the above description is only slightly related to the preferred embodiment of the substrate structure and manufacturing process of the present invention, and does not limit the scope of the present invention. All modifications that can be easily made based on the present invention belong to the scope of the present invention, and the protection scope of the present invention is determined by the description of the claims.

[Brief description of the drawings]

FIG. 1 is a view showing a substrate structure by a well-known prepreg heating / pressing lamination method.

FIG. 2 is a view showing a substrate structure by a well-known Pl film heating / pressing lamination method.

FIG. C. C. It is a board | substrate structure display figure by the back pressure resin copper foil heating-pressure lamination method.

FIG. 4 is a view showing a structure of a substrate directly laminated in the first embodiment of the present invention.

FIG. 5 is a view showing a structure of a substrate directly laminated in a second embodiment of the present invention.

FIG. 6 is a view showing a structure of a substrate directly laminated in a second embodiment of the present invention.

FIG. 7 is a view showing a state of overlapping application of an epoxy resin in the present invention.

[Explanation of symbols]

Reference Signs List 10 core material 20 circuit pattern 21 circuit pattern 22 outermost layer circuit pattern 30 epoxy resin prepreg 40 copper foil 50 polyimide 51 polyimide 52 polyimide 60 epoxy resin 100 blind bias 500 epoxy resin

Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (reference) H01L 23/12 NF term (reference) 5E346 AA06 AA12 AA15 AA22 AA26 BB01 CC08 CC10 DD03 DD12 DD32 EE31 GG22 GG28 HH11 HH33 5F033 HH11 QQ00 QQ74 RR21 RR22 SS22 XX01

Claims (4)

[Claims] 1. Each of the following steps a to e: a. Forming an insulating layer in a liquid-impregnated state on a core material of a substrate; b. Bringing the liquid-impregnated insulating layer into a semi-stabilized state; c. Joining a plurality of core materials having a semi-stabilized insulating layer to form a core structure of the multilayer substrate; d. Forming a circuit pattern on the outermost layer of the outermost layer of the core structure of the multilayer substrate; e. A method for manufacturing a directly laminated substrate, comprising the steps of: bringing the above-mentioned semi-saturated insulating layer into a fully-saturated state; 2. The method according to claim 1, wherein the insulating layer in the liquid-impregnated state in the step a) is formed by any one of dipping, spin coating, screen coating and roller coating. A method for manufacturing a laminated substrate. 3. A directly laminated substrate structure, comprising: a plurality of core members; a plurality of insulating layers located in and above the plurality of core members and surrounding the plurality of core members; A circuit structure of a direct lamination, comprising: the two outermost circuit patterns connected to the outermost layer. 4. The direct laminated substrate structure according to claim 3, wherein the insulating layer is formed by any one of dipping, spin coating, screen coating and roller coating.