JP2001102544A - Thin-film capacitor and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable thin-film capacitor, having satisfactory capacitor characteristics and its manufacturing method by avoiding roughness and delamination at an interface between a lower electrode and buffer layer. SOLUTION: A barrier layer 2, a lower electrode layer 4, dielectric thin film 5, and an upper electrode layer 6 are formed on a semiconductor substrate. Between the barrier layer 2 and lower electrode layer 4, a buffer layer 3 including an oxide, which is mainly made of anatase, is interposed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film capacitor used for a semiconductor memory device and the like and a method for manufacturing the same.

[0002]

2. Description of the Related Art In recent years, semiconductor memory devices have been increasingly miniaturized with the development of integrated circuit technology, and further miniaturization of thin film capacitors, which are essential circuits for semiconductor memory devices, has been demanded.

A thin film capacitor used in a conventional semiconductor memory device is a trench capacitor in which a storage capacitor film is formed by digging a groove in the same substrate as an active element such as a transistor, or a stack capacitor in which a storage capacitor film is stacked on a substrate. These capacitors have a three-dimensional structure, and these have been designed for high integration by effectively increasing the area of the storage capacitor.

However, while the miniaturization of active elements has been accelerated, the miniaturization of thin-film capacitors has been relatively delayed, which is a major factor in preventing further high integration of semiconductor memory devices. ing. The reason is that the conventionally used dielectric material is silicon oxide (Si)
O2) and silicon nitride (Si3N4)
This is because the dielectric constant is limited to a material having a dielectric constant of at most 10 or less, and in order to reduce the size of the thin film capacitor, the development of a dielectric having a higher dielectric constant is required.

[0005] SrTiO which is a perovskite oxide
₃ , BaTiO ₃ , PbTiO ₃ , PbZrO _3, etc. are known to have a single composition and a mutual solid solution composition and have a dielectric constant of 100 or more and even 1000, and are widely used for ceramic capacitors.

The thinning of these materials is extremely effective in reducing the size of the above-mentioned thin film capacitors, and has been studied for some time, and relatively good characteristics have been obtained. In particular, SrTiO ₃ (STO), Bal-
xSrxTiO ₃ (BSTO) is currently being actively studied as a DRAM capacitor.

On the other hand, a storage device (ferroelectric memory: FeRAM) using a ferroelectric thin film as a storage medium has been developed. The ferroelectric material is non-volatile, so that its memory contents are not lost even after power is turned off, and when the ferroelectric film thickness is sufficiently thin, the spontaneous polarization is reversed quickly, and writing and reading are as fast as DRAM. Is possible. Further, since a 1-bit memory cell can be composed of one transistor and one ferroelectric thin film capacitor, it is suitable for increasing the capacity.

Here, a ferroelectric thin film used for a ferroelectric memory is required to have the following characteristics.

(1) The remanent polarization is large, (2) the coercive voltage is small, (3) the temperature dependence of the remanent polarization is small, and (4) the remanent polarization can be maintained for a long time (retention). Have the features such as.

At present, as a dielectric material, mainly lead zirconate titanate (Pb (Zr, Ti) O ₃ (hereinafter PZ)
T). PZT is a solid solution of lead zirconate and lead titanate. A solid solution having a molar ratio of about 1: 1 is excellent as a storage medium because it has a large spontaneous polarization and can be inverted even in a low electric field. It is believed that. Further, PZT has an advantage that the stored contents are less likely to be lost due to heat because the dislocation temperature (Curie temperature) of the ferroelectric phase and the paraelectric phase is relatively high at 573K.

However, it is known that PZT is difficult to produce a high quality film. The first reason is that lead, which is the main component of PZT, is likely to evaporate at 773K or higher, so that it is difficult to control the composition accurately.
Second, PZT exhibits ferroelectric properties only when it has a perovskite crystal structure. However, PZT having this perovskite crystal structure is difficult to obtain, and the pyrochlore crystal structure is more easily formed.

Further, it is said that when applied to a silicon device, it is impossible to cope with miniaturization because diffusion and evaporation of Pb, which is a main component, easily occurs at a relatively low temperature.

Other than PZT, barium titanate (Ba)
TiO ₃ (hereinafter abbreviated as BTO) is known as a typical ferroelectric substance. It is known that BTO has a perovskite-type crystal like PZT and has a Curie temperature of 393K. Since Ba is less likely to evaporate than Pb, it is relatively easy to control the composition in forming a BTO thin film. When BTO is crystallized, it hardly takes a crystal structure other than the perovskite type.

Despite the advantages described above, the reason that the BTO thin film capacitor has not been studied so much as a storage medium of a ferroelectric memory is that the remanent polarization is smaller than that of PZT and the remanent polarization is lower. The temperature dependency is large. The reason is that the Curie temperature of BTO is low. Therefore, when a ferroelectric memory is manufactured, not only may the stored contents be lost when exposed to a high temperature of 373 K or more, but also the electronic circuit normally used. The temperature dependence of remanent polarization is large even in the temperature range (358 K or lower), and the operation becomes unstable.

Therefore, it is considered that a thin film capacitor using a ferroelectric thin film made of BTO is not suitable for use as a storage medium of a ferroelectric memory.

On the other hand, the present inventors have selected Pt or SrRuO3 (hereinafter abbreviated as SRO) as the lower electrode, and have selected BSTO having a larger lattice constant as the dielectric film, and have grown it by epitaxial growth. By doing so, it has been found that the lattice can be extended in the c-axis direction and kept in a contracted state in the a-axis direction.

Further, as a result, the Curie temperature is shifted to a higher temperature side, a large amount of polarization is exhibited in the room temperature region, and
It has been found that a ferroelectric film capable of maintaining a sufficiently large amount of remanent polarization even when the temperature is increased to about 8K is obtained.

Also for an epitaxial capacitor for a DRAM, an extremely high dielectric constant and a strain-induced ferroelectricity can be exhibited by utilizing the lattice distortion of the dielectric caused by the lattice mismatch between the electrode and the dielectric. Using this, it is possible to produce an ultra-highly integrated DRAM having a paraelectric capacitor having a very high charge storage amount.

However, such DRAMs and PZs using high dielectric thin film capacitors such as STO and BSTO are used.
FeRAM and epitaxial BS using T etc.
F using TO / Pt or BSTO / SRO film etc.
When these thin films are directly grown on a Si substrate to form an eRAM or a DRAM, for example, when a semiconductor substrate on which a switching transistor is formed and a memory cell made of a perovskite ferroelectric are combined, a lower electrode is used. Or Pt, Ru,
There is a problem in that elements such as Sr and Ba diffuse in the transistor and adversely affect the switching operation.

For this reason, it is necessary to interpose a barrier layer for preventing interdiffusion between the semiconductor substrate and the lower electrode or the dielectric thin film. Further, in order to obtain the above-mentioned epitaxial effect, it is necessary that this barrier layer is also epitaxially grown on the semiconductor substrate.

As the barrier layer, titanium nitride (hereinafter referred to as T
iN) is mainly studied. TiN has a high barrier property against Al and the like, and is widely used as a barrier metal in current Si devices. Further, since it is a compound having a high melting point (having a melting point of 3273K or more), it has high thermal stability. Further, the specific resistance is about 50 μΩ · c with a polycrystalline film.
m, which is as low as about 18 μΩ · cm in the epitaxial film, there is an advantage that the contact resistance can be reduced when electric characteristics in the film thickness direction are used.

In a perovskite type high dielectric thin film capacitor such as STO, BSTO, and PZT,
Noble metals such as Pt and Ru, or oxides thereof, or lower electrodes in which the oxides are further formed on these metals have been used.

Of these, Ru has particularly good workability and can be finely processed by RIE or the like.
It has been considered to be an excellent capacitor electrode for a DRAM.

When a conductive perovskite oxide having the same crystal structure as that of STO, BSTO, etc. is used as an electrode material, high interface matching is obtained at the dielectric / electrode interface, and defects and interface levels are generated. It has been found that since the suppression is suppressed, there is an advantage that a capacitor exhibiting good electrical characteristics such as a high dielectric constant and a low leak current, high reliability due to a high dielectric breakdown voltage, and a long life can be obtained.

[0025]

However, when such a perovskite dielectric is formed on Si as a dielectric film of a capacitor, it must be formed in an oxygen-containing atmosphere. P constituting the thin film
When, for example, TiN is used as a barrier layer to suppress mutual diffusion of elements such as t, Ru, Sr, and Ba, TiN
Oxidation occurs, and peeling and rough morphology occur at the interface with the lower electrode.

When the oxidation further proceeds, an oxide is generated at the interface under the electrode with the plug made of polysilicon or epitaxially grown single-crystal Si, etc., resulting in excessive contact or, in some cases, It is known that these reactions cause problems such as morphological roughening of the electrode surface and short-circuiting of the capacitor.

In order to prevent oxidation at such an interface, S
The above-mentioned Ti _1-x A having high oxidation resistance is formed on the plug made of i.
It is also possible to provide a conductive buffer layer such as l _x N or to provide a second conductive buffer layer such as platinum between the Ti _1-x Al _x N film and the lower electrode made of a conductive oxide. Degradation of morphology due to oxidation of Ti _1-x Al _x N and Si, and formation of P
Problems such as t morphology roughness have not been solved yet.

On the other hand, in order to prevent the morphology from being deteriorated due to the oxidation, it is possible to form a conductive oxide such as SrRuO3 at a low oxygen partial pressure. However, many conductive perovskite oxides have a low oxygen content. When a film is formed under a partial pressure, there is a problem that crystallinity is deteriorated, and the film quality of the electrode and the dielectric is deteriorated to cause problems such as an increase in leak.

The present invention has been made in view of the circumstances described above, and a thin film capacitor which prevents roughening and peeling at an interface between a lower electrode and a buffer layer, has excellent capacitor characteristics, and has high reliability, and a thin film capacitor having the same. It is intended to provide a manufacturing method.

[0030]

According to the present invention, there is provided a barrier layer formed on a semiconductor substrate.
Comprising a lower electrode layer, a dielectric thin film, and an upper electrode layer,
Provided is a thin film capacitor, characterized in that a buffer layer containing an oxide mainly composed of an anatase structure is interposed between a barrier layer and a lower electrode layer.

In the thin film capacitor of the present invention, the barrier layer can be made of a material represented by Ti _1-x Al _x N.

The present invention also provides a step of forming a barrier layer on a semiconductor substrate, a step of forming a buffer layer containing a metal oxide mainly composed of an anatase structure on the barrier layer, or a step of forming an anatase structure by oxidation in a later step. Forming a buffer layer-forming layer containing a metal capable of mainly forming an oxide, forming a lower electrode layer on the buffer layer or the buffer layer-forming layer, and forming a dielectric thin film on the lower electrode layer And a method of forming an upper electrode layer on the dielectric thin film.

In the method for manufacturing a thin film capacitor according to the present invention, the metal oxide having an anatase structure as a main component is obtained by forming a metal oxide at a temperature of 100 to 700 ° C. In the step of forming the lower electrode layer,
It is oxidized at 400 to 800 ° C. to form an oxide mainly having an anatase structure. Outside these temperature ranges, it is difficult to obtain an oxide mainly composed of an anatase structure.

In the present invention, the term “metal oxide mainly composed of an anatase structure” is not limited to a metal oxide consisting solely of an anatase structure. It is meant to include a metal oxide consisting of a mixture.

When the anatase structure is less than 50%, the rutile structure becomes dominant, and the effects of the present invention cannot be obtained. The thickness of the buffer layer is not particularly limited,
It is preferably from 10 to 40 nm.

By providing a buffer layer containing a metal oxide having an anatase structure as a main component between the lower electrode and the barrier layer, the morphology is degraded or peeled regardless of the type of the lower electrode and the barrier layer. The present invention has been found to have the effect of suppressing the occurrence of leakage and suppressing the increase in leak current, and has accomplished the present invention.

In a usual formation method, TiO ₂ is a reduced type semiconductor, and forms a so _- called lower oxide TiO _{2-δ in} which the ratio of oxygen to Ti is smaller than 2: 1. Therefore, a perovskite type dielectric is formed thereon. When forming a film, oxygen is trapped in an oxygen-containing atmosphere to suppress diffusion of oxygen downward. Thereby, the oxidation of the underlying barrier layer can be suppressed, and the deterioration of the morphology can be suppressed.

The anatase TiO ₂ is in a low-temperature phase and can be easily prepared in terms of process. For example, T
i is formed at 400 ° C. or more and 800 ° C. or less by the thermal oxidation method, and can be formed at room temperature to 700 ° C. or less by a film forming method such as TiO ₂ evaporation or magnetron sputtering.

Further, it is known that the specific resistance is lower by one digit or more than that of the high-temperature phase rutile type. Therefore, when provided below the capacitor, the contact resistance can be reduced.

In order to further increase the conductivity, it is possible to introduce oxygen vacancies. In this case, the deficiency _δ of the anatase type titanium oxide TiO _2-δ into which oxygen deficiency is introduced
About 0.01 to 0.5 is required. However, as described above, when the lower electrode and the dielectric thin film are formed in a high-temperature oxygen atmosphere after the formation of the buffer layer, oxygen deficiency may be lost and conductivity may be lost.

In this case, it is possible to use TiO ₂ having an anatase structure in which a part of the constituent elements is previously substituted with Ta or the like. For example, if a small amount of Ta is added to TiO ₂ , the reaction represented by the following formula produces the same number of Ti ^{3+ as} substituted Ta ⁵⁺ .

(1-x) TiO ₂ + (x / 2) Ta _{2
^{O 5 → xTa 5+ + xTi 3+}} + (1-2
x) Since Ti ⁴⁺ + 2O ² -Ti ³⁺ is considered to be Ti ⁴⁺ + e ⁻ , it has generated x conduction electrons and becomes an n-type semiconductor. As described above, TiO ₂ is introduced into TiO ₂ to replace Ti, and TiO ₂
Are V, Nb, C in addition to Ta.
Examples thereof include pentavalent or higher valent elements such as r, Mo, Ru, Rh, Pd, Mn, Fe, and Ni.

As the barrier layer below the anatase buffer layer, it is desirable to use TiN or Til-xAlxN to which Al is added, but other TaN or TaSiN to which Si is added is used. Layers can also be used.

If a conductive buffer layer made of Til-xAlxN is formed as an epitaxial single crystal film, the conductive buffer layer provided thereon and the lower electrode, dielectric, and in some cases, the upper electrode are also epitaxially grown. It is possible to make single crystal heteroepitaxial all-oxide capacitors.

The lower electrode is made of SrRuO
₃ films, Sr _1-x Ba _x RuO ₃ films, Sr _1-x RE _x
CoO ₃ (RE is at least one selected from La, Pr, Sm, Nd) film, SrTi _1-x M _x O ₃ (M is N
b, Cr, V) at least one film), Sr
It is desirable to use any of the _1-x AR _x TiO ₃ (AR is La) film.

In particular, SrTi _1-x Nb _x O ₃ , Sr
_{The 1-x} La _x TiO ₃ film is most preferable because it has a low specific resistance and is thermodynamically stable.

Various types of dielectrics can be considered for the capacitor used in the dielectric capacitor. The above-mentioned STO and BSTO are used as the high dielectric for the DRAM, and BSTO, PZT, and the like are used as the ferroelectric memory. PLZ
A perovskite dielectric such as T, BiSrTaO or BiSrTiO can be used.

[0048]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Various embodiments of the present invention will be described below with reference to the drawings.

Embodiment 1 This embodiment shows an example in which a capacitor using an epitaxial BSTO as a dielectric film is mounted on a DRAM.

FIG. 1 is a conceptual diagram of a capacitor portion used in the semiconductor memory device according to the present embodiment. First, the single crystal S
Using a helicon sputtering apparatus having an ultra-high vacuum chamber, T was used as a first buffer layer on the substrate on which the plug 1 formed up to i ((100) orientation) was formed.
An i _0.9 Al _0.1 N film 2 was deposited to a thickness of 10 nm.

Next, on this Ti _0.9 Al _0.1 N film 2,
Using a DC sputtering device, a Ti film 3 was deposited to a thickness of 8 nm. The film formation atmosphere at this time was an Ar atmosphere of 0.1 Pa.

Next, an SrTi _0.8 Nb _0.2 O ₃ film 4 as a lower electrode was deposited on the Ti film 3 to a thickness of 30 nm by RF magnetron sputtering. The film formation temperature at this time was 500 ° C. The film formation atmosphere is 0.1 Pa
However, it was confirmed by X-ray diffraction that the Ti film 3 was oxidized by oxygen from the SrTi _0.8 Nb _0.2 O ₃ target and a TiO 2 single phase having an anatase structure was formed.

Thereafter, the surface was flattened by using CMP, and the cells were separated. On this lower electrode 4, a Ba _0.2 Sr _0.8 Ti ₃ film 5 as a dielectric was deposited to a thickness of 20 nm, and a SrRuO ₃ film 6 as an upper electrode was deposited thereon to a thickness of 100 nm. A capacitor was created.

When the X-ray diffraction analysis of the capacitor thus prepared was performed, it was found that the thin film capacitor had a T
i _0.9 Al _0.1 N film 2, SrTi _0.8 Nb _0.2 O ₃ lower electrode 4, Ba _0.2 Sr _0.8 Ti ₃ dielectric film 5, SrRu03 all of the upper electrode 6 is found that epitaxial growth.

Further, when a cross-sectional electron microscope observation was performed, it was found that the lower electrode-dielectric interface, Ti _0.9
No roughness of the interface between the Al _0.1 N film and the SrTi _0.8 Nb _0.2 O ₃ lower electrode was observed.

As Comparative Example 1, TiO having an anatase structure was used.
_A capacitor without the buffer layer 3 composed of ₂ ;
As Comparative Example 2, 10 nm of P was used as the second buffer layer.
When a capacitor having a t film was prepared and its characteristics were compared with those of the capacitor according to the present embodiment, as shown in the surface observation results by the scanning electron microscope shown in FIG. No morphological deterioration was observed and the surface was flat.

On the other hand, in the capacitor according to Comparative Example 1, as shown in the surface observation result by the scanning electron microscope shown in FIG. 3, the entire surface was swollen by about 1 μm and partially peeled off. In addition, also in the capacitor according to Comparative Example 2, swelling occurred as shown in the surface observation result by the scanning electron microscope shown in FIG.

Further, in the capacitor according to the present embodiment, the leakage current density when applying a dielectric constant of 990 and 2.2 V is 1 × 10
^-7 / cm ² or less is obtained.
Dielectric breakdown did not occur even when a DC voltage of 0 V was applied. On the other hand, in the capacitor according to Comparative Example 1, 99% of 260 capacitors could not be measured due to a short circuit, and the result was that the capacitor could not be measured. In the capacitor according to Comparative Example 2, 90% of the 260 capacitors were not measurable due to the short circuit, and the remaining capacitors were also not measured.
Low leakage current, dielectric constant 390, DC10V
The application resulted in the breakdown of 80% of the capacitors within 1000 seconds.

Embodiment 2 This embodiment shows an example in which a capacitor using epitaxial BTO as a dielectric is mounted on an FeRAM.

In the same manner as in Example 1, BT was used as the dielectric.
A semiconductor memory device having a ferroelectric capacitor using O was produced.

First, a helicon sputtering apparatus having an ultrahigh vacuum chamber was used on a substrate on which a plug 1 made of single-crystal Si ((100) orientation) was formed.
As a first buffer layer, a Ti _0.9 Al _0.1 N film 2
deposited to a thickness of nm.

Next, on this Ti _0.9 Al _0.1 N film 2,
Using a DC sputtering device, a Ti film 3 was deposited to a thickness of 8 nm. The film formation atmosphere at this time was an Ar atmosphere of 0.1 Pa.

Next, an SrTi _0.8 Nb _0.2 O ₃ film 4 was deposited as a lower electrode on the Ti film 3 to a thickness of 30 nm by RF magnetron sputtering. The film formation temperature at this time was 500 ° C. The film formation atmosphere is
Although the test was performed in an Ar atmosphere of 0.1 Pa, SrTi _0.8 Nb
It is confirmed by X-ray diffraction that the Ti film 3 is oxidized by oxygen from the _0.2 O ₃ target and a TiO ₂ single phase having an anatase structure is formed.

Although the thickness of the Ti film 3 is set to 8 nm here, the Ti film 3 is oxidized, and
_{When it is 2} , the thickness is about 20 nm. This T
If the thickness of the i film is too thin, the effect of preventing oxidation of (Ti, Al) N is not sufficient, and if it is too thick, the crystallinity of the upper STO deteriorates, so it is preferably about 4 nm to 20 nm, and more preferably about 6 nm to 10 nm. Is the most preferable range.

Thereafter, the surface was flattened by using CMP, and the cells were separated. On this lower electrode 4, a BaTiO ₃ film 5 as a ferroelectric is formed to a thickness of 20 nm, and a SrRuO ₃ film 6 as an upper electrode is further formed thereon for 100 nm.
m to form a ferroelectric capacitor.

When the X-ray diffraction analysis of the thus prepared capacitor was performed, the thin film capacitor was found to have a T
i _0.9 Al _0.1 N film 2, SrTi _0.8 Nb _0.2 O ₃ lower electrode 4, BaTiO ₃ dielectric film 5, SrRuO ₃ upper electrode 6
Was found to be epitaxially grown.

Further, when a cross-sectional electron microscope observation was performed, it was found that the lower electrode-dielectric interface, Ti _0.9
No roughness at the interface between the Al _0.1 N film and the SrTi _0.8 Nb _0.2 O ₃ lower electrode was observed.

The lattice constant (c-axis method) of the dielectric thin film BSTO obtained from the (003) diffraction angle of X-ray diffraction is as follows:
0.433 nm, and it was found that the amount of strain was kept large. In the capacitor of the example, the characteristics of remanent polarization of 0.43 c / m ² and coercive voltage of 1.8 V were obtained, and the leakage current density when 2 V was applied was 2 × 10 ⁻⁷ A / cm.
^The dielectric breakdown did not occur even when a DC voltage of 15 V was applied.

Further, a test circuit of a ferroelectric memory device equipped with this capacitor was prepared, and the so-called fatigue characteristics in FeRAM operation were measured. As a result, 95% or more of the 1000 test bits were 10 ¹² times. It was confirmed that the cleaning operation was performed until the writing operation up to. This allows
It was found that the fatigue of the capacitor was small.

Embodiment 3 This embodiment shows an example in which a capacitor made of a polycrystalline film is mounted on a DRAM.

First, an insulating layer 8 is formed on the substrate formed up to the plug 7 made of polysilicon by plasma TEOS.
It was formed to a thickness of nm. A capacitor trench as shown in FIG. 5 was formed in the insulating layer 8 by lithography to expose the plug 7.

On the insulating layer 8 having the capacitor trenches formed as described above, a TiN film 9 is deposited to a thickness of 10 nm as an adhesion layer using DC sputtering, and then a TiO ₂ film 10 to which Nb is added is formed. The SrRuO ₃ film 11 is deposited as a lower electrode on the R
It was deposited to a thickness of 50 nm using F magnetron sputtering. The deposition temperature of the TiO ₂ film 10 to which Nb is added is
The temperature was 600 ° C.

Thereafter, the surface was flattened by CMP and the cells were separated. On this lower electrode 11, a Ba _0.2 Sr _0.8 TiO ₃ film 12 as a dielectric is
m of SrR as a top electrode.
A uO ₃ film 13 was deposited to a thickness of 100 nm to form a DRAM capacitor.

In the capacitor according to the present embodiment thus formed, the leakage current when applying a dielectric constant of 480 and 1.8 V is 1 × 10 ⁻⁸ A / cm ² or less. No dielectric breakdown occurred when a voltage was applied.

A test circuit of a semiconductor memory device equipped with this capacitor was prepared, and the so-called endurance measurement in DRAM operation, that is, the change in the malfunction rate with respect to the extension of the refresh time was measured.
It was found that 90% or more of the test bits normally operated until a refresh cycle of 20 seconds or more, and the capacitor leak was extremely small.

Embodiment 4 In this embodiment, the FeRA in the case where the Nb addition amount was changed was
An example of mounting on M is shown.

In the same manner as in Example 2, BT was used as the derivative.
A semiconductor memory device having a ferroelectric capacitor using O was produced.

First, Ti _0.9 Al _0.1 N was used as a first buffer layer using a helicon sputtering apparatus 1 having an ultra-high vacuum chamber on a substrate completed up to a plug 1 made of single-crystal Si ((100) orientation). A 10 nm film was deposited. Further, a Ti _1-x
An Nb _x film was deposited to a thickness of 8 nm. The film formation atmosphere at this time is Ar
The test was performed under the condition of 0.1 Pa.

At this time, the Nb amount x was set to 0.1 to 0.5, that is, 10 at%, 20 at%, 30 at%, 40 at%, and 50 at%.
Was changed. After that, when forming SrTi _0.8 Nb _0.2 O ₃ , Ti _1-x Nb _x is oxidized to form Ti
With respect to the _1-x Nb _x O _y layer, it was confirmed by Rutherford backscattering spectroscopy (RBS) that there was no change in the amount of Nb mixed before and after oxidation.

In this case, it was confirmed by XRD that a single phase of TiO ₂ having an anatase structure was formed at a Ti content of 40 at% or less, but a rutile NbO ₂ , which is an oxide of Nb, was formed at a content of 50 at% or more. .

On this, SrTi _0.8 Nb was formed as a lower electrode.
_{A 0.2} O ₃ film is formed to a thickness of 30 nm using RF magnetron sputtering.
Deposited.

Thereafter, the surface was flattened by using CMP and the cells were separated. On this lower electrode, a BaTiO ₃ film as a ferroelectric was deposited to a thickness of 20 nm, and a SrTi _0.8 Nb _0.2 O ₃ film as an upper electrode was deposited thereon to a thickness of 100 nm, thereby producing a ferroelectric capacitor.

X-ray diffraction of the formed capacitor was performed. In this thin film capacitor, a Ti _0.9 Al _0.1 N film, SrTi
_0.8 Nb _0.2 O ₃ Lower electrode and upper electrode, Ba _0.2 Sr
It was found that all the _0.8 TiO ₃ dielectric films were epitaxially grown. Furthermore, when a cross-sectional electron microscope observation was performed, the lower electrode-dielectric interface, Ti
_No roughness at the interface of the _0.9 Al _0.1 N film-SrTi _0.8 Nb _0.2 O ₃ lower electrode was observed.

Table 1 below shows that Ti _1-x Nb _x
BaTiO ₃ of X-ray diffraction when _Oy film is used as a buffer layer
(003) The lattice constant (c-axis direction) of the dielectric thin film obtained from the diffraction angle and the amount of remanent polarization obtained from the ferroelectric hysteresis measured by applying a triangular wave of 500 Hz are shown.

[0085]

[Table 1]

As is clear from Table 1 above, by using a Ti _1-x Nb _x O _y film as the buffer layer, the Ti _1-x
The specific resistance of the Nb _x O _y layer drops rapidly. This is due to an increase in carrier density with an increase in the amount of Nb added.
_The length of the depletion layer existing at the (Ti, Al) N-TiO ₂ interface and the TiO ₂ -lower electrode interface formed when _x alone is reduced.

The depletion layer functions as a low dielectric constant layer, substantially reducing the voltage applied to the ferroelectric layer BaTiO _3, and as a result, reducing the amount of polarization with respect to the applied voltage. When Nb is 50% or more, rutile NbO ₂ is formed as described above, and diffusion of Nb into TiO ₂ is prevented. Therefore, the amount of remanent polarization decreases as the morphology deteriorates. Below 50%, this effect is small.

Embodiment 5 In this embodiment, an example of mounting on an FeRAM when the amount of anatase in TiO ₂ is changed will be described.

In the same manner as in Example 2, BT was used as the dielectric.
A semiconductor memory device having a ferroelectric capacitor using O was produced.

Further, a 20 nm TiO ₂ film was deposited thereon by using a DC sputtering apparatus. At this time, the film formation atmosphere is Ar 0.1 Pa, the substrate temperature is 500 ° C., 600 ° C., 70 ° C.
The film was formed under five conditions of 0 ° C., 800 ° C., and 900 ° C. In this case, it was confirmed by XRD that a TiO ₂ single phase having an anatase structure was formed at a film formation temperature of 600 ° C. or lower.
Above 00 ° C., a mixed layer with a rutile structure was formed.

On this, as a lower electrode, SrTi _0.8 N
b _0.2 O ₃ film was formed by RF magnetron sputtering for 30 n.
m. The film formation temperature was 500 ° C. Then CM
The surface was flattened using P and the cells were separated.

On the lower electrode, BaTi is used as a ferroelectric substance.
O ₃ is 20 nm, and SrT
An i _0.8 Nb _0.2 O ₃ film was deposited to a thickness of 100 nm to form a ferroelectric capacitor.

Table 2 below shows the (004) peak of anatase-type TiO ₂ and the rutile-type TiO _{2 in} X-ray diffraction when the TiO ₂ film formed by changing the film formation temperature according to the present embodiment was used as the buffer layer. (101) Integrated intensity ratio of peak (I ₍₀₀₄₎
/ I ₍₁₀₁₎ ), leak current value when 2 V is applied, 500 Hz
3 shows the amount of remanent polarization obtained from the ferroelectric hysteresis measured by applying the triangular wave shown in FIG. In addition, X-ray diffraction is Cu, K
Using α rays, the tube voltage and the tube current are each 40 kV,
The measurement was performed by θ-2θ scan at 40 mA.

[0094]

[Table 2]

[0095] Incidentally, the anatase type TiO ₂ (004) peak and, rutile TiO ₂ (101) peak integrated intensity ratio I
_It has been confirmed by transmission electron microscopy that ₍₀₀₄₎ / I ₍₁₀₁₎ is almost close to the existence ratio of the crystal layer.

As is clear from Table 2 above, the rutile layer
If the mixing amount exceeds 50%, the upper BaTiO_ThreeLeak of
The current rises sharply. This is due to the rutile layer formation.
This is due to the deterioration of the morphology. Also, morphology
-BaTiO with deterioration _ThreePoor crystallinity (orientation) of
And the amount of remanent polarization decreases. Below 50% this shadow
There is little sound.

[0097]

As described above in detail, according to the present invention, the reaction at the interface with the plug and the plug surface which occur when an oxide having an anatase structure is used as a buffer layer between the lower electrode and the barrier layer. Deterioration of capacitor characteristics due to surface roughness and diffusion due to oxidation of the capacitor is prevented, and a capacitor having good dielectric characteristics and high reliability can be obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a thin film capacitor according to an embodiment of the present invention.

FIG. 2 is an electron micrograph showing the surface of the thin film capacitor according to one embodiment of the present invention.

FIG. 3 is an electron micrograph showing the surface of the thin film capacitor according to Comparative Example 1.

FIG. 4 is an electron micrograph showing a surface of a thin film capacitor according to Comparative Example 2.

FIG. 5 is a sectional view showing a thin-film capacitor according to another embodiment of the present invention.

[Explanation of symbols]

1, 7 plug 2 Ti _0.9 Al _0.1 N film 3 Ti film 4 SrTi _0.8 Nb _0.2 O ₃ film 5 Ba _0.2 Sr _0.8 Ti ₃ film 6 SrRuO ₃ film 8 insulating film 9 TiN film 10 TiO ₂ film 11 ... SrRuO ₃ film 12 ... Ba _0.2 Sr _0.8 TiO ₃ film 13 ... SrRuO ₃ film

 ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Takashi Kawakubo 1-term, Komukai Toshiba-cho, Saiwai-ku, Kawasaki-shi, Kanagawa F-term in Toshiba R & D Center (reference) 5F038 AC05 AC14 DF05 EZ14 5F083 AD31 AD49 FR01 GA25 HA08 JA13 JA14 JA39 JA40 JA45 MA06 MA17 PR17 PR22 PR25 PR40

Claims (4)

[Claims] A semiconductor device comprising a barrier layer, a lower electrode layer, a dielectric thin film, and an upper electrode layer formed on a semiconductor substrate, wherein an oxide mainly composed of an anatase structure is interposed between the barrier layer and the lower electrode layer. A thin film capacitor characterized by interposing a buffer layer containing the same. 2. The thin film capacitor according to claim 1, wherein said barrier layer is made of a material represented by Ti _1-x Al _x N. 3. A step of forming a barrier layer on a semiconductor substrate, a buffer layer containing a metal oxide mainly composed of an anatase structure on the barrier layer, or an oxidation mainly composed of an anatase structure by oxidation in a later step. Forming a buffer layer forming layer containing a metal capable of forming an object; forming a lower electrode layer on the buffer layer or the buffer layer forming layer; forming a dielectric thin film on the lower electrode layer And a step of forming an upper electrode layer on the dielectric thin film. 4. The metal oxide mainly having an anatase structure is obtained by forming a film of the metal oxide at 100 to 700 ° C., or a metal capable of forming an oxide mainly having an anatase structure is: 4. The method according to claim 3, wherein in the step of forming the lower electrode layer, the oxide is oxidized at 400 to 800 [deg.] C. to form an oxide mainly having an anatase structure.
3. The method for manufacturing a thin film capacitor according to item 1.