JP2001102471A - High-frequency semiconductor device - Google Patents

High-frequency semiconductor device

Info

Publication number
JP2001102471A
JP2001102471A JP27506499A JP27506499A JP2001102471A JP 2001102471 A JP2001102471 A JP 2001102471A JP 27506499 A JP27506499 A JP 27506499A JP 27506499 A JP27506499 A JP 27506499A JP 2001102471 A JP2001102471 A JP 2001102471A
Authority
JP
Japan
Prior art keywords
conductor
frequency semiconductor
frequency
semiconductor element
lid
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27506499A
Other languages
Japanese (ja)
Other versions
JP4363717B2 (en
Inventor
Maroaki Maetani
麿明 前谷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP27506499A priority Critical patent/JP4363717B2/en
Publication of JP2001102471A publication Critical patent/JP2001102471A/en
Application granted granted Critical
Publication of JP4363717B2 publication Critical patent/JP4363717B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To diminish a difference in characteristic impedance of a line conductor of a high-frequency semiconductor element after sealing with a metallic lid from that before the sealing in a high-frequency semiconductor device. SOLUTION: The high-frequency semiconductor device is provided with a substrate 11 comprising a mounting 11a for a high-frequency semiconductor element 13 on its upper plane, the high-frequency semiconductor element 13 mounted on the substrate 11a and comprising a line conductor 14, a frame body 12 junctioned with the substrate 11 for surrounding the mount part 11a, a high-frequency input and output part 15 arranged so as to penetrate the frame body 12, and a lid 20 junctioned with the upper surface of the frame body 12. As for the lid 20, upper surface earth conductors 22 are formed on the upper surface of a dielectric plate 21, and lower surface earth conductors 23 are formed on the lower surface except a part 24 which faces to the line conductor 14 of the high-frequency semiconductor element 13. Also, through conductors 15 for passing the conductor 22 and 23 there through are arranged inside the device. A characteristic impedance of the line conductor after sealing can be restrained from changing and a difference in a high-frequency characteristic can be diminished.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明はマイクロ波もしくは
ミリ波を用いた通信機器もしくはセンサ等に使用される
高周波半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high-frequency semiconductor device used for communication equipment or sensors using microwaves or millimeter waves.

【0002】[0002]

【従来の技術】従来、マイクロ波もしくはミリ波帯にお
いて動作する高周波半導体回路等の電子部品は、金属ま
たはセラミック等の誘電体からなる筐体を有する高周波
パッケージの筐体内部に回路を実装し、物理的もしくは
電気的な保護の観点から筐体開口を金属製の蓋体をロウ
付け等により封止することにより、実用に供しうる高周
波半導体装置として構成されていた。
2. Description of the Related Art Conventionally, an electronic component such as a high-frequency semiconductor circuit operating in a microwave or millimeter-wave band has a circuit mounted inside a housing of a high-frequency package having a housing made of a dielectric material such as metal or ceramic. From the viewpoint of physical or electrical protection, the housing opening is sealed with a metal lid by brazing or the like, so that it is configured as a high-frequency semiconductor device that can be put to practical use.

【0003】このような高周波半導体装置の形態として
は、例えば図5に分解斜視図で示すように、金属製の筐
体1を有する高周波パッケージの筐体1内部に、高周波
用半導体素子として、例えば下面に接地導体を、上面に
配線部を有する半導体回路基板2を半田等により接合す
ることにより収容し、線路導体3から成る半導体回路の
入出力端子およびバイアス用端子と高周波パッケージの
入出力端子4とを金ワイヤ5等により接続し、鉄−ニッ
ケル−コバルト合金等の金属製蓋体6を筐体1の開口部
にロウ付けすることにより封止するという構造が一般的
であった。
As a form of such a high-frequency semiconductor device, for example, as shown in an exploded perspective view in FIG. 5, a high-frequency semiconductor element is provided inside a high-frequency package housing 1 having a metal housing 1 as a high-frequency semiconductor element. A ground conductor is provided on the lower surface, and a semiconductor circuit board 2 having a wiring portion on the upper surface is accommodated by joining the solder by soldering or the like. Are connected by a gold wire 5 or the like, and a metal lid 6 made of an iron-nickel-cobalt alloy or the like is sealed by brazing to an opening of the housing 1 in general.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記の
ような高周波半導体装置においては、封止後の状態とし
て、半導体回路上面の配線部における線路導体3と金属
製蓋体6との距離が筐体1の壁の高さ程度となるが、筐
体1の壁は筐体1の内部空間における不要共振を抑制す
るために通常は極力低く設計されるために、線路導体3
と上部接地導体としての金属製蓋体6との距離が近接す
ることとなることから、上部空間が開放されている状態
と、封止後の状態との間で線路導体3のインピーダンス
が異なってしまい、所望の高周波特性を得ることができ
ないという問題点があった。
However, in the above-described high-frequency semiconductor device, the distance between the line conductor 3 and the metal cover 6 in the wiring portion on the upper surface of the semiconductor circuit is determined as the state after sealing. 1, the wall of the housing 1 is usually designed to be as low as possible in order to suppress unnecessary resonance in the internal space of the housing 1.
And the metal lid 6 as the upper ground conductor, the impedance of the line conductor 3 differs between the state in which the upper space is open and the state after the sealing. As a result, there is a problem that desired high-frequency characteristics cannot be obtained.

【0005】本発明は上記従来技術における問題点に鑑
みてなされたものであり、その目的は、封止状態におけ
る高周波用半導体素子の線路導体のインピーダンス特性
を改善して、封止状態と上部空間が開放された状態との
高周波特性の差異を低減することができる高周波半導体
装置を提供することにある。
The present invention has been made in view of the above-mentioned problems in the prior art, and has as its object to improve the impedance characteristics of a line conductor of a high-frequency semiconductor element in a sealed state so that the sealed state and the upper space can be improved. It is an object of the present invention to provide a high-frequency semiconductor device capable of reducing a difference in high-frequency characteristics from a state in which is opened.

【0006】[0006]

【課題を解決するための手段】本発明の高周波半導体装
置は、上面に高周波用半導体素子の搭載部を有する基板
と、この搭載部上に搭載された、線路導体を有する高周
波用半導体素子と、前記基板上に前記搭載部を取り囲む
ように接合された枠体と、この枠体を貫通して設けられ
た高周波入出力部と、前記枠体の上面に接合された蓋体
とを具備して成り、この蓋体は、誘電体板の上面に上面
接地導体が、下面に前記高周波用半導体素子の前記線路
導体と対向する部位を除いて下面接地導体が形成される
とともに、内部に前記上面接地導体と前記下面接地導体
とを導通させる貫通導体が配設されていることを特徴と
するものである。
According to the present invention, there is provided a high-frequency semiconductor device comprising: a substrate having a mounting portion for a high-frequency semiconductor element on an upper surface; a high-frequency semiconductor element having a line conductor mounted on the mounting portion; A frame joined on the substrate so as to surround the mounting portion, a high-frequency input / output section provided through the frame, and a lid joined to an upper surface of the frame. In this lid, an upper surface ground conductor is formed on the upper surface of the dielectric plate, and a lower surface ground conductor is formed on the lower surface except for a portion facing the line conductor of the high frequency semiconductor element, and the upper surface ground conductor is formed inside. A through conductor for conducting between a conductor and the lower surface ground conductor is provided.

【0007】[0007]

【発明の実施の形態】本発明の高周波半導体装置によれ
ば、上面に高周波用半導体素子を搭載するための搭載部
を有する基板と、この基板上に搭載部を取り囲むように
接合された枠体と、この枠体を貫通して設けられた高周
波入出力部と、これら基板と枠体からなる筐体を封止す
るために枠体の上面に接合される蓋体とを具備して成る
高周波半導体装置において、蓋体を、全面に接地導体が
形成された上面と、高周波用半導体素子の線路導体と対
向する部位を除く範囲に下面接地導体が形成されるとと
もに、その内部の上下面とも接地導体が存在する範囲に
形成されたビア導体などの貫通導体が配設されている誘
電体板から成るものとしたことにより、筐体内部の体積
増加を抑えつつ高周波用半導体素子の線路導体からその
上部の接地導体(ここでは上面接地導体)までの距離を
大きくとることができる。そのため、筐体の内部空間に
おける不要共振を抑制するために通常は筐体壁が極力低
く設計され、従来の高周波半導体装置では封止後の状態
において線路導体と上部接地導体である金属製蓋体との
距離が近接することとなり、上部空間が開放されている
状態と封止後の状態とにおいてそれぞれ高周波用半導体
素子の線路導体のインピーダンスが異なってしまう場合
と比較して、封止状態における線路導体のインピーダン
スの変動を抑制して高周波特性を改善することができ
る。その結果、封止状態と上部空間が開放された状態と
の特性の差異が低減できるので、封止後においても、高
周波用半導体素子単体における特性を保証することがで
きる高周波半導体装置となる。
DESCRIPTION OF THE PREFERRED EMBODIMENTS According to a high-frequency semiconductor device of the present invention, a substrate having a mounting portion for mounting a high-frequency semiconductor element on an upper surface, and a frame joined to the substrate so as to surround the mounting portion And a high-frequency input / output unit provided through the frame, and a lid joined to the upper surface of the frame to seal a housing composed of the substrate and the frame. In the semiconductor device, the lid body is formed with an upper surface having a ground conductor formed on the entire surface, a lower surface ground conductor formed in a range except a portion opposed to the line conductor of the high-frequency semiconductor element, and the upper and lower surfaces of the inside are grounded. By using a dielectric plate in which a through conductor such as a via conductor formed in the area where the conductor exists is disposed, the line conductor of the high-frequency semiconductor element is suppressed while suppressing an increase in the volume inside the housing. Upper ground conductor ( In this it is possible to increase the distance to the top ground conductor). Therefore, in order to suppress unnecessary resonance in the internal space of the housing, the housing wall is usually designed to be as low as possible, and in a conventional high-frequency semiconductor device, a metal lid which is a line conductor and an upper ground conductor in a state after sealing is used. And the impedance of the line conductor of the high-frequency semiconductor element is different between the state in which the upper space is opened and the state after sealing, respectively, compared with the case where the impedance of the line conductor of the high-frequency semiconductor element is different. High frequency characteristics can be improved by suppressing fluctuations in the impedance of the conductor. As a result, the difference in characteristics between the sealed state and the state in which the upper space is opened can be reduced, so that the high-frequency semiconductor device can guarantee the characteristics of the high-frequency semiconductor element alone even after sealing.

【0008】以下、図面に基づいて本発明を詳細に説明
する。なお、本発明は以下の例に限定されるものではな
く、本発明の主旨を逸脱しない範囲で変更・改良を施す
ことは何ら差し支えない。
Hereinafter, the present invention will be described in detail with reference to the drawings. It should be noted that the present invention is not limited to the following examples, and changes and improvements may be made without departing from the gist of the present invention.

【0009】図1は本発明の高周波半導体装置の実施の
形態の一例を示す、一部を透視した分解斜視図であり、
図2は図1におけるA−A’断面図である。
FIG. 1 is an exploded perspective view showing a part of a high-frequency semiconductor device according to an embodiment of the present invention.
FIG. 2 is a sectional view taken along line AA ′ in FIG.

【0010】これらの図において、11は金属から成る基
板、11aは基板11の上面に設けられた高周波用半導体素
子13の搭載部、12は基板11上に搭載部11aを取り囲むよ
うに接合された金属から成る枠体であり、これら基板11
と枠体12により金属から成る筐体を構成している。13は
線路導体14を有する高周波用半導体素子であり、ここで
は半導体回路基板13aの下面に接地導体(図示せず)
が、上面に線路導体14が形成されたものを示している。
In these figures, 11 is a substrate made of metal, 11a is a mounting portion of the high frequency semiconductor element 13 provided on the upper surface of the substrate 11, and 12 is bonded on the substrate 11 so as to surround the mounting portion 11a. It is a frame made of metal.
The frame 12 constitutes a housing made of metal. Reference numeral 13 denotes a high-frequency semiconductor element having a line conductor 14, and here, a ground conductor (not shown) is provided on the lower surface of the semiconductor circuit board 13a.
Shows the case where the line conductor 14 is formed on the upper surface.

【0011】15は枠体12の側壁に形成した切り欠き12a
に嵌合され、枠体12を貫通して設けられた高周波入出力
部であり、例えば誘電体基板16と誘電体基板16上面に形
成された線路導体17および誘電体基板16の上面に線路導
体17の一部を挟持して接合されている誘電体壁部材18か
ら成る。そして、この高周波入出力部15の線路導体17と
高周波用半導体素子13の線路導体14とが、金ワイヤ等の
ボンディングワイヤ19を介して電気的に接続される。
Reference numeral 15 denotes a notch 12a formed on the side wall of the frame 12.
And a high-frequency input / output unit provided through the frame 12, for example, a dielectric substrate 16 and a line conductor 17 formed on the upper surface of the dielectric substrate 16 and a line conductor on the upper surface of the dielectric substrate 16. It comprises a dielectric wall member 18 sandwiching and joining a part of 17. Then, the line conductor 17 of the high-frequency input / output unit 15 and the line conductor 14 of the high-frequency semiconductor element 13 are electrically connected via a bonding wire 19 such as a gold wire.

【0012】20は枠体12の上面に接合された蓋体であ
り、高周波用半導体素子13は基板11上の搭載部11aに搭
載されて基板11と枠体12と蓋体20とから成る容器内部に
気密に収容されて、高周波半導体装置が構成されること
となる。
Reference numeral 20 denotes a lid joined to the upper surface of the frame 12, and the high-frequency semiconductor element 13 is mounted on a mounting portion 11a on the substrate 11, and includes a container comprising the substrate 11, the frame 12, and the lid 20. The high-frequency semiconductor device is housed in an airtight manner inside.

【0013】蓋体20において、21は蓋体20の母材となる
誘電体板、22は誘電体板21の上面にそのほぼ全面を覆う
ように形成された上面接地導体、23は誘電体板21の下面
に形成された下面接地導体である。この下面接地導体23
は、高周波用半導体素子13の線路導体14と対向する部位
24を除いて形成されている。そして、25は誘電体板21の
内部にこれを貫通して形成され、上面接地導体22と下面
接地導体23とを導通させるビア導体等の貫通導体であ
る。この貫通導体25は通常は上面接地導体22と下面接地
導体23とを高周波的に良好な接地状態とするために複数
配設され、下面接地導体18が誘電体板21の下面に高周波
用半導体素子13の線路導体14と対向する部位24を除いて
形成されて分割されている場合には、各下面接地導体23
が上面接地導体22と導通するように配設される。
In the lid 20, reference numeral 21 denotes a dielectric plate serving as a base material of the lid 20, reference numeral 22 denotes an upper surface grounding conductor formed on the upper surface of the dielectric plate 21 so as to cover almost the entire surface thereof, and reference numeral 23 denotes a dielectric plate. 21 is a lower surface ground conductor formed on the lower surface of 21. This bottom conductor 23
Is the part of the high-frequency semiconductor element 13 facing the line conductor 14
Except for 24. Numeral 25 denotes a through conductor such as a via conductor which is formed inside the dielectric plate 21 so as to penetrate the dielectric plate 21 and conducts the upper ground conductor 22 and the lower ground conductor 23. Usually, a plurality of through conductors 25 are provided in order to bring the upper ground conductor 22 and the lower ground conductor 23 into a good ground condition in terms of high frequency, and the lower ground conductor 18 is provided on the lower surface of the dielectric plate 21 by a high frequency semiconductor element. 13 is formed excluding the part 24 facing the line conductor 14, and each lower surface ground conductor 23
Are provided so as to conduct with the upper surface ground conductor 22.

【0014】このような本発明の高周波半導体装置によ
れば、蓋体20の下面においてはこれと対向する高周波用
半導体素子13の線路導体14の直上部である上記部位24付
近を除く範囲に下面接地導体23が形成されていることか
ら、線路導体14の上部に蓋体20により配置される接地導
体としては、蓋体20の上面に形成されている上面接地導
体22における線路導体14の直上部が線路導体14と対向し
てその役割を果たすことになる。このとき線路導体14と
上面接地導体22との間の電気的な距離は、その経路の途
中に蓋体20の母材である誘電体板21を経由するために、
従来のように金属製蓋体により封止した場合と比較し
て、同一の筐体壁(枠体12)高さの場合に、線路導体14
とその接地導体(上面接地導体22)との間の電気的な距
離が大きくなることに相当する。これにより高周波用半
導体素子13の高周波信号に対する電磁界条件を線路導体
14の上部を開放している状態に近づけるようにできるこ
とから、基板11と枠体12とから成る筐体内部に実装した
高周波用半導体素子13における線路導体14の伝送特性
も、実装前に線路導体14上部を開放している状態で評価
した特性に近づけることが可能となる。
According to such a high-frequency semiconductor device of the present invention, the lower surface of the lid 20 is located in a range excluding the vicinity of the portion 24 which is immediately above the line conductor 14 of the high-frequency semiconductor element 13 opposed thereto. Since the grounding conductor 23 is formed, the grounding conductor arranged by the lid 20 above the line conductor 14 includes a portion directly above the line conductor 14 in the upper surface grounding conductor 22 formed on the upper surface of the lid 20. Plays a role in opposition to the line conductor 14. At this time, the electrical distance between the line conductor 14 and the top ground conductor 22 is due to pass through the dielectric plate 21 which is the base material of the lid 20 in the middle of the path.
Compared with the case where the case is sealed with a metal lid as in the conventional case, when the height of the housing wall (frame body 12) is the same,
This corresponds to an increase in the electrical distance between the ground conductor and the ground conductor (the top ground conductor 22). As a result, the electromagnetic field conditions for the high-frequency signal of the high-frequency
Since the upper portion of the line 14 can be made closer to an open state, the transmission characteristics of the line conductor 14 in the high-frequency semiconductor element 13 mounted inside the housing composed of the substrate 11 and the frame 12 also 14 It is possible to approach the characteristics evaluated with the upper part open.

【0015】また、線路導体14に対する上部の接地導体
までの電気的な距離を遠ざけることは、基板11と枠体12
とから成る筐体内部における不要共振もしくは筐体内部
に実装した高周波用半導体素子13の線路導体14における
表面波を発生させやすくすることとなるが、本発明にお
いては、蓋体20下面の線路導体14上部付近(上記部位2
4)以外には下面接地導体23が形成されており、かつこ
の下面接地導体23は蓋体20を貫通する貫通導体25によっ
て上面接地導体22と導通している構造となっていること
から、下面接地導体23によって筐体開口の大部分は遮蔽
しつつ、上記部位24を経て上面接地導体22と線路導体14
との電気的な距離を確保することが可能であるために、
基板11と枠体12とから成る筐体内部における自由空間の
体積の増加を抑制しつつ、線路導体14と上部接地導体22
との接地のために必要な電気的な距離を確保できる構造
となっている。
Further, increasing the electrical distance between the line conductor 14 and the upper grounding conductor requires the substrate 11 and the frame 12
This makes it easier to generate unnecessary resonance inside the housing or the surface wave on the line conductor 14 of the high-frequency semiconductor element 13 mounted inside the housing, but in the present invention, the line conductor on the lower surface of the lid 20 14 Near the top (part 2 above)
In addition to 4), a lower surface ground conductor 23 is formed, and the lower surface ground conductor 23 has a structure in which the lower surface ground conductor 23 is electrically connected to the upper surface ground conductor 22 by a through conductor 25 penetrating the lid 20. While the majority of the housing opening is shielded by the ground conductor 23, the upper surface ground conductor 22 and the line conductor 14
It is possible to secure an electrical distance with
While suppressing an increase in the volume of free space inside the housing composed of the substrate 11 and the frame 12, the line conductor 14 and the upper ground conductor 22
It has a structure that can secure an electrical distance necessary for grounding the device.

【0016】本発明の高周波半導体装置における基板11
および枠体12は金属から成るものとすることが好まし
く、その材料としては、例えば鉄−ニッケル−コバルト
合金等の金属材料が用いられる。なお、これら金属から
成るものに代えて、誘電体材料の母材の表面にメタライ
ズ金属層等の導体被膜を被着させたものを用いてもよ
い。
The substrate 11 in the high-frequency semiconductor device of the present invention
The frame 12 is preferably made of a metal, for example, a metal material such as an iron-nickel-cobalt alloy. It should be noted that instead of those made of these metals, those obtained by applying a conductor coating such as a metallized metal layer on the surface of a base material of a dielectric material may be used.

【0017】高周波用半導体素子13としては、上面に線
路導体14を有するものであれば、上記のように半導体回
路基板13aの上面に線路導体14が形成されたものの他に
も、種々の配線部を有するものを用いることができる。
As the high-frequency semiconductor element 13, as long as it has the line conductor 14 on the upper surface, in addition to the above-described semiconductor circuit board 13a having the line conductor 14 formed on the upper surface, various wiring parts can be used. Can be used.

【0018】蓋体20の母材となる誘電体板21の材料とし
ては、例えばアルミナセラミックス・ムライトセラミッ
クス等のセラミック材料やガラスセラミックス等の無機
系誘電体材料、あるいはPTFE(ポリテトラフルオロ
エチレン)・ガラスエポキシ・ポリイミド等の有機樹脂
系誘電体材料等が用いられる。
As a material of the dielectric plate 21 serving as a base material of the lid 20, for example, a ceramic material such as alumina ceramics and mullite ceramics, an inorganic dielectric material such as glass ceramics, or PTFE (polytetrafluoroethylene). Organic resin-based dielectric materials such as glass epoxy and polyimide are used.

【0019】誘電体板21の厚みは、線路導体14により伝
送される使用高周波信号の周波数や誘電体板21の誘電体
材料の比誘電率に基づき必要とする特性に応じて適宜設
定すればよい。
The thickness of the dielectric plate 21 may be appropriately set according to the required characteristics based on the frequency of the high-frequency signal used by the line conductor 14 and the relative permittivity of the dielectric material of the dielectric plate 21. .

【0020】蓋体20に形成される上面接地導体22および
下面接地導体23は、高周波線路導体用の金属材料、例え
ばCuやMoMn+Ni+Au・W+Ni+Au・Cr
+Cu・Cr+Cu+Ni+Au・Ta2N+NiCr
+Au・Ti+Pd+Au・NiCr+Pd+Au等を
用いて、厚膜印刷法やメタライズ法あるいは各種の薄膜
形成方法やメッキ処理法等により形成される。また、金
属箔等の導電性部材をメタライズ金属層等を介して接合
することにより形成したものでもよい。これら上面接地
導体22および下面接地導体23の厚みは、高周波用の接地
導体として適当な厚みに設定すればよく、例えば薄膜で
あれば5μm程度、厚膜であれば20μm程度に設定され
る。
The upper surface ground conductor 22 and the lower surface ground conductor 23 formed on the lid 20 are made of a metal material for a high-frequency line conductor, for example, Cu, MoMn + Ni + Au.W + Ni + Au.Cr.
+ Cu ・ Cr + Cu + Ni + Au ・ Ta2N + NiCr
+ Au.Ti + Pd + Au.NiCr + Pd + Au or the like, and is formed by a thick film printing method, a metallizing method, various thin film forming methods, a plating method, or the like. Further, a member formed by joining a conductive member such as a metal foil through a metallized metal layer or the like may be used. The thickness of the upper ground conductor 22 and the lower ground conductor 23 may be set to an appropriate thickness as a high-frequency ground conductor. For example, the thickness is set to about 5 μm for a thin film and about 20 μm for a thick film.

【0021】また、誘電体板21内部に配設されて上面接
地導体22と下面接地導体23とを導通する貫通導体25は、
ビア導体やスルーホール導体等を形成し、あるいは棒状
の金属部材等を埋設することなどによって、所望の高周
波的に良好な接地状態が得られるように必要な個所に必
要な数を形成すればよい。例えば、貫通導体25の材料に
ついては、蓋体20の母材の誘電体板21に適用可能なプロ
セスによって形成できるものであれば、各種の導電材料
を用いることができる。また、貫通導体25の断面形状は
円形や矩形等の種々の形状のものを用いることができ、
その大きさも、貫通導体25同士の間隔の条件を満たし得
る大きさであれば特に限定されるものではない。また、
貫通導体25同士の間隔は使用周波数帯における4分の1
波長以下程度とすることが、良好な接地状態とすること
ができる点で望ましい。さらに、貫通導体25の数は、配
設可能な範囲でなるべく多くする方がよい。
Further, a through conductor 25 disposed inside the dielectric plate 21 and conducting between the upper ground conductor 22 and the lower ground conductor 23 includes:
By forming via conductors, through-hole conductors, or the like, or by embedding rod-shaped metal members, it is only necessary to form a necessary number at necessary places so as to obtain a desired high-frequency good grounding state. . For example, as the material of the through conductor 25, various conductive materials can be used as long as they can be formed by a process applicable to the dielectric plate 21 of the base material of the lid 20. Also, the cross-sectional shape of the through conductor 25 can be various shapes such as a circle and a rectangle,
The size is not particularly limited as long as the size can satisfy the condition of the interval between the through conductors 25. Also,
The distance between the through conductors 25 is 1/4 in the operating frequency band
It is desirable that the wavelength be equal to or less than the wavelength because a good grounding state can be obtained. Further, it is better to increase the number of the through conductors 25 as much as possible within the range in which they can be arranged.

【0022】[0022]

【実施例】次に、本発明の高周波半導体装置について具
体例を説明する。
Next, a specific example of the high-frequency semiconductor device of the present invention will be described.

【0023】まず、鉄−ニッケル−コバルト合金から成
る基板および枠体により、筐体の内部の長さ×幅×厚み
が3.0 mm×2.2 mm×0.45mmで厚みが0.5 mmの金
属製の筐体を作製し、この筐体内部の基板上の搭載部に
高周波用半導体素子として長さ×幅×厚みが2.0 mm×
1.2 mm×0.2 mmのアルミナセラミックス(比誘電率
9.6 )基板の上面に長さ×幅×厚みが2.0 mm×0.22m
m×5μmのマイクロストリップ線路の線路導体を形成
して成る特性比較評価用マイクロストリップ線路基板を
ハンダ付けにより搭載実装した。次いで、枠体開口部の
上面に、長さ×幅×厚みが4.0 mm×2.2 mm×0.2 m
mのアルミナセラミックス(比誘電率8.8 )から成る誘
電体板の上面の全面および下面の長手方向の中心線を中
心とした幅0.4 mmの範囲の部位を除く領域に、それぞ
れ厚み約10μmのタングステンメタライズ層に厚み2〜
6μmのNi+Auメッキ層を被着させて成る上面接地
導体および下面接地導体を形成するとともに、誘電体板
を貫通して上面接地導体および下面接地導体を導通させ
るタングステンから成り直径が100 μmのビア導体を、
中心間の間隔を400 μmとし、下面接地導体23の端部か
ら50μmの位置に並ぶようにして形成した構造を有する
蓋体を、AgCuロウにより接合して、本発明の高周波
半導体装置Aを作製した。
First, a metal housing having a length × width × thickness of 3.0 mm × 2.2 mm × 0.45 mm and a thickness of 0.5 mm inside the housing is provided by a substrate and a frame made of an iron-nickel-cobalt alloy. And a length x width x thickness of 2.0 mm x
1.2 mm x 0.2 mm alumina ceramics (relative permittivity
9.6) Length x width x thickness is 2.0 mm x 0.22 m on the top surface of the substrate
A microstrip line substrate for characteristic comparison and evaluation formed by forming a line conductor of a microstrip line of m × 5 μm was mounted by soldering. Next, the length × width × thickness is 4.0 mm × 2.2 mm × 0.2 m on the upper surface of the frame opening.
Metallized tungsten metallization with a thickness of about 10 μm on the whole surface of the upper surface of a dielectric plate made of alumina ceramics having a relative dielectric constant of 8.8 m and a region excluding a region with a width of 0.4 mm centered on the longitudinal center line of the lower surface. Layer thickness 2
A via conductor having a diameter of 100 μm, made of tungsten for forming an upper ground conductor and a lower ground conductor by depositing a 6 μm Ni + Au plating layer and penetrating the dielectric plate to conduct the upper ground conductor and the lower ground conductor. To
A lid having a structure in which the center-to-center spacing is 400 μm and formed so as to be arranged at a position 50 μm from the end of the lower surface ground conductor 23 is joined with AgCu brazing to produce a high-frequency semiconductor device A of the present invention. did.

【0024】また、比較例として、上記と同じ金属製の
筐体および高周波用半導体素子としての特性比較評価用
マイクロストリップ線路基板を用い、この筐体の枠体開
口部の上面に長さ×幅×厚みが4.0 mm×2.2 mm×0.
2 mmの鉄−ニッケル−コバルト合金からなる金属製の
蓋体を同様に接合することにより、従来の高周波半導体
装置Bを作製した。さらに、上記と同じ金属製の筐体お
よび高周波用半導体素子としての特性比較評価用マイク
ロストリップ線路基板を用い、蓋体を接合することなく
筐体の枠体開口部の上面を開放状態とした高周波半導体
装置Cを作製した。
As a comparative example, a case made of the same metal as described above and a microstrip line substrate for characteristic comparison and evaluation as a high-frequency semiconductor element were used. X 4.0 mm x 2.2 mm x 0 thickness.
A conventional high-frequency semiconductor device B was manufactured by similarly joining a metal lid made of a 2 mm iron-nickel-cobalt alloy. Furthermore, using the same metal housing as above and a microstrip line substrate for characteristic comparison and evaluation as a high-frequency semiconductor element, the upper surface of the opening of the frame of the housing is opened without joining the lid. Semiconductor device C was manufactured.

【0025】そして、これら高周波半導体装置A・Bお
よびCについて、それぞれ金属製の筐体内部に実装した
特性比較評価用マイクロストリップ線路基板のマイクロ
ストリップ線路の伝送特性をネットワークアナライザ計
測により評価し、マイクロストリップ線路のインピーダ
ンスおよび伝搬定数を求めた。これらの結果を図3およ
び図4に示す。
For each of these high-frequency semiconductor devices A, B and C, the transmission characteristics of the microstrip line of the microstrip line substrate for comparison and evaluation mounted on the inside of the metal casing were evaluated by a network analyzer measurement. The impedance and propagation constant of the strip line were determined. These results are shown in FIGS.

【0026】図3は各高周波半導体装置A〜Cにおいて
金属製の筐体内部におけるマイクロストリップ線路の周
波数に対する特性インピーダンスZ0 の特性を示す線図
であり、横軸は周波数(単位:GHz)を、縦軸は特性
インピーダンスZ0 値(単位:Ω)を表わし、特性曲線
A〜Cはそれぞれ高周波半導体装置A〜Cにおける周波
数特性を示している。これらより分かるように、本発明
の高周波半導体装置Aにおける特性インピーダンスは、
従来の封止構造を採用した高周波半導体装置Bにおける
特性インピーダンスと比較して、金属製の筐体上部を蓋
体によって接合せず開放状態とした高周波半導体装置C
における特性インピーダンスにより近い値となってお
り、蓋体を接合した封止後の状態においても開放時のイ
ンピーダンス特性により近い値の線路導体のインピーダ
ンス特性を保証できる高周波半導体装置となっている。
FIG. 3 is a diagram showing the characteristic of the characteristic impedance Z 0 with respect to the frequency of the microstrip line inside the metal casing in each of the high-frequency semiconductor devices A to C. The horizontal axis represents the frequency (unit: GHz). The vertical axis represents the characteristic impedance Z 0 value (unit: Ω), and the characteristic curves A to C show the frequency characteristics of the high-frequency semiconductor devices A to C, respectively. As can be seen, the characteristic impedance of the high-frequency semiconductor device A of the present invention is:
Compared with the characteristic impedance of the conventional high-frequency semiconductor device B employing the sealing structure, the high-frequency semiconductor device C in which the upper portion of the metal housing is opened without being joined by the lid.
The impedance of the line conductor has a value closer to the characteristic impedance of the line conductor even in the state after the lid is joined and sealed after sealing.

【0027】また、図4は各高周波半導体装置A〜Cに
おいて金属製の筐体内部におけるマイクロストリップ線
路の周波数に対する伝搬定数βの特性を示す線図であ
り、横軸は周波数(単位:GHz)を、縦軸は伝搬定数
β(単位:rad/m)を表わし,特性曲線A〜Cはそ
れぞれ高周波半導体装置A〜Cにおける周波数特性を示
している。これらより分かるように、伝搬定数は高周波
半導体装置AとCにおいて差はなく、本発明の高周波半
導体装置Aによれば高周波用半導体素子の線路導体の電
気長は蓋体を封止した後も保証されていることが確認で
きた。
FIG. 4 is a diagram showing the characteristics of the propagation constant β with respect to the frequency of the microstrip line inside the metal casing in each of the high-frequency semiconductor devices A to C. The horizontal axis represents the frequency (unit: GHz). The vertical axis represents the propagation constant β (unit: rad / m), and the characteristic curves A to C show the frequency characteristics of the high-frequency semiconductor devices A to C, respectively. As can be seen, the propagation constant is not different between the high-frequency semiconductor devices A and C, and according to the high-frequency semiconductor device A of the present invention, the electrical length of the line conductor of the high-frequency semiconductor element is guaranteed even after the lid is sealed. It was confirmed that it was done.

【0028】以上の結果により、本発明の高周波半導体
装置は、蓋体として誘電体板の上面に上面接地導体が、
下面に高周波用半導体素子の線路導体と対向する部位を
除いて下面接地導体が形成されるとともに、内部に上面
接地導体と下面接地導体とを導通させる貫通導体が配設
されているものを用いて高周波用半導体素子を封止した
ことにより、不要共振もしくは表面波の発生を抑制しつ
つ、かつ筐体内部の体積増加を抑えつつ線路導体上部の
接地導体までの距離を大きくとることができるために、
封止後の状態として従来のように高周波用半導体素子上
面の配線部における線路導体と蓋体との距離が筐体の内
部空間における不要共振を抑制するために極力低く設計
される筐体壁(枠体)の高さ程度となるが、従来の金属
製蓋体のように線路導体と上部接地導体の距離が近接す
ることにより上部空間が開放されている状態と封止後の
状態において線路導体のインピーダンスが異なってしま
う場合と比較して、線路導体とこれに対向する上面接地
導体との電気的な距離を大きくして封止状態における線
路導体のインピーダンス特性を改善することが可能とな
り、封止後においても良好な線路導体のインピーダンス
特性を有する高周波半導体装置となることが確認でき
た。
From the above results, in the high-frequency semiconductor device of the present invention, the upper surface grounding conductor is formed on the upper surface of the dielectric plate as the cover.
A lower surface ground conductor is formed on the lower surface except for a portion facing the line conductor of the high-frequency semiconductor element, and a through conductor that conducts between the upper surface ground conductor and the lower surface ground conductor is provided inside. By sealing the high-frequency semiconductor element, it is possible to increase the distance to the ground conductor above the line conductor while suppressing the generation of unnecessary resonance or surface waves and suppressing the increase in volume inside the housing. ,
As the state after the sealing, the distance between the line conductor and the lid in the wiring portion on the upper surface of the high-frequency semiconductor element as in the conventional case is designed to be as small as possible to suppress unnecessary resonance in the internal space of the case. Frame conductor), but the line conductor in the state where the upper space is open due to the short distance between the line conductor and the upper ground conductor as in the case of the conventional metal lid, and in the state after sealing. Compared to the case where the impedance of the line conductor differs, it is possible to improve the impedance characteristic of the line conductor in the sealed state by increasing the electrical distance between the line conductor and the upper surface ground conductor opposed thereto. It was confirmed that the high-frequency semiconductor device having good line conductor impedance characteristics even after stopping was obtained.

【0029】なお、以上はあくまで本発明の実施の形態
の例示であって、本発明はこれらに限定されるものでは
なく、本発明の要旨を逸脱しない範囲で種々の変更や改
良を加えることは何ら差し支えない。
It should be noted that the above is only an example of the embodiment of the present invention, and the present invention is not limited to the embodiment. Various modifications and improvements may be made without departing from the gist of the present invention. No problem.

【0030】[0030]

【発明の効果】本発明の高周波半導体装置によれば、上
面に高周波用半導体素子の搭載部を有する基板と、この
搭載部上に搭載された、線路導体を有する高周波用半導
体素子と、前記基板上に前記搭載部を取り囲むように接
合された枠体と、この枠体を貫通して設けられた高周波
入出力部と、前記枠体の上面に接合された蓋体とを具備
して成り、この蓋体は、誘電体板の上面に上面接地導体
が、下面に前記高周波用半導体素子の前記線路導体と対
向する部位を除いて下面接地導体が形成されるととも
に、内部に前記上面接地導体と前記下面接地導体とを導
通させる貫通導体が配設されているものとしたことか
ら、封止後の状態として、高周波用半導体素子の配線部
における線路導体と蓋体との距離が筐体の内部空間にお
ける不要共振を抑制するために極力低く設計される筐体
壁(枠体)の高さ程度となるが、従来の金属製蓋体を用
いたときのように線路導体と上部の接地導体の距離が近
接することとなって上部空間が開放されている状態と封
止後の状態において線路導体のインピーダンスが異なっ
てしまうことがなくなって、筐体内部の体積増加を抑え
つつ線路導体上部のこれに対向する上面接地導体までの
電気的な距離を大きくとることができるために、封止状
態における高周波用半導体素子の線路導体のインピーダ
ンス特性を改善することができ、封止状態における線路
導体のインピーダンス特性の良好な高周波半導体装置と
なる。
According to the high-frequency semiconductor device of the present invention, a substrate having a mounting portion for a high-frequency semiconductor element on an upper surface, a high-frequency semiconductor element having a line conductor mounted on the mounting portion, and the substrate A frame joined to surround the mounting portion, a high-frequency input / output section provided through the frame, and a lid joined to the upper surface of the frame, In this lid, an upper surface ground conductor is formed on an upper surface of a dielectric plate, and a lower surface ground conductor is formed on a lower surface except for a portion opposed to the line conductor of the high-frequency semiconductor element. Since the through conductor for conducting the lower surface grounding conductor is provided, the distance between the line conductor and the lid in the wiring portion of the high-frequency semiconductor element is determined by the distance inside the housing as a state after sealing. Suppress unwanted resonance in space Therefore, the height of the housing wall (frame) is designed to be as low as possible, but the distance between the line conductor and the upper ground conductor is close as when using a conventional metal lid. The impedance of the line conductor does not differ between the state where the upper space is open and the state after sealing, and the upper surface conductor at the upper part of the line conductor facing this while suppressing the increase in volume inside the housing Since the electrical distance of the line conductor can be increased, the impedance characteristics of the line conductor of the high-frequency semiconductor element in the sealed state can be improved, and the high-frequency semiconductor device having good impedance characteristics of the line conductor in the sealed state Becomes

【0031】以上により、本発明によれば、封止状態に
おける高周波用半導体素子の線路導体のインピーダンス
特性を改善して、封止状態と上部空間が開放された状態
との高周波特性の差異を低減することができる高周波半
導体装置を提供することができた。
As described above, according to the present invention, the impedance characteristics of the line conductor of the high-frequency semiconductor element in the sealed state are improved, and the difference in the high-frequency characteristics between the sealed state and the state in which the upper space is opened is reduced. A high-frequency semiconductor device capable of performing the above-mentioned steps can be provided.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の高周波半導体装置の実施の形態の一例
を示す、一部を透視した分解斜視図である。
FIG. 1 is an exploded perspective view showing a part of a high-frequency semiconductor device according to an embodiment of the present invention, and is partially transparent.

【図2】図1におけるA−A’線断面図である。FIG. 2 is a sectional view taken along line A-A 'in FIG.

【図3】高周波半導体装置において金属製の筐体内部に
おけるマイクロストリップ線路の周波数に対する特性イ
ンピーダンスZ0 の特性を示す線図である。
FIG. 3 is a diagram illustrating characteristics of a characteristic impedance Z 0 with respect to a frequency of a microstrip line in a metal housing in a high-frequency semiconductor device.

【図4】高周波半導体装置において金属製の筐体内部に
おけるマイクロストリップ線路の周波数に対する伝搬定
数βの特性を示す線図である。
FIG. 4 is a diagram showing characteristics of a propagation constant β with respect to a frequency of a microstrip line in a metal housing in a high-frequency semiconductor device.

【図5】従来の高周波半導体装置の例を示す分解斜視図
である。
FIG. 5 is an exploded perspective view showing an example of a conventional high-frequency semiconductor device.

【符号の説明】[Explanation of symbols]

11・・・・・基板 11a・・・・搭載部 12・・・・・枠体 13・・・・・高周波用半導体素子 14・・・・・線路導体 15・・・・・高周波入出力部 20・・・・・蓋体 21・・・・・誘電体板 22・・・・・上面接地導体 23・・・・・下面接地導体 24・・・・・高周波用半導体素子13の線路導体14と対向
する部位 25・・・・・貫通導体
11 ···· Substrate 11a ···· Mounting section 12 ····· Frame 13 ············································ High-frequency input / output section 20: lid 21: dielectric plate 22: top ground conductor 23: bottom ground conductor 24: line conductor 14 of high frequency semiconductor element 13 25 ・ ・ ・ ・ ・ The through conductor

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 上面に高周波用半導体素子の搭載部を有
する基板と、該搭載部上に搭載された、線路導体を有す
る高周波用半導体素子と、前記基板上に前記搭載部を取
り囲むように接合された枠体と、該枠体を貫通して設け
られた高周波入出力部と、前記枠体の上面に接合された
蓋体とを具備して成り、該蓋体は、誘電体板の上面に上
面接地導体が、下面に前記高周波用半導体素子の前記線
路導体と対向する部位を除いて下面接地導体が形成され
るとともに、内部に前記上面接地導体と前記下面接地導
体とを導通させる貫通導体が配設されていることを特徴
とする高周波半導体装置。
1. A substrate having a mounting portion for a high-frequency semiconductor element on an upper surface, a high-frequency semiconductor element having a line conductor mounted on the mounting portion, and joined to the substrate so as to surround the mounting portion. Frame, a high-frequency input / output unit provided through the frame, and a lid joined to the upper surface of the frame, wherein the lid is an upper surface of the dielectric plate. And a through conductor for conducting the upper ground conductor and the lower ground conductor therein, except that a lower ground conductor is formed on a lower surface of the high frequency semiconductor element except for a portion facing the line conductor. A high-frequency semiconductor device, wherein:
JP27506499A 1999-09-28 1999-09-28 High frequency semiconductor device Expired - Fee Related JP4363717B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27506499A JP4363717B2 (en) 1999-09-28 1999-09-28 High frequency semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27506499A JP4363717B2 (en) 1999-09-28 1999-09-28 High frequency semiconductor device

Publications (2)

Publication Number Publication Date
JP2001102471A true JP2001102471A (en) 2001-04-13
JP4363717B2 JP4363717B2 (en) 2009-11-11

Family

ID=17550347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27506499A Expired - Fee Related JP4363717B2 (en) 1999-09-28 1999-09-28 High frequency semiconductor device

Country Status (1)

Country Link
JP (1) JP4363717B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015023194A (en) * 2013-07-19 2015-02-02 株式会社東芝 Semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8204079B2 (en) 2002-10-28 2012-06-19 Qualcomm Incorporated Joint transmission of multiple multimedia streams

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015023194A (en) * 2013-07-19 2015-02-02 株式会社東芝 Semiconductor device

Also Published As

Publication number Publication date
JP4363717B2 (en) 2009-11-11

Similar Documents

Publication Publication Date Title
EP0503200B1 (en) Package for microwave integrated circuit
JP2008244289A (en) Electromagnetic shielding structure
JPH11214556A (en) High frequency input and output terminal, and package for high frequency semiconductor element
US6936921B2 (en) High-frequency package
JPS61114562A (en) Chip carrier for microwave
JP3439969B2 (en) High frequency input / output terminal and high frequency semiconductor element storage package
JP3217677B2 (en) High frequency semiconductor device
JP4903738B2 (en) Electronic component storage package and electronic device
JP2003152124A (en) High frequency package
JP4363717B2 (en) High frequency semiconductor device
JPH1117063A (en) Circuit board for mounting semiconductor chip, package for accommodating semiconductor chip, and semiconductor device
JPH07307605A (en) Composite high frequency circuit module
JP3618046B2 (en) High frequency circuit package
JP3462062B2 (en) Connection structure of high-frequency transmission line and wiring board
JPH11204690A (en) Surface mounting package and semiconductor device
JP2002190541A (en) Package for high-frequency circuit
JP3725983B2 (en) High frequency circuit package
JP2021027118A (en) Semiconductor device
JP2000183488A (en) Hybrid module
JP3720726B2 (en) Semiconductor element storage package and semiconductor device
JP3181036B2 (en) Mounting structure of high frequency package
JP3690656B2 (en) Semiconductor element storage package and semiconductor device
JP3692204B2 (en) Transmission line structure
JP3987659B2 (en) High frequency semiconductor device
JPH11339898A (en) High frequency input and output terminal, and package for high frequency circuit

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060912

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20080723

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20090512

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20090630

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20090721

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20090818

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120828

Year of fee payment: 3

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130828

Year of fee payment: 4

LAPS Cancellation because of no payment of annual fees