JP2001094211A - Semiconductor light-emitting element and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To carry out a bonding work partially on a semiconductor light- emitting element having an inverted mesa ridge structure, except the narrow top section of the ridge at the time of mounting the element. SOLUTION: After an insulating film 22 is formed, AuGe/Ni/Au electrodes 23 are formed on the bottoms of grooves and current injecting windows on both sides of an inverted mesa ridge, and semiconductor layers on the sides of the grooves opposite to the windows, and gold 25 is deposited only on the electrodes 23 on the bottoms of the grooves by a selective gold electroplating method so that the gold 25 reaches the tops of the grooves, and after the gold 25 is electrically conducted to the electrodes 23 on the semiconductor layers on the opposite sides of the grooves, the gold 25 is successively deposited to form a flat metallic layer.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor light emitting device and a method for manufacturing the same, and more particularly, to a semiconductor light emitting device having an inverted mesa ridge portion and a method for manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, in a ridge-type semiconductor laser device, there has been a problem that an active layer present under a ridge portion and a ridge portion is damaged at the time of mounting or the like, thereby deteriorating characteristics and reliability. To solve this problem, U.S. Pat. No. 5,305,340 discloses a method of providing a wall higher than the ridge on both sides of the ridge to protect the ridge. However, in this method, when the ridge has an inverted mesa shape, electrical conduction cannot be easily achieved because the width of the current injection portion at the top of the inverted mesa ridge is as narrow as 2 to 10 μm. Further, when this narrow current injection portion is mounted by using a solder or the like in a junction-up system, it is difficult to establish conduction by a commonly used gold wire having a diameter of, for example, 25 μm. In addition, it becomes impossible to use the ball bonding device combined with thermo-ultrasonic wave and the wedge bonding device as the bonding device. Even if bonding could be performed at the top of this narrow ridge, an active region exists directly underneath, and crystal defects occur due to shock or distortion during bonding, which reduces the reliability over time of the device, The properties may be degraded. For example, an increase in oscillation threshold current, a decrease in luminous efficiency, a decrease in reliability over time, and the like occur.

In the case of the inverted mesa ridge shape, the side wall is inclined at an acute angle with respect to the substrate, and even if a metal is applied by a general process for forming an electrode, such as a vapor deposition method or a sputtering method, the side wall portion is hardly formed. Since no deposition occurs, electrical conduction cannot be easily obtained from the top of the ridge to the bottom on both sides of the ridge and other portions.

[0004] In the above-mentioned US Patent, before gold is deposited by plating or the like, a metal such as gold is simultaneously applied to the narrow current injection portion at the top of the ridge and the bottom of the groove on both sides of the ridge. It is described that a metal that is higher than the ridge height is formed on a part of the bottom of the groove.

However, in the above method, the shape of the ridge is
It is possible if the vertical shape can be made by a forward mesa shape or a device at the time of making the electrode.However, for the above-mentioned reason, in the reverse mesa shape, a metal that connects between the top and the bottom is created. It is very difficult.

Further, when mounting is performed by a junction-down method, there is no problem of conduction because the reverse mesa side is bonded to a heat sink by soldering or the like, but there is irregularity in the grooves on both sides of the reverse mesa portion. When the solder enters, the heat generated in the light emitting region is unevenly radiated, so that the refractive index becomes uneven in the oscillation region, and the linearity of the current-light output characteristics is deteriorated. Is more likely to occur at lower light output values than in the case of uniform junction up.

Further, since the very small ridge top is bonded with solder, the distortion generated when the solder solidifies is concentrated on the top of the ridge, which may reduce the reliability of the device.

On the other hand, Japanese Patent Application Laid-Open No. H10-144990 describes a method of forming an electrode after flattening the surface with an inverted mesa ridge structure. Here, etching grooves for forming ridges on both sides of the ridge-loaded optical waveguide are provided,
It has been proposed that only the etching groove is filled with a substance other than the semiconductor to make it flat. However, in this method, after filling the etching groove with a substance other than a semiconductor, in order to obtain contact with the electrode region on the top of the ridge, it is essential to perform so-called window opening, which requires a difficult process. .

Further, when the both sides of the ridge portion are buried and flattened with an organic material such as polyimide which has a lower heat dissipation property than metal, the heat dissipation property in the active region is reduced and the light output value at which kink is generated is reduced. Occurs. As a result, it is difficult to obtain a high output in the single transverse mode.

[0010]

SUMMARY OF THE INVENTION In view of the above circumstances, it is an object of the present invention to provide a semiconductor light emitting device having an inverted mesa type ridge portion which can be mounted without damaging the inverted mesa type ridge portion and an active layer thereunder. An object of the present invention is to provide a highly reliable semiconductor light emitting device having a structure and a method for manufacturing the same.

[0011]

According to the semiconductor light emitting device of the present invention, an inverted mesa-type ridge is formed in a stripe shape on a semiconductor layer having an active layer on a substrate, and the ridge is formed along the ridge. A groove is formed on both sides of the ridge portion, and a window for injecting carriers into the active layer is formed on the ridge portion so as to cover the exposed surface of the semiconductor layer having the ridge portion and the groove. In a semiconductor light emitting device having an insulating film provided therein, at least one of the grooves is filled with a metal, and the metal extends from the window to the semiconductor layer on the opposite side with the groove interposed therebetween. It is characterized in that a layer is formed.

Here, the metal may be gold.

According to the method of manufacturing a semiconductor light emitting device of the present invention, a semiconductor layer including an active layer is formed on a substrate, and two grooves are formed in the semiconductor layer in a stripe shape. Forming an insulating film on the exposed surface of the semiconductor layer on which the groove and the ridge are formed, and injecting carriers into the active layer on the ridge of the insulating film. Forming a window, filling at least one of the grooves with a metal, and subsequently forming a metal layer with the metal from the window to the semiconductor layer on the opposite side of the groove across the groove. It is.

A first metal layer is formed on at least one bottom surface of the groove, on the window, and on the semiconductor layer opposite to the window with the groove interposed therebetween, and selectively forms the first metal layer only on the first metal layer. By forming the bimetal layer, the groove may be filled, and the metal layer may be formed from above the window to above the semiconductor layer on the opposite side with the groove interposed therebetween.

The uppermost layer of the first metal layer is gold, and gold is deposited only on the first metal layer formed on the bottom surface of the groove by the electrolytic gold selective plating method, and gold is buried up to the top of the groove. ,
After the gold buried up to the upper portion is electrically connected to the first metal layer formed on the semiconductor layer on the window and on the side opposite to the window with the groove interposed therebetween, the gold on the window and the groove are successively formed by electrolytic gold selective plating. Depositing gold on the first metal layer formed on the semiconductor layer on the side opposite to the window across the window, forming a metal layer from above the window to above the semiconductor layer on the opposite side across the groove. May be used.

[0016]

According to the semiconductor light emitting device of the present invention, a flat metal layer can be formed on the semiconductor layer by filling the grooves on both sides of the inverted mesa ridge with metal, so that bonding can be performed. In this case, the distortion can be prevented from being transmitted to the active layer, and the reliability can be improved. In particular, when mounting is performed by a junction-up method in which bonding is performed on the surface on which the ridge is formed, bonding can be performed on a semiconductor layer other than on the ridge, that is, on a semiconductor layer other than the light emitting region. There is an advantage that the active layer is not damaged and the characteristics do not deteriorate.

According to the semiconductor light emitting device of the present invention,
Since bonding can be performed on a semiconductor layer other than on the ridge portion, mounting by a junction-up method becomes easy.

Further, in order to suppress the temperature rise of the semiconductor element, there is a case where mounting is performed by a method called junction down in which the surface on which the ridge portion is formed is bonded to a heat sink or the like using solder. If the grooves on both sides of the ridge portion are open, the solder may enter the portion unevenly, resulting in poor heat radiation in the ridge stripe direction. Also, when the solder solidifies, the ridge portion receives uneven stress. As a result, there is a problem that the optical output value at which kink is generated is reduced, and the reliability over time of the device is reduced due to the introduction of defects into the semiconductor crystal due to strain. However, according to the semiconductor light emitting device of the present invention, the grooves on both sides of the ridge portion are uniformly buried with a metal such as gold, so that heat is sufficiently released and crystal defects due to distortion do not occur. The generated light output value is high,
Further, good temporal reliability is obtained. On the other hand, heretofore, when an inverted mesa ridge portion is provided, it has been difficult to form a metal layer electrically conductive with the ridge portion on the semiconductor layer other than the ridge portion due to its shape. However, according to the method for manufacturing a semiconductor light emitting device of the present invention, the grooves on both sides of the inverted mesa ridge portion are first buried with metal, and then the metal layer is formed on the semiconductor layer. Since it is possible to bury the inside of the groove without any gap, which is difficult with the method described above, it is possible to obtain good light output characteristics and high reliability without generating the above-described heat radiation failure and crystal defects. .

In particular, a first metal layer having gold as an uppermost layer is formed on the bottom of the groove, on the current injection window, and on the semiconductor layer on the opposite side, and first, electrolytic gold is selected only on the first metal layer on the bottom of the groove. By depositing gold by the plating method, the inside of the groove can be easily buried, and by subsequently using the electrolytic gold selective plating method, it is possible to form a metal layer up to the above-mentioned window and the semiconductor layer on the opposite side thereof. It is possible.

[0020]

Embodiments of the present invention will be described below in detail with reference to the drawings.

A method for manufacturing a semiconductor laser device according to the first embodiment of the present invention will be described.

FIG. 1 is a sectional view of the semiconductor laser device in the laminating direction.

As shown in FIG. 1, an n-type GaAs substrate 11
An n-GaAs buffer layer 12 having a thickness of, for example, about 200 to 600 nm is formed by a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy (MBE) method.
(Carrier concentration: 7 to 20 × 10 ¹⁷ cm ⁻³ ), n-type In _0.484 Ga _0.516 P clad layer 13 (carrier concentration: 5 to 10 ¹⁷ cm ⁻³ ) having a thickness of, for example, 2 μm, and a thickness of, for example, 45 nm
Of _{In 1-x Ga x As 1} -y P y barrier layer 14 (x = 0.788, y
= 0.43, undoped), In _{0.16 with} a thickness of, for example, 9 nm
Ga _0.84 As active layer 15 (non-doped) having a thickness of, for example, 4
5nm of _{In 1-x Ga x As 1} -y P y barrier layer 16 (x = 0.78
8, y = 0.43, undoped), for example, 400 nm in thickness
Of p-type In _0.484 Ga _0.516 P cladding layer 17 (carrier concentration 5~20 × 10 ¹⁷ cm ^-3), a thickness of, for example 4~10n
m _- type p-type In _1-x Ga _x As _1-y P _y etching stop layer 18 (x = 0.788, y = 0.43, carrier concentration 5-15
× 10 ¹⁷ cm ⁻³ ) and a p-type In having a thickness of, for example, 1.6 μm.
_0.484 Ga _0.516 P clad layer 19 (carrier concentration 5-20
× 10 ¹⁷ cm ⁻³ ) and a p-type GaAs contact layer 20 (carrier concentration 5 to ³ ) having a thickness of, for example, about 150 to 500 nm.
0 × 10 ¹⁸ cm ⁻³ ) are sequentially laminated.

Next, a process for forming a semiconductor laser device will be described with reference to FIG. As shown in FIG. 2A, the sample after crystal growth is subjected to a normal photolithography process.
A resist pattern 21 for ridge etching is formed. At this time, when the crystal surface is the (100) plane, the ridge stripe is formed in a direction perpendicular to the (011) plane in order to obtain an inverted mesa-shaped ridge.

Next, as shown in FIG. 2B, the p-type GaAs contact layer 20 is removed by etching using, for example, a tartaric acid-based etchant. At this time, the p-type InGaP clad layer 19 existing under the contact layer 20 is hardly etched because tartaric acid has a very low etching rate.

Next, a p-type I
The nGaP cladding layer 19 is etched. At this time, p
Since the etching rate of the InGaAsP type etching stop layer 18 is much lower than that of the p-type InGaP cladding layer 19 with respect to the hydrochloric acid-based etching solution, the desired inverted mesa shape can be easily obtained by etching with an appropriate etching time. Is obtained. After that, the resist pattern 21 is removed.

Next, as shown in FIG. 2C, a dielectric film 22 such as SiO ₂ or Si ₃ N _{4 is} deposited to a thickness of about 100 to 200 nm by a method such as plasma CVD. Thereafter, in order to open a window for electrode contact on the top of the ridge, the resist is patterned by the photolithography process described above. At this time, the width of the bottom portion of the ridge in the normal mesa shape when normal wet etching is used is set to a width defined by the single condition of the lateral mode of the semiconductor laser, for example, 3
Attempting to make it about 4 μm, the width of the top of the ridge is very narrow, for example, 2 μm or less. Alignment becomes difficult. At this time, in the case of the inverted mesa shape, for example, if the height is 3 μm at the bottom of the ridge, 4 μm is
The width becomes as large as about 6 μm, and alignment of the stripe mask for opening a window can be easily performed.

Further, in order to form a normal mesa shape, anisotropic etching is performed by a dry etching technique, for example, reactive ion etching using hydrochloric acid-based gas or reactive ion beam etching. It is possible to process the ridge top and ridge bottom widths to the same extent. However, in this case, in order to accurately control the remaining thickness beside the ridge which defines the single condition of the lateral mode of the semiconductor, it is better to use an etching stop layer and wet etching to form the semiconductor with better in-plane uniformity. Can be.

Next, as shown in FIG. 2D, after the photolithography for opening the electrode contact window is completed, the dielectric film 22 on the top of the ridge is etched by a method such as reactive ion etching using a fluorine-based gas. Remove.

Next, as shown in FIG. 2E, in order to pattern the p-side electrode, a photolithography process is used.
The resist is patterned and, for example, Ti / Pt / Au (each film thickness is, for example, 50 nm / 80 nm / 300 n
In the order of m), vapor deposition is performed by an electron beam vapor deposition method or the like, and patterning is performed by lift-off to form an electrode 23.

Thereafter, as shown in FIG. 2F, a gold layer 25 is deposited on the p-side electrode 23 only by 1 to 5 μm by electrolytic plating. At this time, gold is selectively plated on the p-side electrode 23 on the bottom surface of the groove, deposited up to the top of the groove, combined with the p-side electrode 23 on the side of the groove, and finally the gold film 25 is formed on the p-side electrode 23. It is formed.

Next, in order to make it easy to form a resonator surface by cleavage, the sample is polished to a thickness of about 120 to 150 μm. The n-side electrode 24 is deposited with a thickness of, for example, about 50 nm, 30 nm, and 300 nm in the order of AuGe / Ni / Au by combining an electron beam evaporation method and a resistance heating evaporation method. Thereafter, in order to obtain ohmic contact between the electrodes, the electrodes are reacted at 400 ° C. for about 1 minute.

Next, bar cleavage is performed at predetermined positions, for example, at intervals of 750 μm. One side of the bar-cleaved end face is coated with an oscillation wavelength of 950 nm as follows.

FIG. 3 is a perspective view of a single semiconductor laser device of the present invention. As shown in FIG. 3, Al ₂
An O ₃ film 31 is deposited by a predetermined thickness, for example, by an ECR sputtering method. Further, an Al ₂ O ₃ film 32 is used as a first layer on the opposite end face so that the reflectance for an oscillation wavelength of 950 nm is, for example, 80% or more by using the same method.
The second layer is a Ta ₂ O ₅ film 33, the third layer is a SiO ₂ film 34, the fourth layer is a Ta ₂ O ₅ film 35, the fifth layer is an SiO ₂ film 36, and the sixth layer is Ta _2.
O ₅ film 37 is deposited a dielectric layer multilayer film of SiO ₂ film 38 to a predetermined thickness on the seventh layer. Thereafter, the bar-shaped sample of the semiconductor laser is cleaved at a predetermined position to form a chip.

Next, each chip is subjected to electrical evaluation selection, and the semiconductor laser chip is junction-up, for example, tin, silver, copper, bismuth (Sn / Ag / Cu / B).
i) Solder to a ceramic heat sink whose upper and lower surfaces are metallized using a lead-free solder or the like.

In the semiconductor laser device according to the present invention, electrical conduction is provided by gold plating between the top of the ridge and an adjacent portion across the groove. Since electrical continuity is obtained, wire bonding can be performed on portions other than the ridge. Therefore, since the bonding does not damage the ridge portion and the active layer thereunder, and the bonding strain is not transmitted to the active layer, good light output characteristics and high reliability over time can be obtained.

Further, according to the manufacturing method of the present invention, a flat gold plating layer can be continuously formed from the window at the upper part of the inverted mesa ridge type ridge to the groove by using the electrolytic selective plating method, thereby reducing the number of manufacturing steps. be able to.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a semiconductor laser device constituting a semiconductor laser device according to a first embodiment of the present invention;

FIG. 2 is a diagram showing a manufacturing process of the semiconductor laser device according to the first embodiment of the present invention;

FIG. 3 is a perspective view of a single semiconductor laser device having a dielectric film on an end face according to the first embodiment of the present invention;

[Explanation of symbols]

 11 GaAs substrate 12 n-GaAs layer 13, 17, 19 InGaP lower cladding layer 14, 16 InGaAsP barrier layer 15 InGaAs active layer 18 InGaAsP etching stop layer 20 GaAs contact layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5F041 AA33 AA40 AA43 AA44 CA04 CA05 CA34 CA35 CA39 CA93 CA99 5F073 AA13 AA74 CA13 CB11 CB21 DA30 EA28

Claims (5)

[Claims] An inverted mesa-shaped ridge is formed in a stripe on a semiconductor layer provided with an active layer on a substrate, and grooves are formed on both sides of the ridge along the ridge. A semiconductor light emitting device comprising: an insulating film provided on the ridge portion with a window for injecting carriers into the active layer so as to cover an exposed surface of the semiconductor layer in which the ridge portion and the groove are formed. In the element, at least one of the grooves is filled with a metal, and the metal forms a metal layer from above the window to above the semiconductor layer on the opposite side of the groove with the groove interposed therebetween. Characteristic semiconductor light emitting device. 2. The semiconductor light emitting device according to claim 1, wherein said metal is gold. 3. A semiconductor layer including an active layer is formed on a substrate, and two grooves are formed in the semiconductor layer in a stripe shape.
Forming an inverted mesa-type ridge portion between the two grooves, forming an insulating film on an exposed surface of the semiconductor layer on which the groove and the ridge portion are formed, and forming the active film on the ridge portion of the insulating film; Forming a window for injecting carriers into the layer, filling the inside of at least one of the grooves with a metal, and subsequently, using the metal, a metal layer from the window to the semiconductor layer on the opposite side across the groove from the window; Forming a semiconductor light-emitting device. 4. A first metal layer is formed on the bottom surface of at least one of the grooves, on the window, and on the semiconductor layer opposite to the window with the groove interposed therebetween, and only on the first metal layer. 4. The semiconductor according to claim 3, wherein the groove is buried by forming a second metal layer, and a metal layer is formed from above the window to above the semiconductor layer on the opposite side across the groove. A method for manufacturing a light-emitting element. 5. An uppermost layer of the first metal layer is gold, and gold is deposited only on the first metal layer formed on the bottom surface of the groove by an electrolytic gold selective plating method, and the gold is deposited to an upper portion of the groove. After gold is buried to the upper portion, the gold buried up to the upper portion is electrically connected to the first metal layer formed on the semiconductor layer on the side opposite to the window with the groove interposed therebetween. By selective plating, gold is deposited on the first metal layer formed on the semiconductor layer on the side opposite to the window with the window and the groove interposed therebetween, and the gold is deposited on the window with the groove interposed therebetween. 5. The method according to claim 4, wherein a metal layer is formed up to the opposite side of the semiconductor layer.