JP2001077531A - Manufacture of multilayer board - Google Patents
Manufacture of multilayer boardInfo
- Publication number
- JP2001077531A JP2001077531A JP24695499A JP24695499A JP2001077531A JP 2001077531 A JP2001077531 A JP 2001077531A JP 24695499 A JP24695499 A JP 24695499A JP 24695499 A JP24695499 A JP 24695499A JP 2001077531 A JP2001077531 A JP 2001077531A
- Authority
- JP
- Japan
- Prior art keywords
- film
- bump
- resin film
- wiring
- layer substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明はフレキシブルプリン
ト基板の技術分野にかかり、特に、多層構造のフレキシ
ブルプリント基板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the technical field of flexible printed circuit boards, and more particularly to a flexible printed circuit board having a multilayer structure.
【０００２】[0002]
【従来の技術】近年では、多数の電子回路に多層構造の
フレキシブル基板(以下、多層基板と言う)が用いられて
いる。2. Description of the Related Art In recent years, a flexible substrate having a multilayer structure (hereinafter, referred to as a multilayer substrate) has been used for many electronic circuits.
【０００３】従来技術の多層基板の製造方法を説明する
と、図１０(ａ)を参照し、符号１１１は、厚さ数十μｍ
の銅箔を示している。[0003] Referring to FIG. 10A, a conventional method for manufacturing a multi-layer substrate will be described.
Of copper foil.
【０００４】先ず、この銅箔１１１上にポリイミドワニ
スを塗布し、第１のポリイミド膜１１２を形成する(図
１０(ｂ))。次に、第１のポリイミド膜１１２上にレジ
スト膜１１３を形成し(同図(ｃ))、写真工程を経てレジ
スト膜１１３をパターニングする。図１０(ｄ)の符号１
３１は、レジスト膜１１３の開口部分を示しており、こ
の開口部分１３１の底面には第１のポリイミド膜１１２
が露出している。First, a polyimide varnish is applied on the copper foil 111 to form a first polyimide film 112 (FIG. 10B). Next, a resist film 113 is formed on the first polyimide film 112 (FIG. 3C), and the resist film 113 is patterned through a photographic process. Reference numeral 1 in FIG.
Reference numeral 31 denotes an opening of the resist film 113, and a first polyimide film 112 is formed on the bottom of the opening 131.
Is exposed.
【０００５】次に、エッチング工程により、第１のポリ
イミド膜１１２の、開口部分１３１底面に露出する部分
をエッチング除去する(図１０(ｅ))。次いで、レジスト
膜１１３を除去すると、パターニングされた第１のポリ
イミド膜１１２が得られる(図１０(ｆ))。Next, in an etching step, a portion of the first polyimide film 112 that is exposed at the bottom of the opening 131 is removed by etching (FIG. 10E). Next, when the resist film 113 is removed, a patterned first polyimide film 112 is obtained (FIG. 10F).
【０００６】銅箔１１１及びその表面のパターニングさ
れた第１のポリイミド膜１１２を反転させ(図１１
(ｇ))、マスキングフィルム１１７上にポリイミド膜１
１２を貼付する(図１１(ｈ))。The copper foil 111 and the patterned first polyimide film 112 on the surface thereof are inverted (FIG. 11).
(g)), polyimide film 1 on masking film 117
12 is attached (FIG. 11 (h)).
【０００７】次に、銅箔１１１上にレジスト膜１１５を
形成し(同図(ｉ))、写真工程によってパターニングす
る。図１１(ｊ)の符号１３２はパターニングされたレジ
スト膜１１５の開口部分を示しており、その底面には銅
箔１１１が露出している。Next, a resist film 115 is formed on the copper foil 111 (FIG. 1I), and is patterned by a photographic process. Reference numeral 132 in FIG. 11J indicates an opening portion of the patterned resist film 115, and the copper foil 111 is exposed at the bottom surface thereof.
【０００８】次いで、エッチング工程により、開口部分
１３２底面の銅箔１１１をエッチングし、銅箔１１１を
パターニングすると配線膜１１６が得られる(図１１
(ｋ))。符号１３３は銅箔１１１が除去された部分であ
り、配線膜１１６間の開口部分である。その開口部分１
３３の底面には第１のポリイミド膜１１２表面が露出し
ている。Next, by etching the copper foil 111 on the bottom surface of the opening 132 and patterning the copper foil 111, an interconnect film 116 is obtained.
(k)). Reference numeral 133 denotes a portion where the copper foil 111 has been removed, and an opening portion between the wiring films 116. The opening part 1
The surface of the first polyimide film 112 is exposed at the bottom surface of the substrate 33.
【０００９】レジスト膜１１５を除去し(図１１(ｌ))、
配線膜１１６表面にポリイミドワニスを塗布すると、配
線膜１１６の開口部分１３３内に第２のポリイミド膜１
１８が流れ込み、表面が平坦な第２のポリイミド膜１１
８が形成される。The resist film 115 is removed (FIG. 11 (l)).
When a polyimide varnish is applied to the surface of the wiring film 116, the second polyimide film 1 is placed in the opening 133 of the wiring film 116.
18 flows into the second polyimide film 11 having a flat surface.
8 are formed.
【００１０】第２のポリイミド膜１１８表面にレジスト
膜１１９を形成し(図１２(ｎ))、写真工程によってパタ
ーニングする。図１２(ｏ)の符号１３４は、パターニン
グされたレジスト膜１１９の開口部分を示しており、そ
の底面には第２のポリイミド膜１１８が露出している。A resist film 119 is formed on the surface of the second polyimide film 118 (FIG. 12 (n)), and is patterned by a photographic process. Reference numeral 134 in FIG. 12 (o) indicates an opening portion of the patterned resist film 119, and the second polyimide film 118 is exposed at the bottom thereof.
【００１１】次いで、エッチング工程により、開口部分
１３４底面の第２のポリイミド膜１１８を除去すると第
２のポリイミド膜１１８がパターニングされる。このと
き、配線膜１１６はエッチングされない。Next, when the second polyimide film 118 on the bottom surface of the opening 134 is removed by an etching process, the second polyimide film 118 is patterned. At this time, the wiring film 116 is not etched.
【００１２】最後に、レジスト膜１１９を除去し、熱処
理して第１、第２のポリイミド膜１１２、１１８をイミ
ド化すると、単層基板素片１１０が得られる(図１２
(ｑ))。Finally, the resist film 119 is removed, and heat treatment is performed to imidize the first and second polyimide films 112 and 118, thereby obtaining a single-layer substrate piece 110 (FIG. 12).
(q)).
【００１３】この単層基板素片１１０は、配線膜１１６
と、配線膜１１６の片面に位置するパターニングされた
第１のポリイミド膜１１２と、配線膜１１６の反対側の
面に位置するパターニングされた第２のポリイミド膜１
１８とで構成されている。配線膜１１６の開口部分１３
３内には第２のポリイミド膜１１８が充填されている。The single-layer substrate piece 110 is provided with a wiring film 116.
And a patterned first polyimide film 112 located on one side of the wiring film 116 and a patterned second polyimide film 1 located on the opposite side of the wiring film 116.
18. Opening portion 13 of wiring film 116
3 is filled with a second polyimide film 118.
【００１４】従来の単層基板素片１１０は以上のように
多数の工程を経て作製されている。そして、図１３(ａ)
に示すような、ポリイミド膜１８２上にバンプ１８４が
突き出された単層基板素片１８０に対して、上記工程で
得た単層基板素片１１０を平行に配置し、バンプ１８４
と、第１のポリイミド膜１１２の開口部分１３１とを位
置合わせし、バンプ１８４を配線膜１１６表面に当接さ
せると、配線膜１１６、１８６同士がバンプ１８４で接
続される。このとき、ポリイミド膜１１２、１８２をが
可塑性を有していれば、加熱することで単層基板素片１
１０、１８０同士が接着され、同図(ｂ)の符号１５１で
示すような多層基板が得られる。The conventional single-layer substrate piece 110 is manufactured through a number of steps as described above. Then, FIG.
The single-layer substrate piece 110 obtained in the above process is arranged in parallel with the single-layer substrate piece 180 in which the bump 184 is projected on the polyimide film 182 as shown in FIG.
Is aligned with the opening 131 of the first polyimide film 112 and the bump 184 is brought into contact with the surface of the wiring film 116, so that the wiring films 116 and 186 are connected to each other by the bump 184. At this time, if the polyimide films 112 and 182 have plasticity, the single-layer substrate piece 1 is heated.
10 and 180 are adhered to each other to obtain a multilayer substrate as indicated by reference numeral 151 in FIG.
【００１５】[0015]
【発明が解決しようとする課題】本発明は上記従来技術
の多層基板製造方法が複雑なことに鑑み、これを簡素化
するために創作されたものであり、その目的は、多層基
板の簡単な製造方法、及びその製造方法に用いることが
できる単層基板素片を提供することにある。SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned prior art method of manufacturing a multi-layer substrate which is complicated, and has been created in order to simplify the method. An object of the present invention is to provide a manufacturing method and a single-layer substrate piece that can be used in the manufacturing method.
【００１６】[0016]
【課題を解決するための手段】上記課題を解決するため
に、請求項１記載の発明は、請求項１記載の発明は、金
属薄膜がパターニングされて成る配線膜と、前記配線膜
表面に形成された樹脂フィルムとを有する複数の単層基
板素片の前記配線膜同士をバンプで接続し、多層基板を
形成する多層基板の製造方法であって、２枚の前記単層
基板素片のうち、少なくとも一方の前記単層基板の前記
配線膜に、前記樹脂フィルム上に突き出るように金属の
バンプを形成しておき、前記バンプを他方の単層基板素
片の樹脂フィルム上に当接させ、少なくとも一方の前記
単層基板に超音波を印加し、バンプに当接された前記樹
脂フィルムを突き破り、前記バンプを前記配線膜に接触
させ、前記バンプと前記配線膜とを接続することを特徴
とする。請求項２記載の発明は、請求項１記載の多層基
板の製造方法であって、前記超音波の印加は押圧しなが
ら行うことを特徴とする。請求項３記載の発明は、請求
項１又は請求項２のいずれか１項記載の多層基板の製造
方法であって、前記バンプが当接される前記樹脂フィル
ムは、予め硬化しておくことを特徴とする。請求項４記
載の発明は、請求項１乃至請求項３のいずれか１項記載
の多層基板の製造方法であって、前記多層基板表面の前
記樹脂フィルムに他の単層基板素片のバンプを当接さ
せ、前記多層基板又は当接された単層基板素片のいずれ
か一方に超音波を印加し、前記多層基板の配線膜に単層
基板素片の前記バンプを接続させることを特徴とする。
請求項５記載の発明は、請求項１乃至請求項４のいずれ
か１項記載の多層基板の製造方法であって、前記バンプ
に当接される前記樹脂フィルムの前記配線膜上の厚さ
は、前記バンプの樹脂フィルムから突き出た部分の高さ
よりも薄くされていることを特徴とする。請求項６記載
の発明は、請求項１乃至請求項５のいずれか１項記載の
多層基板の製造方法であって、前記配線膜と前記バンプ
とは銅で構成することを特徴とする。請求項７記載の発
明は、請求項６記載の多層基板の製造方法であって、前
記配線膜又は前記バンプのいずれか一方又は両方に銅以
外の金属の被膜を形成した後、前記超音波で接続するこ
とを特徴とする。請求項８記載の発明は、請求項１乃至
請求項７のいずれか１項記載の多層基板の製造方法であ
って、前記バンプが当接される樹脂フィルムはポリイミ
ド膜であることを特徴とする。請求項９記載の発明は、
請求項１乃至請求項８のいずれか１項記載の多層基板の
製造方法に用いられる単層基板素片であって、第１の樹
脂フィルム上に位置する金属箔をパターニングして前記
配線膜を形成した後、該配線膜上に樹脂フィルムの原料
液が塗布され、硬化されて第２の樹脂フィルムが形成さ
れていることを特徴とする。請求項１０記載の発明は、
多層基板であって、前記単層基板素片の前記第１又は第
２の樹脂フィルム上に、バンプを有する単層基板素片の
前記バンプが当接され、超音波が印加されて前記第１又
は第２の樹脂フィルムが突き破られ、前記バンプが前記
第２の樹脂フィルムの下層の前記金属配線に接続されて
いることを特徴とする。According to a first aspect of the present invention, there is provided a wiring film formed by patterning a metal thin film and a wiring film formed on a surface of the wiring film. A method of manufacturing a multilayer substrate by forming a multilayer substrate by connecting the wiring films of a plurality of single-layer substrate pieces having the same resin film to each other with bumps. A metal bump is formed on the wiring film of at least one of the single-layer substrates so as to protrude onto the resin film, and the bump is brought into contact with the resin film of the other single-layer substrate piece; Applying ultrasonic waves to at least one of the single-layer substrates, breaking through the resin film abutted on bumps, contacting the bumps with the wiring film, and connecting the bumps and the wiring film. I do. According to a second aspect of the present invention, there is provided the method for manufacturing a multilayer substrate according to the first aspect, wherein the application of the ultrasonic waves is performed while pressing. The invention according to claim 3 is the method for manufacturing a multilayer substrate according to any one of claim 1 or claim 2, wherein the resin film to which the bump is brought into contact is cured in advance. Features. The invention according to claim 4 is the method for manufacturing a multilayer substrate according to any one of claims 1 to 3, wherein a bump of another single-layer substrate element is formed on the resin film on the surface of the multilayer substrate. Contacting, applying ultrasonic waves to one of the multilayer substrate or the contacted single layer substrate piece, and connecting the bumps of the single layer substrate piece to the wiring film of the multilayer substrate. I do.
According to a fifth aspect of the present invention, in the method for manufacturing a multilayer substrate according to any one of the first to fourth aspects, the thickness of the resin film contacting the bump on the wiring film is The height of a portion of the bump protruding from the resin film is made thinner. According to a sixth aspect of the present invention, in the method for manufacturing a multilayer substrate according to any one of the first to fifth aspects, the wiring film and the bump are made of copper. The invention according to claim 7 is the method for manufacturing a multilayer substrate according to claim 6, wherein after forming a coating of a metal other than copper on one or both of the wiring film and the bump, the ultrasonic wave is applied. It is characterized by connecting. According to an eighth aspect of the present invention, in the method for manufacturing a multilayer substrate according to any one of the first to seventh aspects, the resin film with which the bump is in contact is a polyimide film. . The invention according to claim 9 is
A single-layer substrate piece used in the method for manufacturing a multilayer substrate according to any one of claims 1 to 8, wherein the wiring film is formed by patterning a metal foil located on a first resin film. After the formation, a raw material liquid for a resin film is applied on the wiring film and cured to form a second resin film. The invention according to claim 10 is
A multilayer substrate, wherein the bumps of the single-layer substrate piece having bumps are brought into contact with the first or second resin film of the single-layer substrate piece, and the first Alternatively, the second resin film is pierced, and the bump is connected to the metal wiring below the second resin film.
【００１７】本発明は上記のように構成されており、バ
ンプを樹脂フィルムに当接させ、押圧しながら超音波を
印加し、バンプによって樹脂フィルムを突き破り、該樹
脂フィルムの下層に位置する配線膜にバンプを当接さ
せ、超音波の力によってバンプをその配線膜に接続させ
るものである。The present invention is configured as described above. The bump is brought into contact with the resin film, ultrasonic waves are applied while being pressed, the resin film is pierced by the bumps, and the wiring film positioned below the resin film is formed. And the bumps are connected to the wiring film by the force of ultrasonic waves.
【００１８】このように、本発明によれば、予め樹脂フ
ィルムを窓開けしなくても、超音波を印加することでバ
ンプに樹脂フィルムを突き破らせているので、樹脂フィ
ルムのパターニング工程を省略することができる。As described above, according to the present invention, the resin film can be broken through the bumps by applying ultrasonic waves without opening the resin film in advance, so that the resin film patterning step is omitted. can do.
【００１９】突き破る対象の樹脂フィルムは予め硬化さ
せておくとよい。ポリイミド膜を用いる場合には、ポリ
イミドワニスを塗布した後、イミド化させておくとよ
い。硬化させたポリイミド膜は、熱硬化性のポリイミド
膜だけではなく、熱可塑性のポリイミド膜も含まれる。The resin film to be pierced is preferably cured in advance. When a polyimide film is used, it is preferable to apply a polyimide varnish and then imidize it. The cured polyimide film includes not only a thermosetting polyimide film but also a thermoplastic polyimide film.
【００２０】バンプ高さ(バンプの樹脂フィルム表面か
らの高さ)は、突き破る対象の樹脂フィルムの配線膜上
の厚さよりも高くしておくと、バンプが確実に配線膜に
当接できるので、接続不良が少なくなる。If the height of the bump (the height of the bump from the surface of the resin film) is higher than the thickness of the resin film to be pierced on the wiring film, the bump can surely contact the wiring film. Connection failures are reduced.
【００２１】超音波接続によって多層基板を構成する場
合に、銅で構成されたバンプの樹脂フィルム表面からの
高さに対し、バンプが突き破るべき樹脂フィルムの配線
膜上の厚さを変化させた。When a multilayer board is formed by ultrasonic connection, the thickness of the resin film on the wiring film of the resin film that the bump should break through is changed with respect to the height of the bump made of copper from the surface of the resin film.
【００２２】樹脂フィルムの厚みと接続部分の抵抗値と
の関係を下記表１に示す。超音波印加の際の圧力はバン
プ１個当たり３〜７ｋｇの荷重をかけた。Table 1 below shows the relationship between the thickness of the resin film and the resistance value of the connection portion. As for the pressure at the time of applying the ultrasonic wave, a load of 3 to 7 kg was applied per bump.
【００２３】[0023]
【表１】 [Table 1]
【００２４】バンプが形成されている配線膜上の樹脂フ
ィルムの厚さは２０μｍ、その樹脂フィルム表面からの
バンプ高さは２０μｍ(バンプの配線膜からの全高は４
０μｍ)、バンプ径は１５０μｍ、バンプが接続される
部分の配線膜は円形にパターニングされており、その直
径は２５０μｍである。The thickness of the resin film on the wiring film on which the bump is formed is 20 μm, and the height of the bump from the surface of the resin film is 20 μm (the total height of the bump from the wiring film is 4 μm).
0 μm), the bump diameter is 150 μm, and the wiring film at the portion to which the bump is connected is patterned in a circular shape, and the diameter is 250 μm.
【００２５】表１中、樹脂フィルム厚みが“０”の場合
は、樹脂フィルムに窓開けをしてバンプを直接配線膜に
当接させた場合である。In Table 1, the case where the thickness of the resin film is "0" is a case where a window is opened in the resin film and the bump is directly in contact with the wiring film.
【００２６】バンプの樹脂フィルム表面からの高さが、
破るべき樹脂フィルムの厚みよりも大きい場合(換言す
ると、樹脂フィルムの配線膜表面上の厚みが、バンプの
樹脂フィルムから突き出た部分の高さよりも薄い場合)
に窓開けした場合と同じ接続抵抗が得られている。The height of the bump from the resin film surface is
When the thickness is larger than the thickness of the resin film to be broken (in other words, when the thickness of the resin film on the wiring film surface is smaller than the height of the portion of the bump protruding from the resin film)
The same connection resistance as when the window is opened is obtained.
【００２７】なお、配線膜とバンプが銅で構成されてい
る場合、そのいずれか一方又は両方に、金被膜や半田被
膜等の金属被膜を予め形成しておくと、超音波によって
バンプと配線膜が確実に接続されるので、接続抵抗が小
さくなり、また、接続不良は一層少なくなる。When the wiring film and the bump are made of copper, a metal film such as a gold film or a solder film is formed in advance on one or both of them. Are securely connected, the connection resistance is reduced, and the connection failure is further reduced.
【００２８】[0028]
【発明の実施の形態】先ず、本発明の単層基板素片の第
一例をその製造方法と共に説明する。図１(ａ)の符号１
１は銅箔であり、この銅箔１１上にポリイミド前駆体か
ら成るポリイミドワニスを塗布し、ポリイミド膜から成
る第１の樹脂フィルム１２を形成する(図１(ｂ))。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a first example of a single-layer substrate piece of the present invention will be described together with a method of manufacturing the same. Reference numeral 1 in FIG.
Reference numeral 1 denotes a copper foil, on which a polyimide varnish made of a polyimide precursor is applied to form a first resin film 12 made of a polyimide film (FIG. 1B).
【００２９】次いで、銅箔１１の反対側の面にレジスト
膜１３を形成し(同図(ｃ))、パターニングする。図１
(ｄ)の符号３１はパターニングされたレジスト膜１３の
開口部分を示している。Next, a resist film 13 is formed on the surface on the opposite side of the copper foil 11 (FIG. 3C), and is patterned. FIG.
Reference numeral 31 in (d) indicates an opening of the patterned resist film 13.
【００３０】次いで、レジスト膜１３をマスクとし、銅
箔１１をエッチングすると、開口部分３１底面に露出し
ている部分の銅箔１１が除去され、パターニングされ
る。銅箔１１をエッチングする際には第１の樹脂フィル
ム１２はエッチングされない。Next, when the copper foil 11 is etched using the resist film 13 as a mask, the portion of the copper foil 11 exposed at the bottom of the opening 31 is removed and patterned. When etching the copper foil 11, the first resin film 12 is not etched.
【００３１】図１(ｅ)の符号１６は銅箔１１のパターニ
ングによって作製された配線膜を示している。Reference numeral 16 in FIG. 1E indicates a wiring film formed by patterning the copper foil 11.
【００３２】レジスト膜１３を除去し(図１(ｆ))、配線
膜１６上に、上記と同じ組成のポリイミドワニスを塗布
すると配線膜１６の開口部分３２内にポリイミドワニス
が流れ込み、配線膜１６の全表面に、平坦なポリイミド
膜から成る第２の樹脂フィルム１７が形成される。When the resist film 13 is removed (FIG. 1F) and a polyimide varnish having the same composition as described above is applied on the wiring film 16, the polyimide varnish flows into the openings 32 of the wiring film 16, and A second resin film 17 made of a flat polyimide film is formed on the entire surface of the substrate.
【００３３】最後に、熱処理し、第１、第２の樹脂フィ
ルム１２、１７をイミド化すると第１、第２の樹脂フィ
ルム１２、１７は硬化され、図１(ｇ)で示す単層配線基
板１０が得られる。Finally, when the first and second resin films 12 and 17 are imidized by heat treatment, the first and second resin films 12 and 17 are cured, and the single-layer wiring board shown in FIG. 10 is obtained.
【００３４】次に、本発明の単層基板素片の他の例を説
明する。図２(ａ)を参照し、先ず銅箔８１を用意し、銅
箔８１の裏面側に保護フィルム８２を貼付し、表面側に
紫外線露光可能なマスクフィルム８３を貼付する。次い
で、フォトリソグラフ工程により、マスクフィルム８３
をパターンニングし、その開口部分９１の底面に銅箔８
１を露出させる(図２(ｃ))。Next, another example of the single-layer substrate piece of the present invention will be described. Referring to FIG. 2A, first, a copper foil 81 is prepared, a protective film 82 is attached to the back surface of the copper foil 81, and a mask film 83 that can be exposed to ultraviolet light is attached to the front surface. Next, the mask film 83 is formed by a photolithographic process.
And copper foil 8 on the bottom of the opening 91.
1 is exposed (FIG. 2 (c)).
【００３５】その状態で全体を銅メッキ液に浸漬し、電
流を流すと、開口部分９１底面に露出した銅箔８１の表
面に銅が成長し、銅から成るバンプ８４が形成される
(図２(ｄ))。In this state, when the whole is immersed in a copper plating solution and an electric current is applied, copper grows on the surface of the copper foil 81 exposed on the bottom surface of the opening portion 91, and a bump 84 made of copper is formed.
(FIG. 2 (d)).
【００３６】次いで、マスクフィルム８３と保護フィル
ム８２を除去すると、図２(ｅ)に示すように、金属箔８
１の片面上にバンプ８４が直立した状態になる。Next, when the mask film 83 and the protective film 82 are removed, as shown in FIG.
The bump 84 is in an upright state on one side of the first.
【００３７】その状態でバンプ８４が形成されている面
とは反対側の面にキャリアフィルム８４を貼付し(図３
(ｆ))、バンプ８４が形成されている側の面にポリイミ
ド前駆体から成るポリイミドワニスを塗布し、ポリイミ
ド層から成る絶縁層８７aを形成する(図３(ｇ))。In this state, a carrier film 84 is attached to the surface opposite to the surface on which the bumps 84 are formed (FIG. 3).
(f)), a polyimide varnish composed of the polyimide precursor was applied to the surface on which the bumps 84 are formed, the insulating layer 87 a made of the polyimide layer (FIG. 3 (g)).
【００３８】次いで、絶縁層８７a上に接着性を有する
ポリイミドワニスを重ねて塗布し、絶縁層８７a上に接
着層８７bを形成すると、２層構造のポリイミドフィル
ムから成る樹脂フィルム８７が得られる(同図(ｈ))。こ
の樹脂フィルム８７は接着性を有している。[0038] Next, superposed a polyimide varnish having adhesiveness is applied on the insulating layer 87 a, to form an adhesive layer 87 b on the insulating layer 87 a, a resin film 87 made of polyimide film having a two-layer structure is obtained ((H) in the figure). This resin film 87 has adhesiveness.
【００３９】また、この樹脂フィルム８７は、銅箔８１
表面では厚く、バンプ８４先端部分では薄くなってお
り、樹脂フィルム８７表面にアルカリ溶液をスプレー噴
霧すると、樹脂フィルム８７表面がエッチングされ、バ
ンプ８４の先端部分が露出する(同図(ｉ))。The resin film 87 is made of a copper foil 81
The surface is thick and the tip of the bump 84 is thin. When an alkali solution is sprayed on the surface of the resin film 87, the surface of the resin film 87 is etched and the tip of the bump 84 is exposed (FIG. 1 (i)).
【００４０】次に、銅箔８１裏面のキャリアフィルム８
４を剥離し(同図(ｊ))、代わりにレジスト膜を形成し、
パターニングする。Next, the carrier film 8 on the back surface of the copper foil 81
4 is peeled off (FIG. 7 (j)), a resist film is formed instead,
Perform patterning.
【００４１】図４(ｋ)に符号８８はパターニングされた
レジスト膜を示しており、その開口部分９１底面には銅
箔８１表面が露出している。In FIG. 4K, reference numeral 88 denotes a patterned resist film, and the surface of the copper foil 81 is exposed at the bottom of the opening 91.
【００４２】その状態で裏面側から開口部分９１底面に
露出する銅箔８１をエッチングすると、銅箔８１がパタ
ーニングされる。In this state, when the copper foil 81 exposed on the bottom surface of the opening 91 from the back side is etched, the copper foil 81 is patterned.
【００４３】図４(ｌ)の符号８６は、銅箔８１のパター
ニングによって形成された配線膜を示しており、該配線
膜８６には開口部分９２が設けられている。Reference numeral 86 in FIG. 4L denotes a wiring film formed by patterning the copper foil 81, and the wiring film 86 has an opening 92.
【００４４】次いで、レジスト膜８８を除去し(図４
(ｍ))、配線膜８６表面にポリイミド前駆体から成るポ
リイミドワニスを塗布すると、配線膜８６の開口部分９
２内にポリイミドワニスが流れ込み、表面が平坦なポリ
イミド膜から成る樹脂フィルム８９が形成される。Next, the resist film 88 is removed (FIG. 4).
(m)), when a polyimide varnish composed of a polyimide precursor is applied to the surface of the wiring film 86, the opening 9 of the wiring film 86 is formed.
The polyimide varnish flows into 2 and a resin film 89 made of a polyimide film having a flat surface is formed.
【００４５】次に、上記２枚の単層基板素片１０、８０
を用いた多層基板の製造方法を説明する。Next, the two single-layer substrate pieces 10 and 80
A method of manufacturing a multilayer substrate using the method will be described.
【００４６】図５の符号５０は、本発明で使用される超
音波接続装置を示している。この超音波接続装置５０
は、台座５６と、台座５６上に立設されたガイド棒５７
1、５７2と、ガイド棒５７1、５７2に上下移動可能に取
り付けられた発振部５１と、発振部５１先端に取り付け
られたホーン５２とを有している。Reference numeral 50 in FIG. 5 indicates an ultrasonic connecting device used in the present invention. This ultrasonic connection device 50
Is a pedestal 56 and a guide rod 57 erected on the pedestal 56.
1, and 57 2, the guide rod 57 1, 57 2 oscillating portion 51 mounted for vertical movement in, and a horn 52 attached to the oscillating portion 51 tip.
【００４７】台座５６上にはワーク５８が配置されてお
り、そのワーク５８上には上記第一例の単層基板素片１
０が配置されている。第一例の単層基板素片１０は、こ
こでは第１の樹脂フィルム１２が下に向けられ、第２の
樹脂フィルム１７が上に向けられている。A work 58 is arranged on the pedestal 56, and the single-layer substrate piece 1 of the first example is placed on the work 58.
0 is arranged. In the single-layer substrate piece 10 of the first example, here, the first resin film 12 is directed downward, and the second resin film 17 is directed upward.
【００４８】図７(ａ)の符号８０1は、上記第二例の単
層基板素片であり、そのバンプ８４1が第一例の単層基
板素片１０の第２の樹脂フィルム１７に当接された状態
で重ねて配置されている。[0048] Figure 7 numeral 80 1 (a) is a single layer board piece of the second example, the second resin film 17 of the single-layer board piece 10 of the bump 84 1 is first example They are placed one on top of the other in contact with each other.
【００４９】ホーン５２の先端部分５４は平坦に加工さ
れており、ワーク５８の表面と平行にされている。超音
波接続装置５０に設けられたシリンダー５３を動作さ
せ、発振部５１とホーン５２をガイド５７1、５７2に沿
って垂直に降下させると先端部５４が第二例の単層基板
素片８０1上に当接する(図７(ｂ))。The tip 54 of the horn 52 is flattened and made parallel to the surface of the work 58. When the cylinder 53 provided in the ultrasonic connection device 50 is operated to lower the oscillating portion 51 and the horn 52 vertically along the guides 57 1 and 57 2 , the tip portion 54 becomes the single-layer substrate piece 80 of the second example. 1 (FIG. 7 (b)).
【００５０】先端部分５４により、第二例の単層基板素
片８０1を第一例の単層基板素片１０上に押しつけ、そ
の状態で発振部５１を動作させ、ホーン５２に超音波を
印加すると、第二例の単層基板素片８０1が超音波振動
する。The [0050] distal end portion 54, pressing the single-layer board piece 80 1 of the second embodiment over the first embodiment monolayer board piece 10, to operate the oscillating part 51 in this state, the ultrasonic horn 52 Upon application, the single-layer board piece 80 1 of the second embodiment is ultrasonic vibration.
【００５１】このとき、ワーク５８上に配置された第一
例の単層基板素片１０は静止しており、バンプ８４1が
第一例の単層基板素片１０に対して振動する結果、バン
プ８４1が、その先端に当接されている第一例の単層基
板素片１０の第２の樹脂フィルム１７に食い込む。[0051] At this time, the single-layer board piece 10 of the first example, which is disposed on the work 58 is stationary, as a result of bumps 84 1 vibrates the single layer board piece 10 of the first example, The bump 84 1 bites into the second resin film 17 of the single-layer substrate piece 10 of the first example abutting on the tip.
【００５２】図４(ｎ)の符号Ｈは、バンプ８４1の樹脂
フィルム８７表面からの高さであり、図１(ｇ)の符号Ｔ
1は、バンプ８４1が食い込む対象である第２の樹脂フィ
ルム１７の膜厚である。このバンプ８４1の高さＨは、
膜厚Ｔ1よりも大きくなっている(Ｈ＞Ｔ1)。従って、バ
ンプ８４1が第２の樹脂フィルム１７内に食い込むと、
樹脂フィルム１７のうち、バンプ８４1と配線膜１６の
間に位置する符号９５の部分が突き破られ、バンプ８４
1の先端部分は第２の樹脂フィルム１７の下層に存する
配線膜１６に接触する。[0052] Reference numeral H in FIG. 4 (n) is the height from the resin film 87 the surface of the bumps 84 1, reference numeral T in FIG. 1 (g)
Reference numeral 1 denotes the thickness of the second resin film 17 to which the bump 84 1 bites. The height H of the bump 84 1 is
It is larger than the thickness T 1 (H> T 1) . Therefore, when the bump 84 1 bites into the second resin film 17,
In the resin film 17, a portion denoted by reference numeral 95 located between the bump 84 1 and the wiring film 16 is pierced, and the bump 84
The tip portion of 1 contacts the wiring film 16 under the second resin film 17.
【００５３】バンプ８４1の先端が配線膜１６に接触す
ると、バンプ８４1先端が溶融し、バンプ８４1が配線膜
１６に接続される。When the tip of the bump 84 1 contacts the wiring film 16, the tip of the bump 84 1 melts and the bump 84 1 is connected to the wiring film 16.
【００５４】その状態になると、ホーン５２の先端部分
５４とは直接接触していないワーク５８上の第一例の単
層基板素片１０も第二例の単層基板素片８０1と一緒に
超音波振動し始め、バンプ８４1は配線膜１６を突き破
らない。[0054] At this state, along with the first example monolayer board piece 10 also second example monolayer board piece 80 1 on the work 58 that is not in direct contact of the tip portion 54 of the horn 52 The ultrasonic vibration starts and the bump 84 1 does not break through the wiring film 16.
【００５５】その状態では第二例の単層基板素片８０1
は第一例の単層基板素片１０上に押圧されているため、
ホーン５２や台座５８を加熱しておくと樹脂フィルム８
７に接着性が発現され、樹脂フィルム８７は第２の樹脂
フィルム１７に接着する。その結果、２枚の単層基板素
片１０、８０1が一体となり、多層基板４１が得られ
る。２枚の単層基板素片１０、８０1間の電気的接続は
バンプ８４1でとられている。In that state, the single-layer substrate piece 80 1 of the second example is
Is pressed onto the single-layer substrate piece 10 of the first example,
When the horn 52 and the pedestal 58 are heated, the resin film 8
7, the resin film 87 adheres to the second resin film 17. As a result, two single layer board piece 10, 80 1 is integrated, multi-layer substrate 41 is obtained. Electrical connection between the single-layer board piece 10, 80 1 of the two is taken by the bump 84 1.
【００５６】以上説明したように、本発明によれば、予
め配線膜を露出させておかなくても、バンプと配線膜を
接続することができる。As described above, according to the present invention, the bump and the wiring film can be connected without exposing the wiring film in advance.
【００５７】次に、図８(ａ)に示すように、多層基板４
１上に２枚目の第二例の単層基板素片８０2のバンプ８
４2を接触させた状態で配置し、上記と同様に、ホーン
５２の先端部分５４を２枚目の第二例の単層基板素片８
０2に当接させる。Next, as shown in FIG.
The bumps 8 of the second single-layer substrate piece 802 of the second example on 1
4 2 is disposed in a state of being contacted, and in the same manner as described above, the second example of the single-layer board piece 8 tip portion 54 of the horn 52 of the second sheet
0 2 abut.
【００５８】その状態で２枚目の第二例の単層基板素片
８０2を押圧しながら超音波を印加すると、バンプ８４2
が多層基板４１表面の樹脂フィルム８９1に食い込む。In this state, when ultrasonic waves are applied while pressing the second single-layer substrate piece 802 of the second example, the bumps 84 2
There bites into the resin film 89 1 of the multilayer substrate 41 surface.
【００５９】図４(ｎ)の符号Ｔ2は第二例の単層配線基
板のバンプ形成面とは反対側の面の、樹脂フィルム８９
の配線膜８６表面からの厚みを示している。[0059] Figure 4 surface opposite sign T 2 are the bump formation surface of the single-layer wiring board of the second example of the (n), the resin film 89
Of the wiring film 86 from the surface.
【００６０】この厚みＴ2はバンプ高さＨよりも小さく
されており、バンプ８４2に当接されている樹脂フィル
ム８９1の厚さであるから、バンプ８４2と配線膜８６1
の間の部分９６に位置する樹脂フィルム８９1が突き破
られ、バンプ８４2はその下層に配置されている配線膜
８６1に接続される。[0060] The thickness T 2 are are smaller than the bump height H, since the thickness of the resin film 89 1 which is in contact with the bump 84 2, the bump 84 2 and the wiring film 86 1
It is the resin film 89 1 located at a portion 96 between the broken through, the bump 84 2 is connected to the wiring layer 86 1 disposed on the lower layer.
【００６１】図８(ｂ)の符号５２は、上記のように形成
された３層構造の多層基板を示している。３層の配線膜
１６、８６1、８６2はバンプ８４1、８４2で相互に電気
的に接続されている。Reference numeral 52 in FIG. 8B indicates a three-layered multilayer substrate formed as described above. 3-layer wiring films 16,86 1, 86 2 are electrically connected to each other by bumps 84 1, 84 2.
【００６２】以上は、配線膜１６、８６1、８６2とバン
プ８４1、８４2が銅で構成されており、銅同士が直接超
音波接続される場合を説明したが、配線膜とパンプのい
ずれか一方、又は両方に金被膜や半田被膜が形成されて
いてもよい。[0062] above, the wiring layer 16,86 1, 86 2 and the bumps 84 1, 84 2 are made of copper, but copper each other has been described the case where it is directly ultrasonic bonding, the wiring film and the bumps A gold coating or a solder coating may be formed on one or both of them.
【００６３】図９(ａ)の符号１４は金被膜であり、図１
(ｆ)のように、樹脂フィルム１２上に形成された配線膜
１６を金メッキ液に浸漬し、金を電解メッキした状態で
ある。Reference numeral 14 in FIG. 9A denotes a gold coating, and FIG.
As shown in (f), the wiring film 16 formed on the resin film 12 is immersed in a gold plating solution and gold is electrolytically plated.
【００６４】金被膜１４が形成された配線膜１６上にポ
リイミドワニスを塗布し、イミド化すると、図９(ｂ)で
示すように、第三例の単層基板素片２０が得られる。When a polyimide varnish is applied to the wiring film 16 on which the gold film 14 is formed and imidized, a single-layer substrate piece 20 of the third example is obtained as shown in FIG. 9B.
【００６５】図９(ｃ)は、第三例の単層基板素片２０上
に第二例の単層基板素片８０1を配置し、バンプ８４1を
第２の樹脂フィルム１７に当接させ、ホーン５２の先端
部分５４を第二例の単層基板素片８０1に押し当てた状
態を示している。[0065] FIG. 9 (c), the single-layer board piece 80 1 of the second embodiment is disposed on the single-layer board piece 20 of the third example, contact bumps 84 1 to the second resin film 17 It is allowed, and shows a state pressed against the distal end portion 54 of the horn 52 to a single-layer board piece 80 1 of the second embodiment.
【００６６】この状態でホーン５２に超音波振動を与
え、バンプ８４1を第２の樹脂フィルム１７に食い込ま
せると、バンプ８４1が金被膜１４と接触する。In this state, when the ultrasonic vibration is applied to the horn 52 to cause the bump 84 1 to bite into the second resin film 17, the bump 84 1 comes into contact with the gold coating 14.
【００６７】バンプ８４1は金被膜１４に押しつけられ
ながら超音波が印加されているので、バンプ８４1先端
部分が溶融し、バンプ８４1が金被膜１４に接続され
る。[0067] Since the bump 84 1 while being pressed against the gold coating 14 ultrasound is applied, the bump 84 1 the tip portion is melted, is connected to the bump 84 1 gold coating 14.
【００６８】また、第二例の単層基板素片８０1の樹脂
フィルム８７1が第三例の単層基板素片２０の表面に押
しつけられるため、ホーン５２や台座５８を加熱すると
樹脂フィルム８７1表面の接着層８７1bが第三例の単層
基板素片２０の表面に接着され、多層基板４２が得られ
る。[0068] Also, since the single-layer board piece 80 1 of resin film 87 1 of the second example is pressed against the surface of the third example of the single-layer board piece 20, heating the horn 52 and the pedestal 58 resin film 87 The adhesive layer 87 1b on one surface is adhered to the surface of the single-layer substrate piece 20 of the third example, and the multilayer substrate 42 is obtained.
【００６９】このように、バンプや配線膜に金被膜等の
被膜を設けた場合でも、超音波振動によってバンプと配
線膜とを接続することができる。As described above, even when a film such as a gold film is provided on the bump or the wiring film, the bump and the wiring film can be connected by the ultrasonic vibration.
【００７０】以上は、接着層によって単層基板素片同士
を接着して多層基板を形成する場合について説明した
が、バンプと配線膜との間の接続力だけで一体化させ、
多層基板を構成させてもよい。The case where the single-layer substrate pieces are bonded to each other by the adhesive layer to form a multilayer substrate has been described above. However, the single-layer substrate pieces are integrated only by the connection force between the bump and the wiring film.
You may comprise a multilayer substrate.
【００７１】なお、上記はポリイミド膜を樹脂フィルム
に用いた場合について説明したが、本発明はそれに限定
されるものではなく、ポリエチレンフィルムやポリエス
テルフィルム、エポキシフィルム等、他の樹脂のフィル
ムにも適用できる。また、配線膜も、銅ではなく、アル
ミニウム等の他の金属で構成させることもできる。Although the above description has been made on the case where the polyimide film is used as the resin film, the present invention is not limited to this, and is applicable to other resin films such as a polyethylene film, a polyester film, and an epoxy film. it can. Also, the wiring film may be made of another metal such as aluminum instead of copper.
【００７２】以上は、汎用の超音波接続装置５０を用い
た例について説明したが、図６の符号６０で示した超音
波接続装置を用いることができる。Although the example using the general-purpose ultrasonic connection device 50 has been described above, the ultrasonic connection device indicated by reference numeral 60 in FIG. 6 can be used.
【００７３】この超音波接続装置６０は、ホーン６２の
先端部分６４は、発振部６１やホーン６２に対して斜め
に成っており、全体を斜めにしてガイド６７1、６７2に
取り付けたときに、先端部分６４が水平になるように構
成されている。[0073] The ultrasonic bonding device 60, the tip portion 64 of the horn 62 is made at an angle with respect to the oscillation unit 61 and the horn 62, when attached to the guide 67 1, 67 2 and the entire diagonally , The distal end portion 64 is configured to be horizontal.
【００７４】上記実施例で用いた超音波接続装置５０で
は、ワーク５８上に単層基板素片１０、８０を配置する
必要があったが、この超音波接続装置６０では、ホーン
６２が台座６８やワークにぶつかることがない。従っ
て、大面積のワーク６８を用いることができるので、単
層基板素片１０、８０の配置が容易になる。In the ultrasonic connection device 50 used in the above embodiment, the single-layer substrate pieces 10 and 80 need to be disposed on the work 58. In this ultrasonic connection device 60, the horn 62 is attached to the pedestal 68. And does not hit the workpiece. Therefore, since the work 68 having a large area can be used, the arrangement of the single-layer substrate pieces 10 and 80 becomes easy.
【００７５】[0075]
【発明の効果】樹脂フィルムに開口部を設けなくてもバ
ンプを配線膜に接続できるので、多層基板の製造工程が
簡単になる。According to the present invention, the bumps can be connected to the wiring film without providing an opening in the resin film, thereby simplifying the manufacturing process of the multilayer substrate.
【図１】(ａ)〜(ｇ)：本発明の単層基板素片の一例の製
造工程を説明するための図1 (a) to 1 (g) are views for explaining a manufacturing process of an example of a single-layer substrate piece of the present invention.
【図２】(ａ)〜(ｅ)：本発明の多層基板に用いることが
できる単層基板素片の一例の製造工程を説明するための
図(前半)FIGS. 2A to 2E are diagrams for explaining a manufacturing process of an example of a single-layer substrate piece that can be used for the multilayer substrate of the present invention (first half).
【図３】(ｆ)〜(ｊ)：その中半を説明するための図FIG. 3 (f) to (j): diagrams for explaining the middle part thereof
【図４】(ｋ)〜(ｎ)：その中半を説明するための図FIGS. 4 (k) to (n): diagrams for explaining the middle half thereof
【図５】本発明に用いられる超音波接続装置の一例FIG. 5 shows an example of an ultrasonic connection device used in the present invention.
【図６】本発明に用いられる超音波接続装置の他の例FIG. 6 shows another example of the ultrasonic connection device used in the present invention.
【図７】(ａ)〜(ｃ)：本発明の多層基板の製造工程を説
明するための図FIGS. 7A to 7C are diagrams for explaining a manufacturing process of the multilayer substrate of the present invention.
【図８】(ａ)、(ｂ)：その多層基板を更に多層化する工
程を説明するための図FIGS. 8A and 8B are diagrams for explaining a step of further multilayering the multilayer substrate.
【図９】(ａ)〜(ｄ)：本発明の単層基板素片の他の例の
製造工程、及びその単層基板素片を用いた多層基板の製
造工程を説明するための図9 (a) to 9 (d) are views for explaining a manufacturing process of another example of a single-layer substrate piece of the present invention, and a manufacturing process of a multilayer substrate using the single-layer substrate piece.
【図１０】(ａ)〜(ｆ)：従来技術の多層基板の製造に用
いられる単層基板素片の製造工程を説明するための図
(前半)10 (a) to 10 (f) are views for explaining a manufacturing process of a single-layer substrate piece used for manufacturing a conventional multilayer substrate.
(first half)
【図１１】(ｇ)〜(ｌ)：その中半FIG. 11 (g) to (l): half of them
【図１２】(ｍ)〜(ｑ)：その後半FIG. 12 (m) to (q): latter half
【図１３】(ａ)、(ｂ)：従来技術の多層基板製造方法を
説明するための図FIGS. 13A and 13B are diagrams for explaining a conventional multilayer substrate manufacturing method.
１０、８０(８０1、８０2)……単層基板素片 １２、１７、８９(８９1、８９2)……樹脂フィルム １２……第１の樹脂フィルム、１７……第２の樹脂フィ
ルム １４……金属被膜 １６、８６(８６1、８６2)……配線膜 ４１、４２……多層基板 ８４（８４1、８４2)……バンプ10, 80 (80 1 , 80 2 ) single-layer substrate piece 12, 17, 89 (89 1 , 89 2 ) resin film 12 first resin film 17, second resin film 14 ... metal film 16,86 (86 1, 86 2) ...... wiring films 41 and 42 ... multilayer substrate 84 (84 1, 84 2) ...... bump
【手続補正書】[Procedure amendment]
【提出日】平成１２年５月１１日（２０００．５．１
１）[Submission Date] May 11, 2000 (2000.5.1)
1)
【手続補正１】[Procedure amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】請求項１０[Correction target item name] Claim 10
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【手続補正２】[Procedure amendment 2]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】００１６[Correction target item name] 0016
【補正方法】変更[Correction method] Change
【補正内容】[Correction contents]
【００１６】請求項１記載の発明は、金属薄膜がパター
ニングされて成る配線膜と、前記配線膜表面に形成され
た樹脂フィルムとを有する複数の単層基板素片の前記配
線膜同士をバンプで接続し、多層基板を形成する多層基
板の製造方法であって、２枚の前記単層基板素片のう
ち、少なくとも一方の前記単層基板の前記配線膜に、前
記樹脂フィルム上に突き出るように金属のバンプを形成
しておき、前記バンプを他方の単層基板素片の樹脂フィ
ルム上に当接させ、少なくとも一方の前記単層基板に超
音波を印加し、バンプに当接された前記樹脂フィルムを
突き破り、前記バンプを前記配線膜に接触させ、前記バ
ンプと前記配線膜とを接続することを特徴とする多層基
板の製造方法である。請求項２記載の発明は、前記超音
波の印加は押圧しながら行うことを特徴とする請求項１
記載の多層基板の製造方法である。請求項３記載の発明
は、前記バンプが当接される前記樹脂フィルムは、予め
硬化しておくことを特徴とする請求項１又は請求項２の
いずれか１項記載の多層基板の製造方法である。請求項
４記載の発明は、前記多層基板表面の前記樹脂フィルム
に他の単層基板素片のバンプを当接させ、前記多層基板
又は当接された単層基板素片のいずれか一方に超音波を
印加し、前記多層基板の配線膜に単層基板素片の前記バ
ンプを接続させることを特徴とする請求項１乃至請求項
３のいずれか１項記載の多層基板の製造方法である。請
求項５記載の発明は、前記バンプに当接される前記樹脂
フィルムの前記配線膜上の厚さは、前記バンプの樹脂フ
ィルムから突き出た部分の高さよりも薄くされているこ
とを特徴とする請求項１乃至請求項４のいずれか１項記
載の多層基板の製造方法である。請求項６記載の発明
は、前記配線膜と前記バンプとは銅で構成することを特
徴とする請求項１乃至請求項５のいずれか１項記載の多
層基板の製造方法である。請求項７記載の発明は、前記
配線膜又は前記バンプのいずれか一方又は両方に銅以外
の金属の被膜を形成した後、前記超音波で接続すること
を特徴とする請求項６記載の多層基板の製造方法であ
る。請求項８記載の発明は、前記バンプが当接される樹
脂フィルムはポリイミド膜であることを特徴とする請求
項１乃至請求項７のいずれか１項記載の多層基板の製造
方法である。請求項９記載の発明は、請求項１乃至請求
項８のいずれか１項記載の多層基板の製造方法に用いら
れる単層基板素片であって、第１の樹脂フィルム上に位
置する金属箔をパターニングして前記配線膜を形成した
後、該配線膜上に樹脂フィルムの原料液が塗布され、硬
化されて第２の樹脂フィルムが形成されていることを特
徴とする単層基板素片である。請求項１０記載の発明
は、請求項９記載の単層基板素片の、前記第１又は第２
の樹脂フィルム上に、他の単層基板素片のバンプが当接
され、超音波が印加されて前記第１又は第２の樹脂フィ
ルムが突き破られ、前記他の単層基板素片の前記バンプ
が、前記配線膜に接続されたことを特徴とする多層基板
である。According to a first aspect of the present invention, the wiring films of a plurality of single-layer substrate pieces each having a wiring film formed by patterning a metal thin film and a resin film formed on the surface of the wiring film are bumped. A method of manufacturing a multilayer board for forming a multilayer board, wherein the wiring film of at least one of the single-layer board pieces out of the two single-layer board pieces protrudes onto the resin film. After forming a metal bump, the bump is brought into contact with the resin film of the other single-layer substrate piece, ultrasonic waves are applied to at least one of the single-layer substrates, and the resin that has come into contact with the bump is pressed. A method for manufacturing a multilayer substrate, comprising: piercing a film, bringing the bump into contact with the wiring film, and connecting the bump and the wiring film. The invention according to claim 2 is characterized in that the application of the ultrasonic wave is performed while pressing.
It is a manufacturing method of the multilayer substrate described. The invention according to claim 3 is the method according to any one of claims 1 or 2, wherein the resin film to which the bump contacts is cured in advance. is there. The invention according to claim 4 is characterized in that a bump of another single-layer substrate piece is brought into contact with the resin film on the surface of the multilayer substrate, and the resin film is superposed on one of the multilayer substrate and the contacted single-layer substrate piece. 4. The method according to claim 1, wherein a sound wave is applied to connect the bumps of the single-layer substrate piece to the wiring film of the multilayer substrate. The invention according to claim 5 is characterized in that the thickness of the resin film in contact with the bump on the wiring film is smaller than the height of a portion of the bump protruding from the resin film. A method of manufacturing a multilayer substrate according to any one of claims 1 to 4. The invention according to claim 6 is the method for manufacturing a multilayer substrate according to any one of claims 1 to 5, wherein the wiring film and the bump are made of copper. 7. The multi-layer substrate according to claim 6, wherein after forming a coating of a metal other than copper on one or both of the wiring film and the bump, the multi-layer substrate is connected by the ultrasonic wave. It is a manufacturing method of. The invention according to claim 8 is the method for manufacturing a multilayer substrate according to any one of claims 1 to 7, wherein the resin film contacting the bump is a polyimide film. According to a ninth aspect of the present invention, there is provided a single-layer substrate piece used in the method for manufacturing a multilayer substrate according to any one of the first to eighth aspects, wherein the metal foil is located on the first resin film. After forming the wiring film by patterning, a raw material liquid for a resin film is applied on the wiring film and cured to form a second resin film. is there. According to a tenth aspect of the present invention, the first or second single-layer substrate piece of the ninth aspect is provided.
On the resin film of the above, the bump of another single-layer substrate piece is abutted, ultrasonic waves are applied to pierce the first or second resin film, and the other single-layer substrate piece A multilayer substrate, wherein a bump is connected to the wiring film.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 福田 光博 栃木県鹿沼市さつき町12−３ ソニーケミ カル株式会社第２工場内 (72)発明者 薄井 博由紀 栃木県鹿沼市さつき町12−３ ソニーケミ カル株式会社第２工場内 Ｆターム(参考） 5E346 CC08 CC09 CC10 CC32 EE13 EE33 FF24 GG08 GG28 HH31 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Mitsuhiro Fukuda 12-3 Satsuki-cho, Kanuma-shi, Tochigi Sony Chemical Co., Ltd. Second Factory (72) Inventor Hiroyuki Usui 12-3 Satsuki-cho, Kanuma-shi, Tochigi Sony Chemical F-term in the second factory (reference) 5E346 CC08 CC09 CC10 CC32 EE13 EE33 FF24 GG08 GG28 HH31
Claims (10)
と、 前記配線膜表面に形成された樹脂フィルムとを有する複
数の単層基板素片の前記配線膜同士をバンプで接続し、
多層基板を形成する多層基板の製造方法であって、 ２枚の前記単層基板素片のうち、少なくとも一方の前記
単層基板の前記配線膜に、前記樹脂フィルム上に突き出
るように金属のバンプを形成しておき、 前記バンプを他方の単層基板素片の樹脂フィルム上に当
接させ、少なくとも一方の前記単層基板に超音波を印加
し、バンプに当接された前記樹脂フィルムを突き破り、
前記バンプを前記配線膜に接触させ、前記バンプと前記
配線膜とを接続することを特徴とする多層基板の製造方
法。1. A plurality of single-layer substrate pieces each having a wiring film formed by patterning a metal thin film and a resin film formed on a surface of the wiring film are connected to each other by bumps,
A method of manufacturing a multi-layer substrate for forming a multi-layer substrate, wherein a metal bump is formed on at least one of the two single-layer substrate pieces so that the wiring film protrudes onto the resin film. Is formed, and the bump is brought into contact with the resin film of the other single-layer substrate piece, ultrasonic waves are applied to at least one of the single-layer substrates, and the resin film contacted with the bump is broken through. ,
A method for manufacturing a multilayer substrate, comprising: contacting the bump with the wiring film to connect the bump to the wiring film.
を特徴とする請求項１記載の多層基板の製造方法。2. The method according to claim 1, wherein the application of the ultrasonic wave is performed while pressing.
は、予め硬化しておくことを特徴とする請求項１又は請
求項２のいずれか１項記載の多層基板の製造方法。3. The method according to claim 1, wherein the resin film to which the bump is brought into contact is cured beforehand.
の単層基板素片のバンプを当接させ、前記多層基板又は
当接された単層基板素片のいずれか一方に超音波を印加
し、前記多層基板の配線膜に単層基板素片の前記バンプ
を接続させることを特徴とする請求項１乃至請求項３の
いずれか１項記載の多層基板の製造方法。4. A bump of another single-layer substrate piece is brought into contact with the resin film on the surface of the multi-layer substrate, and ultrasonic waves are applied to either the multi-layer substrate or the abutted single-layer substrate piece. 4. The method according to claim 1, wherein the bump of the single-layer substrate piece is connected to the wiring film of the multilayer substrate.
の前記配線膜上の厚さは、前記バンプの樹脂フィルムか
ら突き出た部分の高さよりも薄くされていることを特徴
とする請求項１乃至請求項４のいずれか１項記載の多層
基板の製造方法。5. The semiconductor device according to claim 1, wherein a thickness of the resin film in contact with the bump on the wiring film is smaller than a height of a portion of the bump protruding from the resin film. A method for manufacturing a multilayer substrate according to any one of claims 1 to 4.
ことを特徴とする請求項１乃至請求項５のいずれか１項
記載の多層基板の製造方法。6. The method according to claim 1, wherein the wiring film and the bump are made of copper.
又は両方に銅以外の金属の被膜を形成した後、前記超音
波で接続することを特徴とする請求項６記載の多層基板
の製造方法。7. The method for manufacturing a multilayer substrate according to claim 6, wherein after forming a coating of a metal other than copper on one or both of the wiring film and the bump, the connection is performed by the ultrasonic wave. .
リイミド膜であることを特徴とする請求項１乃至請求項
７のいずれか１項記載の多層基板の製造方法。8. The method according to claim 1, wherein the resin film contacting the bump is a polyimide film.
の多層基板の製造方法に用いられる単層基板素片であっ
て、 第１の樹脂フィルム上に位置する金属箔をパターニング
して前記配線膜を形成した後、該配線膜上に樹脂フィル
ムの原料液が塗布され、硬化されて第２の樹脂フィルム
が形成されていることを特徴とする単層基板素片。9. A single-layer substrate piece used in the method of manufacturing a multilayer substrate according to claim 1, wherein a metal foil located on the first resin film is patterned. A single-layer substrate piece, wherein a raw material liquid for a resin film is applied on the wiring film after the wiring film is formed, and then cured to form a second resin film.
樹脂フィルム上に、バンプを有する単層基板素片の前記
バンプが当接され、超音波が印加されて前記第２の樹脂
フィルムが突き破られ、前記バンプが前記第１又は第２
の樹脂フィルムの下層の前記金属配線に接続されている
ことを特徴とする多層基板。10. The bump of a single-layer substrate piece having a bump is brought into contact with the first or second resin film of the single-layer substrate piece, and an ultrasonic wave is applied to the second or first resin film. A resin film is pierced, and the bumps are
A multilayer substrate, which is connected to the metal wiring below the resin film.
Priority Applications (11)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24695499A JP3243462B2 (en) | 1999-09-01 | 1999-09-01 | Method for manufacturing multilayer substrate |
| US09/642,638 US6583364B1 (en) | 1999-08-26 | 2000-08-22 | Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards |
| CNA2004101019961A CN1655663A (en) | 1999-08-26 | 2000-08-25 | Ultrasonic manufacturing apparatus |
| EP00118497A EP1079677B1 (en) | 1999-08-26 | 2000-08-25 | Ultrasonic manufacturing apparatus, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards |
| CNA200410102009XA CN1655664A (en) | 1999-08-26 | 2000-08-25 | Ultrasonic manufacturing apparatus, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards |
| DE60034516T DE60034516T2 (en) | 1999-08-26 | 2000-08-25 | Ultrasonic manufacturing apparatus, multilayer flexible printed circuit boards and methods of making multilayer flexible printed circuit boards |
| CNB001313118A CN1222989C (en) | 1999-08-26 | 2000-08-25 | Ultrasonic generator, multi-layer flexible circuit board and manufacture thereof |
| KR1020000049858A KR20010021431A (en) | 1999-08-26 | 2000-08-26 | So nicator, multilayer flexible circuit board and method for producing the same |
| TW089117436A TW563390B (en) | 1999-08-26 | 2000-08-30 | Supersonic generating device, multi-layered flexible layout board, and manufacturing method for multi-layered flexible layout board |
| US10/423,977 US6926187B2 (en) | 1999-08-26 | 2003-04-28 | Ultrasonic manufacturing apparatus |
| US10/423,978 US6991148B2 (en) | 1999-08-26 | 2003-04-28 | Process for manufacturing multilayer flexible wiring boards |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24695499A JP3243462B2 (en) | 1999-09-01 | 1999-09-01 | Method for manufacturing multilayer substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001077531A true JP2001077531A (en) | 2001-03-23 |
| JP3243462B2 JP3243462B2 (en) | 2002-01-07 |
Family
ID=17156212
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24695499A Expired - Fee Related JP3243462B2 (en) | 1999-08-26 | 1999-09-01 | Method for manufacturing multilayer substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3243462B2 (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020078097A (en) * | 2001-04-04 | 2002-10-18 | 오리엔트 세미컨덕터 일렉트로닉스 리미티드 | A manufacturing method for multilayer high density substrate |
| JP2003318545A (en) * | 2002-04-22 | 2003-11-07 | Sony Corp | Multilayer printed wiring board and its manufacturing method |
| JP2005045191A (en) * | 2003-07-04 | 2005-02-17 | North:Kk | Manufacturing method for wiring circuit board and for multi-layer wiring board |
| JP2006339261A (en) * | 2005-05-31 | 2006-12-14 | Nippon Mektron Ltd | Manufacturing method of build-up multilayer flexible circuit board |
| JP2008172268A (en) * | 2008-02-28 | 2008-07-24 | Nippon Mektron Ltd | Method of producing multilayer circuit board, and circuit base material |
| JP2010034258A (en) * | 2008-07-29 | 2010-02-12 | Kyocera Corp | Wiring substrate, mounting structure, and production process of wiring substrate |
| JP2013110408A (en) * | 2011-11-18 | 2013-06-06 | Samsung Electro-Mechanics Co Ltd | Printed circuit board and manufacturing method therefor |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06188560A (en) * | 1992-12-18 | 1994-07-08 | Toshiba Corp | Manufacture of printed wiring board |
| JPH06216258A (en) * | 1993-01-15 | 1994-08-05 | Toshiba Corp | Manufacture of semiconductor device |
| JPH06326438A (en) * | 1993-05-13 | 1994-11-25 | Nitto Denko Corp | Single-layer wiring unit, multilayer circuit wiring board, and manufacture thereof |
| JPH11112147A (en) * | 1997-09-30 | 1999-04-23 | Elna Co Ltd | Multilayered printed wiring board |
-
1999
- 1999-09-01 JP JP24695499A patent/JP3243462B2/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06188560A (en) * | 1992-12-18 | 1994-07-08 | Toshiba Corp | Manufacture of printed wiring board |
| JPH06216258A (en) * | 1993-01-15 | 1994-08-05 | Toshiba Corp | Manufacture of semiconductor device |
| JPH06326438A (en) * | 1993-05-13 | 1994-11-25 | Nitto Denko Corp | Single-layer wiring unit, multilayer circuit wiring board, and manufacture thereof |
| JPH11112147A (en) * | 1997-09-30 | 1999-04-23 | Elna Co Ltd | Multilayered printed wiring board |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20020078097A (en) * | 2001-04-04 | 2002-10-18 | 오리엔트 세미컨덕터 일렉트로닉스 리미티드 | A manufacturing method for multilayer high density substrate |
| JP2003318545A (en) * | 2002-04-22 | 2003-11-07 | Sony Corp | Multilayer printed wiring board and its manufacturing method |
| US8217276B2 (en) | 2002-04-22 | 2012-07-10 | Sony Corporation | Multilayer printed circuit board and method of manufacturing multilayer printed circuit board |
| JP2005045191A (en) * | 2003-07-04 | 2005-02-17 | North:Kk | Manufacturing method for wiring circuit board and for multi-layer wiring board |
| JP2006339261A (en) * | 2005-05-31 | 2006-12-14 | Nippon Mektron Ltd | Manufacturing method of build-up multilayer flexible circuit board |
| JP4738895B2 (en) * | 2005-05-31 | 2011-08-03 | 日本メクトロン株式会社 | Manufacturing method of build-up type multilayer flexible circuit board |
| JP2008172268A (en) * | 2008-02-28 | 2008-07-24 | Nippon Mektron Ltd | Method of producing multilayer circuit board, and circuit base material |
| JP2010034258A (en) * | 2008-07-29 | 2010-02-12 | Kyocera Corp | Wiring substrate, mounting structure, and production process of wiring substrate |
| JP2013110408A (en) * | 2011-11-18 | 2013-06-06 | Samsung Electro-Mechanics Co Ltd | Printed circuit board and manufacturing method therefor |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3243462B2 (en) | 2002-01-07 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100478314B1 (en) | Multi-layer flexible wiring boards and fabricating methods thereof | |
| WO2007052674A1 (en) | Multilayer printed wiring board for semiconductor device and process for producing the same | |
| JP2001111227A (en) | Flexible wiring board and method of manufacturing the same | |
| TW200810652A (en) | Method for manufacturing a printed wiring board | |
| JP3183653B2 (en) | Flexible board | |
| KR20010021431A (en) | So nicator, multilayer flexible circuit board and method for producing the same | |
| JPH05267402A (en) | Thin film multilayer printed circuit board and its manufacture | |
| JP2008124398A (en) | Semiconductor package and its manufacturing method | |
| JP2004140018A (en) | Process for producing multilayer board, multilayer board, and mobile apparatus using it | |
| JP5007164B2 (en) | Multilayer wiring board and multilayer wiring board manufacturing method | |
| US6596947B1 (en) | Board pieces, flexible wiring boards, and processes for manufacturing flexible wiring boards | |
| JP3243462B2 (en) | Method for manufacturing multilayer substrate | |
| JP2001274554A (en) | Printed wiring board and its manufacturing method | |
| JPH10303561A (en) | Multi-layer wiring board and its manufacture | |
| KR100716809B1 (en) | A PCB using the ACF and manufacturing method thereof | |
| JP3587748B2 (en) | Multilayer flexible wiring board and method for manufacturing multilayer flexible wiring board | |
| WO1998043295A1 (en) | Circuit board and production method thereof | |
| JP2000012622A (en) | Wiring board and its manufacture | |
| JPH08125331A (en) | Manufacture of printed circuit board | |
| JP4190857B2 (en) | Printed circuit board connection method and composite printed circuit board | |
| JP2002111185A (en) | Wiring circuit board with bumps and method of manufacturing the same | |
| JP2007035716A (en) | Manufacturing method of printed circuit board | |
| JP3308951B2 (en) | Multilayer flexible wiring board | |
| JPH08250541A (en) | Semiconductor element mounting sibstrate and manufacture thereof | |
| JP2001068824A (en) | Manufacture of wiring board |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091019 Year of fee payment: 8 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101019 Year of fee payment: 9 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111019 Year of fee payment: 10 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121019 Year of fee payment: 11 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131019 Year of fee payment: 12 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131019 Year of fee payment: 12 |
|
| S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
| S531 | Written request for registration of change of domicile |
Free format text: JAPANESE INTERMEDIATE CODE: R313531 |
|
| S533 | Written request for registration of change of name |
Free format text: JAPANESE INTERMEDIATE CODE: R313533 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| LAPS | Cancellation because of no payment of annual fees |