JP2001077487A - Printed board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce a power consumption in a printed board by a method wherein the first block of a plurality of blocks is provided with a power supply control means for supplying power to only the block mounted with a circuit which are needed from among the plurality of other blocks. SOLUTION: A power turn-on sequence circuit 3a1 of a first power supply block 3, which receives a power indication signal, drives a relay circuit 3a2 to put a GND line 6 and a GND line 7 in a state of continuity and after a short time is elapsed, the circuit 3a1 drives a relay circuit 3a3 to put a Vcc line 9 and a Vcc line 10 in a state of continuity. As the result, a power supply is fed to the other power supply block 4, and a function circuit 4a on the block 4 is contrived so as to actuate. Hereby, since the power supply is fed to only the specified block and the power supply is not fed to blocks other than the specified block, reduction in power consumption in a printed board becomes possible.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention functions as a social infrastructure even if a printed circuit board unit is replaced due to a component failure, such as an online system of a bank or an exchange in communication. Due to its importance, it is not allowed to stop the entire system, and it is necessary to insert and remove only the necessary printed circuit boards and replace them while the system power supply is in the ON state (hereinafter referred to as the live state). In order to reduce the loss cost of corporate activities that have been demanded in recent years, as a measure to reduce the power consumption of electronic devices, power is supplied only to the circuits that realize the necessary functions in a certain state, and the processing ends. By doing
If the function is no longer needed, when the power supply to the circuit that realizes the function is cut off, electronic components on the printed circuit board on which the circuit that realizes the function is mounted and data on the system are damaged. The present invention relates to a technique for preventing the occurrence of a problem.

[0002]

2. Description of the Related Art A conventional printed circuit board of this type is
As shown in Japanese Patent Application No. 0064448, a circuit on a printed circuit board is divided into a plurality of blocks, each of which is independently supplied with power. The provision of the power supply and cutoff means which is performed sequentially prevents the occurrence of a failure in the electronic components on the printed circuit board.

Next, the operation will be described. In an example relating to power supply when a printed circuit board is inserted, as shown in FIG. 9, for example, when the connector section 22 of the printed circuit board 21 is inserted into the connector section 33 of the back panel 32, the back panel 3
2 from the power supply block 23 (power-on sequence circuit 23) via the GND line 26 and the Vcc line 29.
a1, the relay circuit 23a2, the relay circuit 23a3, the relay circuit 23a4, and the relay circuit 23a5).
When power is supplied, the power-on sequence circuit 23a1 first drives the relay circuit 23a2 to drive the GND line 2
6 and the GND line 27 are made conductive, and after a short time, the relay circuit 23a3 is driven to make the Vcc line 29 and the Vcc line 30 conductive. As a result, power is supplied to the power supply block 24. The power-on sequence circuit 23a1 is connected to the power supply control I / F circuit 24a of the power supply block 24 by the control line 23aa.
1 to output an operation normality confirmation signal.

A power supply block 24 receiving power supply
Then, the operation state of the data processing circuit 24a3 is detected by the power supply normality detection circuit 24a2.
The / F circuit 24a1 outputs a normal operation response signal to the power-on sequence circuit 23a1 through the control line 24aa.

When the power-on sequence circuit 23a1 receives the normal operation response signal, it drives the relay circuit 23a4 and the relay circuit 23a5 after a short time to connect the GND line 26 and the GND line 28, the Vcc line 29 and the Vcc line 29
The cc line 31 is made conductive. As a result, power is supplied to the power supply block 25. The power-on sequence circuit 23a1 is connected to the power supply control I / F circuit 25a of the power supply block 25 by the control line 23ab.
1 to output an operation normality confirmation signal.

A power supply block 25 that receives power supply
Then, the operation state of the data processing circuit 25a3 is detected by the power supply normality detection circuit 25a2.
The / F circuit 25a1 outputs a normal operation response signal to the power-on sequence circuit 23a1 through the control line 25aa.

In this way, it is possible to limit the transient current when the printed circuit board is inserted, and to prevent a failure such as an IC when the printed circuit board is inserted while the power of the back panel 2 is ON. Can be.

[0008]

The conventional printed circuit board for the purpose of preventing the occurrence of a failure in an electronic component is configured as described above, so that the failure of an IC or the like that occurs at the time of insertion and removal is prevented. Although it is possible, power is eventually supplied to the entire printed circuit board, and it is responding to the reduction in system power consumption in electronic equipment, which has been demanded in recent years for the purpose of reducing the loss cost of corporate activities and saving resources. Did not.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems, and supplies power to only a circuit that realizes a necessary function with respect to a conventional hot-plug insertion / extraction printed circuit board to perform processing. It is an object of the present invention to obtain a printed circuit board that can reduce power consumption by shutting off power supply to a circuit whose function is not required after completion or a circuit that is not used in a certain state.

[0010]

According to a first aspect of the present invention, there is provided a printed circuit board in which a circuit on a printed circuit board is divided in advance into a plurality of blocks to which power is independently supplied for each functional unit. A power supply control unit that supplies power only to a block in which a circuit that implements a required function from among the other blocks is provided in a first block that receives power supply from outside in the plurality of blocks. It is provided.

Further, a printed circuit board according to a second aspect of the present invention comprises:
In a first block of the plurality of blocks that receives power supply from the outside, a circuit for determining which block needs to be supplied with power in a certain state is provided.

A printed circuit board according to a third aspect of the present invention is provided with a program control means for activating the power supply control determination circuit in response to an external control signal.

Further, a printed circuit board according to a fourth aspect of the present invention comprises:
After a certain period of time has elapsed after the other block has been supplied with power, a first block of the plurality of blocks which is supplied with power from the outside is a power cutoff control for cutting off power supply to the corresponding block. Means are provided.

According to a fifth aspect of the present invention, in the printed circuit board, the other block includes a detecting means for detecting completion of a series of data processing and the like after receiving power supply, and When the first block which is supplied with power from the outside receives the processing completion signal, power cutoff control means for cutting off the power supply to the corresponding block is provided.

A printed circuit board according to a sixth aspect of the present invention comprises:
The first block receiving power supply from the outside of the plurality of blocks, and power on to the corresponding block,
A power-on / off control means for repeating the cut-off in accordance with a sequence is provided.

In a printed circuit board according to a seventh aspect of the present invention, the power-on / off control means is constituted by a program control means which is activated by receiving a control signal from the outside.

[0017]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 1 and 2
BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram illustrating one embodiment of a printed circuit board according to the present invention. FIG. 1 is a diagram showing a configuration of a printed circuit board, and FIG. 2 is a diagram showing a detailed configuration thereof. In FIG.
1 is a printed circuit board, 2 is a connector part on the printed circuit board 1, 3, 4 and 5 are power supply blocks for receiving power supply at individual timings, 3a, 4a and 5a are power supply blocks 3, 4, and 5, respectively. A functional circuit arranged above and operating by receiving power supply, 6, 7, and 8 are GND lines, 9, 1
Reference numerals 0 and 11 denote Vcc lines, 12 denotes an electronic device, and 13 denotes a connector portion on a back board (not shown) of the electronic device 12. In the first embodiment, as shown in FIG. 2, the functional circuit 3a is a sequence control circuit that controls power supply to the power supply blocks 4 and 5, that is, power supply control means, and 4aa and 5aa are respectively This is a control line for performing a response regarding power-on from the power supply blocks 4 and 5.

As shown in FIG. 2, the functional circuit 3a, that is, the power supply control means, includes a power supply sequence circuit 3a1, a power supply block instruction circuit 3a6, and a power supply block 4 for controlling the power supply of the entire printed circuit board 1. , A relay circuit 3a2 for controlling the GND line and a relay circuit 3a for controlling the Vcc line
3. Power supply to the power supply block 5, that is, GND
A relay circuit 3a4 for controlling the VCC line, and a relay circuit 3a5 for controlling the VCC line.
a is a power supply control I / F circuit 4a1, a power supply normality detection circuit 4a2, ie, normality detection means, and a data processing circuit 4a3.
And the functional circuit 5a includes a power control I / F circuit 5a1.
Power supply normality detection circuit 5a2, that is, normality detection means;
It is composed of a data processing circuit 5a3.

As described above, the printed circuit board 1 according to the first embodiment is provided with, for example, three power supply blocks to which power is supplied at the same timing so that the respective power supply timings are different. is there. That is,
A power supply sequence circuit 3a1 for controlling the power supply block to power on the entire printed circuit board 1, a data processing circuit 4a3 for processing input / output signals 14 to and from the electronic device 12,
For example, power is supplied to the data processing circuit 5a3 in the order of the power supply block 3, the power supply block 4, and the power supply block 5.

Hereinafter, the operation of the first embodiment will be described with reference to FIGS. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, a relay circuit 3a4, a relay circuit 3a5, and a power-on block instruction circuit 3a6). When power is supplied, in advance in which the block or to supply power from the instruction Power-Up block instruction circuit 3a6 DIP switch or the like to the power-on sequence circuit 3a1, the power supply instruction signal to the specified block Is output. For example, if this instruction is an instruction to turn on the power to the blocks 4 and 5, the power-on sequence circuit 3 receiving the power-on instruction signal
a1 drives the relay circuit 3a2 to make the GND line 6 and the GND line 7 conductive, and drives the relay circuit 3a3 after a short time to drive the Vcc line 9 and the Vcc line.
The line 10 is made conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if normality is detected by the power supply normality detection circuit 4a2, the power supply control I / F circuit 4a1 sends the control line 4aa to the control line 4aa. An operation normal response signal is output to the power-on sequence circuit 3a1.

When the power-on sequence circuit 3a1 receives the normal operation response signal, in this example, the power-on block instruction circuit 3a6 receives the power supply instruction from the power-on block instruction circuit 3a6 to the blocks 4 and 5, so that the relay circuit 3a4 After a short time, the relay circuit 3a5 is driven to connect the GND line 6 to the G line.
ND line 8 is connected to Vcc line 9 and Vcc line 11
Are made conductive. As a result, the power supply block 5
Is supplied with power, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is carried out by a built-in test of the data processing circuit 5a3, and if normality is detected by the power supply normality detection circuit 5a2, the power supply control I / F circuit 5a1 sends a control line 5aa to the control line 5aa. A normal operation response signal is output to the power-on sequence circuit 3a1, and when this signal is received by the power-on sequence circuit 3a1, this state is maintained.

In this example, the power-on block instruction circuit 3
Although there was an input instruction from block a6 to blocks 4 and 5,
If the instruction is only for the block 4, the power supply sequence to the latter half block 5 will not be executed.

As described above, according to the first embodiment,
The power supply pattern of one printed circuit board is divided into a plurality, that is, a power supply block, and one of the divided power supply blocks is used as a power supply control block for controlling the power supply of another power supply block. advance in which block or to supply power by previously instructed dIP switch or the like, power is supplied only to the specified block, power consumption can be realized because the other blocks are not powered. Further, the power supply control block sequentially supplies power to the other power supply blocks while taking a handshake with each of the power supply blocks.
Since power is supplied in the order of ND and Vcc, it is possible to limit a transient current at the time of power supply, and it is possible to limit an IC or the like when a printed circuit board is inserted while the power of the electronic device 12 is ON. Failure can be prevented. Furthermore, since the influence on other boards in operation when the board is inserted can be eliminated, data loss due to malfunction can be prevented.

In the first embodiment, the power-on sequence circuit 3a1 receives the normal operation response signal from another block. However, after the power-on of the other block is completed, the power supply of each block is completed. Even if a handshake such as a BIT instruction / response is performed between the control I / F circuit (4a1, 5a1) and the power-on sequence circuit 3a1, the same effect can be obtained.

In the first embodiment, the function circuits 4a and 5a are provided with the power supply normality detection circuit. However, the same effect can be obtained without providing the power supply normality detection circuit. This is the same in the following embodiments.

In the first embodiment, the power-on sequence circuit 3a1 controls the relay circuits 3a2 and 3a4 to supply the GND lines to the power supply block 4 and the power supply block 5, respectively. However, even if these relay circuits are not provided and the GND line 6 and the GND line 7 and the GND line 6 and the GND line 8 are brought into conduction from the beginning, the same effect can be obtained. This is the same in the following embodiments.

In the first embodiment, the power supply is controlled by using a relay, but the same effect can be obtained by controlling the power using other components such as an electronic switch. it can. This is the same in the following embodiments.

Embodiment 2 FIG. In the first embodiment, although whether the power to the advance which blocks with respect to the power supply control is provided an instruction Power-Up block instruction circuit 3a6 DIP switch or the like, is configured number of blocks in a number In some cases, necessary functional circuits may be congested in each mode, and it may not be possible to cope with the power-on instruction alone. A method for dealing with such a case will be referred to as a second embodiment.

FIGS. 1 and 3 are views for explaining an embodiment of a printed circuit board according to the present invention. 1 and 3
The description of the reference numerals is the same as in the first embodiment. here,
A power-on mode determination circuit 3a7 is provided instead of the power-on block instruction circuit 3a6.

The operation of the second embodiment will be described below with reference to FIGS. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, a relay circuit 3a4, a relay circuit 3a5, and a power-on mode determination circuit 3a7). At this time, in advance which mode, which block with which the block power may be provided for determining the power-on mode decision circuit 3a7 whether it is necessary to supply to, will be setting the mode in advance DIP switch or the like . When power is supplied in such a state, the power-on mode determination circuit 3a7 receives the above setting and outputs a power supply instruction signal to the specified block to the power-on sequence circuit 3a1. For example, if this instruction is an instruction to turn on the power to the blocks 4 and 5, the power-on sequence circuit 3 receiving the power-on instruction signal
a1 drives the relay circuit 3a2 to make the GND line 6 and the GND line 7 conductive, and drives the relay circuit 3a3 after a short time to drive the Vcc line 9 and the Vcc line.
The line 10 is made conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if normality is detected by the power supply normality detection circuit 4a2, the power supply control I / F circuit 4a1 sends the control line 4aa to the control line 4aa. An operation normal response signal is output to the power-on sequence circuit 3a1.

When the power-on sequence circuit 3a1 receives the normal operation response signal, in this example, it receives the power supply instruction from the power-on block instruction circuit 3a6 to the blocks 4 and 5, so that the relay circuit 3a4 After a short time, the relay circuit 3a5 is driven to connect the GND line 6 to the G line.
ND line 8 is connected to Vcc line 9 and Vcc line 11
Are made conductive. As a result, the power supply block 5
Is supplied with power, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 5a3, and if the normality is detected by the power supply normality detection circuit 5a2, the power supply control I / F circuit 5a1 sends a control line 5aa to the control line 5aa. A normal operation response signal is output to the power-on sequence circuit 3a1, and when this signal is received by the power-on sequence circuit 3a1, this state is maintained.

In this example, the power-on mode determination circuit 3a
Although there was an instruction to input blocks 4 and 5 from 7, if the instruction is only for block 4, the power supply sequence to the latter block 5 will not be performed.

As described above, according to the second embodiment,
The power supply pattern of one printed circuit board is divided into a plurality, that is, a power supply block, and one of the divided power supply blocks is used as a power supply control block for controlling the power supply of another power supply block. advance in any mode, the power-on mode decision circuit 3a determines whether it is necessary to supply power to any blocks which block
7 is provided, the number of blocks is large, and even if the necessary functional circuits are congested for each mode, power is supplied only to the designated block, and power is not supplied to the other blocks. Power consumption can be realized. In addition, the power supply control block supplies power to the other power supply blocks in order, and in order of GND and Vcc, while handshaking with each power supply block. However, it is possible to limit the transient current, and it is possible to prevent a failure such as an IC when the printed circuit board is inserted while the power of the electronic device 12 is ON. Furthermore, since the influence on other boards in operation when the board is inserted can be eliminated, data loss due to malfunction can be prevented. This is the same in the following embodiments.

Embodiment 3 In the first and second embodiments, it is necessary to specify in advance by using a dip switch or the like.
In a large-scale system such as integrated control using a PU board,
It may happen that the power supply cannot be set. A method for dealing with such a case will be referred to as a third embodiment.

FIGS. 1 and 4 are views for explaining an embodiment of a printed circuit board according to the present invention. 1 and 4
The description of the reference numerals is the same as in the first embodiment. here,
A power-on determination I / F circuit 3a8 is provided instead of the power-on block instruction circuit 3a6.

The operation of the third embodiment will be described below with reference to FIGS. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, a relay circuit 3a4, a relay circuit 3a5, and a power-on determination I / F circuit 3a8). When the power is supplied, a power-on instruction signal 15 from the CPU board that integrally controls the system is input to the power-on determination I / F circuit 3a8 to instruct in real time which block is to be supplied with power. In response to this, the power-on determination I / F circuit 3a8 outputs a power supply instruction signal to the specified block to the power-on sequence circuit 3a1. For example, if this instruction is an instruction to turn on the power to the blocks 4 and 5, the power-on sequence circuit 3 receiving the power-on instruction signal
a1 drives the relay circuit 3a2 to make the GND line 6 and the GND line 7 conductive, and drives the relay circuit 3a3 after a short time to drive the Vcc line 9 and the Vcc line.
The line 10 is made conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if the normality is detected by the power supply normality detection circuit 4a2, the power supply control I / F circuit 4a1 sends the control line 4aa to the control line 4aa. An operation normal response signal is output to the power-on sequence circuit 3a1.

When the power-on sequence circuit 3a1 receives the normal operation response signal, in this example, the power-on block instruction circuit 3a6 receives an instruction to supply power to the blocks 4 and 5 from the power-on block instruction circuit 3a6. After a short time, the relay circuit 3a5 is driven to connect the GND line 6 to the G line.
ND line 8 is connected to Vcc line 9 and Vcc line 11
Are made conductive. As a result, the power supply block 5
Is supplied with power, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 5a3, and if the normality is detected by the power supply normality detection circuit 5a2, the power supply control I / F circuit 5a1 sends the control line 5aa to the control line 5aa. A normal operation response signal is output to the power-on sequence circuit 3a1, and when this signal is received by the power-on sequence circuit 3a1, this state is maintained.

In this example, the power-on determination I / F circuit 3a
Although there was an input instruction from block 8 to blocks 4 and 5, if only the block 4 was specified, the power supply sequence to the latter half block 5 would not be performed.

As described above, according to the third embodiment,
The power supply pattern of one printed circuit board is divided into a plurality, that is, a power supply block, and one of the divided power supply blocks is used as a power supply control block for controlling the power supply of another power supply block. Power-on judgment I / O that can receive in real time which block power is to be supplied from the CPU board that integrally controls the system.
Since the F circuit 3a8 is provided, even in a large-scale system in which a plurality of similar boards are used and integrated control is performed by a CPU board, power is supplied only to designated blocks.
Since power is not supplied to the other blocks, low power consumption can be realized. Also, the power supply control block sequentially supplies power to the other power supply blocks while taking a handshake with each of the power supply blocks.
Since the power is supplied in the order of c, it is possible to limit the transient current when the power is supplied, and the failure of the IC or the like occurs when the printed circuit board is inserted while the power of the electronic device 12 is ON. Can be prevented.

Embodiment 4 FIG. In addition, one functional circuit, for example, an initial setting function, etc.
After performing a certain type of data processing and completing the processing assigned to the functional circuit, there is a case where power supply is not necessary. A method for dealing with such a case will be referred to as a fourth embodiment.

FIGS. 1 and 5 are views for explaining an embodiment of a printed circuit board according to the present invention. 1 and 5
The description of the reference numerals is the same as in the first embodiment. here,
A power cutoff timer circuit 3a9 is provided.

The operation of the fourth embodiment will be described below with reference to FIGS. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, relay circuit 3a4, relay circuit 3a5, power-on mode determination circuit 3a7, power-off timer circuit 3a9)
Supplied to At this time, in advance which mode, it may be provided for determining the power-on mode decision circuit 3a7 whether it is necessary to supply power to any block and which block,
The mode is set in advance by a dip switch or the like. When power is supplied in such a state, the power-on mode determination circuit 3a7 receives the above setting and outputs a power supply instruction signal to the specified block to the power-on sequence circuit 3a1. For example, if this instruction is block 4
The power-on sequence circuit 3a1, which has received the power-on instruction signal, turns on the relay circuit 3a2 to make the GND line 6 and the GND line 7 conductive, and waits for a while. Then, the relay circuit 3a3 is driven to make the Vcc line 9 and the Vcc line 10 conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if normality is detected by the power supply normality detection circuit 4a2, the power supply control I / F circuit 4a1 uses the control line 4aa. An operation normal response signal is output to the power-on sequence circuit 3a1.

When the power-on sequence circuit 3a1 receives the normal operation response signal, in this example, since the power-on mode determining circuit 3a7 receives the power supply instruction from the power-on mode determination circuit 3a7 to the blocks 4 and 5, the relay circuit 3a4 After a short time, the relay circuit 3a5 is driven to connect the GND line 6 and the GN.
The D line 8 is brought into conduction with the Vcc line 9 and Vcc line 11. As a result, power is supplied to the power supply block 5, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 5a3, and if the normality is detected by the power supply normality detection circuit 5a2, the power supply control I / F circuit 5a1 sends the control line 5aa to the control line 5aa. A normal operation response signal is output to the power-on sequence circuit 3a1, and when this signal is received by the power-on sequence circuit 3a1, this state is maintained.

At this time, when the time for completing the processing performed by the functional circuit 4a on the power supply block 4 to which power is supplied has elapsed, the power-off timer circuit 3a9 outputs a power-off signal to the power-on sequence circuit.

When the power-on sequence circuit 3a1 receives the power-off signal, the power-on sequence circuit 3a1 first drives the relay circuit 3a3 to cut off the conduction between the Vcc line 9 and the Vcc line 10 in order to stop the power supply to the functional circuit 4a. Then, after a short time, the relay circuit 3a2 is driven to connect the GND line 6 to the G line.
The conduction with the ND line 7 is cut off. As a result,
The power supply to the power supply block 4 is cut off, and the operation of the functional circuit 4a on the block 4 stops.

At this time, when the time for completing the processing performed by the functional circuit 5a on the power supply block 5 supplied with power has elapsed, the power-off timer circuit 3a9 outputs the power-off signal again to the power-on sequence circuit. I do.

Upon receiving the operation completion signal, the power-on sequence circuit 3a1 first drives the relay circuit 3a5 to cut off the conduction between the Vcc line 9 and the Vcc line 11 in order to stop the power supply to the functional circuit 5a. Then, after a short time, the relay circuit 3a4 is driven to connect the GND line 6 to the G line.
The conduction with the ND line 8 is cut off. As a result,
The power supply to the power supply block 5 is cut off, and the operation of the functional circuit 5a on the block 5 stops.

As described above, according to the fourth embodiment,
A power cutoff timer circuit 3a9 is provided for detecting that the time for completing the processing performed by the functional circuit has elapsed. The power cutoff signal is output, the power cutoff signal is received, and the power supply to the functional circuit is cut off. Therefore, further reduction in power consumption can be realized. Also, shut off the power by Vcc, GN
Since the power supply is shut off in the order of D, it is possible to prevent the occurrence of a failure of an IC or the like on the functional circuit that shuts off the power supply.

Embodiment 5 Note that although one functional circuit performs a certain type of data processing, and the processing time assigned to the functional circuit is not constant, power supply may not be necessary after the processing is completed. A method for dealing with such a case will be referred to as a fifth embodiment.

FIGS. 1 and 6 are views for explaining an embodiment of a printed circuit board according to the present invention. 1 and 6
The description of the reference numerals is the same as in the first embodiment. here,
Processing completion detection circuits 4a4 and 5a4 are provided.

The operation of the fifth embodiment will be described below with reference to FIGS. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, a relay circuit 3a4, a relay circuit 3a5, and a power-on mode determination circuit 3a7). At this time, in advance which mode, which block with which the block power may be provided for determining the power-on mode decision circuit 3a7 whether it is necessary to supply to, will be setting the mode in advance DIP switch or the like . When power is supplied in such a state, the power-on mode determination circuit 3a7 receives the above setting and outputs a power supply instruction signal to the specified block to the power-on sequence circuit 3a1. For example, if this instruction is an instruction to turn on the power to the blocks 4 and 5, the power-on sequence circuit 3 receiving the power-on instruction signal
a1 drives the relay circuit 3a2 to make the GND line 6 and the GND line 7 conductive, and drives the relay circuit 3a3 after a short time to drive the Vcc line 9 and the Vcc line.
The line 10 is made conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if normality is detected by the power supply normality detection circuit 4a2, the power supply control I / F circuit 4a1 sends the control line 4aa to the control line 4aa. An operation normal response signal is output to the power-on sequence circuit 3a1.

When the power-on sequence circuit 3a1 receives the normal operation response signal, in this example, it receives the power supply instruction from the power-on mode determination circuit 3a7 to the blocks 4 and 5, so that the relay circuit 3a4 After a short time, the relay circuit 3a5 is driven to connect the GND line 6 and the GN.
The D line 8 is brought into conduction with the Vcc line 9 and Vcc line 11. As a result, power is supplied to the power supply block 5, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is carried out by a built-in test of the data processing circuit 5a3, and if the normality is detected by the power supply normality detection circuit 5a2, the power supply control I / F circuit 5a1 controls the control line 5aa. A normal operation response signal is output to the power-on sequence circuit 3a1, and when this signal is received by the power-on sequence circuit 3a1, this state is maintained.

At this time, when the processing performed by the functional circuit 4a on the power supply block 4 to which power is supplied is completed by the data processing circuit 4a3, the processing completion detection circuit 4a4
Detects the completion of the process, and at the same time, by the control line 4ab,
An operation completion signal is output to power-on sequence circuit 3a1.

When the power-on sequence circuit 3a1 receives the operation completion signal, it first drives the relay circuit 3a3 to cut off the conduction between the Vcc line 9 and the Vcc line 10 in order to stop the power supply to the functional circuit 4a. Then, after a short time, the relay circuit 3a2 is driven to connect the GND line 6 to the G line.
The conduction with the ND line 7 is cut off. As a result,
The power supply to the power supply block 4 is cut off, and the operation of the functional circuit 4a on the block 4 stops.

At this time, when the data processing circuit 5a3 completes the processing performed by the functional circuit 5a on the power supply block 5 to which power is supplied, the processing completion detection circuit 5
a4 detects the completion of the processing, and at the same time, outputs an operation completion signal to the power-on sequence circuit 3a1 via the control line 5ab.

When the power-on sequence circuit 3a1 receives the operation completion signal, the power-on sequence circuit 3a1 first drives the relay circuit 3a5 to cut off the conduction between the Vcc line 9 and the Vcc line 11 to stop the power supply to the functional circuit 5a. Then, after a short time, the relay circuit 3a4 is driven to connect the GND line 6 to the G line.
The conduction with the ND line 8 is cut off. As a result,
The power supply to the power supply block 5 is cut off, and the operation of the functional circuit 5a on the block 5 stops.

As described above, according to the fifth embodiment,
Since the processing completion detection circuits 4a4 and 5a4 for detecting completion of the processing performed by the functional circuit are provided, the processing completion signal is output, and the power supply to the functional circuit is cut off upon receiving the processing completion signal. And further lower power consumption can be realized. In addition, since the power supply is cut off in the order of Vcc and GND, it is possible to prevent the occurrence of a failure of an IC or the like on a functional circuit that cuts off the power supply.

Embodiment 6 FIG. In a system in which the sequence of power-on and power-off is repeatedly performed, power is supplied to the functional circuit in accordance with the sequence, and when the processing is completed, the power to the functional circuit is turned off. By repeatedly performing such operations, further reduction in power consumption of the entire system can be expected. A method for dealing with such a case will be referred to as a sixth embodiment.

FIGS. 1 and 7 are views for explaining an embodiment of a printed circuit board according to the present invention. 1 and 7
The description of the reference numerals is the same as in the first embodiment. here,
Power on / off sequence determination circuit 3a10, power supply normal / processing completion detection circuit 4a5, 5a5, and power supply / processing I
/ F circuits 4a6, 5a6 are provided.

Hereinafter, the operation of the sixth embodiment will be described with reference to FIGS. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, a relay circuit 3a4, a relay circuit 3a5, and a power on / off sequence determination circuit 3a10). At this time, a power-on / off sequence determination circuit 3a10 is provided, and the mode is set in advance by a dip switch or the like. When power is supplied in such a state, the power-on / off sequence determination circuit 3a10 receives the above setting and outputs a power supply instruction signal to the specified block to the power-on sequence circuit 3a1. For example, if this instruction is an instruction to turn on the power to the blocks 4 and 5, the power-on sequence circuit 3 receiving the power-on instruction signal
a1 drives the relay circuit 3a2 to make the GND line 6 and the GND line 7 conductive, and drives the relay circuit 3a3 after a short time to drive the Vcc line 9 and the Vcc line.
The line 10 is made conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if normality is detected by the power supply normal / processing completion detection circuit 4a5, control is performed from the power supply / processing I / F circuit 4a6. Line 4ac
As a result, an operation normal response signal is output to the power on / off sequence determination circuit 3a10.

Power on / off sequence determination circuit 3a1
In response to the normal operation response signal, since the power supply instruction signal 0 has received the power supply instruction to the blocks 4 and 5 in this example, it outputs a power-on continuation instruction signal to the power-on sequence circuit 3a1.
The power-on sequence circuit 3a1 is connected to the relay circuit 3a
4 and after a short time drive the relay circuit 3a5,
GND line 6 and GND line 8 are connected to Vcc line 9
And Vcc line 11 are made conductive. As a result,
Power is supplied to the power supply block 5, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is performed by the built-in test of the data processing circuit 5a3, and if normality is detected by the power supply normal / processing completion detection circuit 5a5, control is performed from the power supply / processing I / F circuit 5a6. Line 5ac
As a result, an operation normal response signal is output to the power on / off sequence determination circuit 3a10.

Power on / off sequence determination circuit 3a1
When 0 receives the normal operation response signal, it holds this state when this signal is received.

At this time, when the data processing circuit 4a3 completes the processing performed by the functional circuit 4a on the power supply block 4 to which power is supplied, the normal power supply / processing completion detection circuit 4a5 detects the processing completion. An operation completion signal is output from the power supply / processing I / F circuit 4a6 to the power on / off sequence determination circuit 3a10 via the control line 4ac.

Power on / off sequence determination circuit 3a1
0, upon receiving the operation completion signal, outputs a power-off instruction signal to the power-on sequence circuit 3a1. The power-on sequence circuit first drives the relay circuit 3a3 to stop the power supply to the functional circuit 4a,
And the Vcc line 10 is disconnected, and after a short time, the relay circuit 3a2 is driven to drive the GND line 6 and GND.
The conduction with the line 7 is cut off. As a result, the power supply to the power supply block 4 is cut off, and the operation of the functional circuit 4a on the block 4 stops.

At this time, when the data processing circuit 5a3 completes the processing of the functional circuit 5a on the power supply block 5 to which power is supplied, the normal power supply / processing completion detection circuit 5a5 detects the processing completion. , Power supply / processing I / F
An operation completion signal is output from the circuit 5a6 to the power on / off sequence determination circuit 3a10 via the control line 5ac.

Power on / off sequence determination circuit 3a1
0, upon receiving the operation completion signal, outputs a power-off instruction signal to the power-on sequence circuit 3a1. The power-on sequence circuit first drives the relay circuit 3a5 to stop the power supply to the functional circuit 5a,
And the Vcc line 11 is disconnected, and after a short time, the relay circuit 3a4 is driven to drive the GND line 6 and the GND line.
The conduction with the line 8 is cut off. As a result, the power supply to the power supply block 5 is cut off, and the operation of the functional circuit 5a on the block 5 stops.

Power on / off sequence determination circuit 3a1
In the case of “0”, the power-on sequence for the functional circuits 4 a and 5 a is again entered according to the power-on / off sequence of the functional circuits in advance, and this sequence is repeated.

As described above, according to the sixth embodiment,
A power-on / off sequence determination circuit 3a10 is provided to detect that the processing performed by the functional circuit has been completed. Upon receiving the processing completion signal, the power supply to the functional circuit is interrupted. Since the supply is repeated, further lower power consumption can be realized. In addition, since the power supply is cut off in the order of Vcc and GND, it is possible to prevent the occurrence of a failure of an IC or the like on a functional circuit that cuts off the power supply.

Embodiment 7 FIG. It should be noted that the power is turned on only to the functional circuit that is to be processed in the entire system, and when the processing is completed, the power to the functional circuit is shut off, and when necessary, the power is again supplied. Then, further lower power consumption of the entire system can be expected. A method for dealing with such a case will be referred to as a seventh embodiment.

FIGS. 1 and 8 are views for explaining an embodiment of a printed circuit board according to the present invention. 1 and 8
The description of the reference numerals is the same as in the first embodiment. here,
A power on / off determination I / F circuit 3a11 is provided.

Hereinafter, the operation of the seventh embodiment will be described with reference to FIGS. 1 and 8. When the connector 2 of the printed circuit board 1 is inserted into the connector 13 of the electronic device 12, the power is supplied from the electronic device 12 to the GND line 6,
The power supply block 3 (power-on sequence circuit 3a1, relay circuit 3a2, relay circuit 3
a3, a relay circuit 3a4, a relay circuit 3a5, and a power on / off determination I / F circuit 3a11). When power is supplied, a power-on instruction signal 15 from a CPU board that integrally controls the system outputs a power-on / off judgment I / O.
It is input to the F circuit 3a11, and is instructed in real time which block is to be supplied with power. In response to this, the power on / off determination I / F circuit 3a11 outputs a power supply instruction signal to the specified block to the power on sequence circuit 3a1. For example, when this instruction is performed in blocks 4 and 5
When the power-up sequence circuit 3a1 receives the power-supply instruction signal, the power-up sequence circuit 3a1 first activates the relay circuit 3a2.
Is driven to make the GND line 6 and the GND line 7 conductive, and after a short time, the relay circuit 2 (3a3) is driven to make the Vcc line 9 and the Vcc line 10 conductive. As a result, power is supplied to the power supply block 4, and the functional circuit 4a on the block 4 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 4a3, and if normality is detected by the power supply normal / processing completion detection circuit 4a5, control is performed from the power supply / processing I / F circuit 4a6. Line 4ac
As a result, an operation normal response signal is output to the power on / off determination I / F circuit 3a11.

Power ON / OFF determination I / F circuit 3a11
When receiving the normal operation response signal, in this example, since it has received the power supply instruction to the blocks 4 and 5, it outputs a power-on continuation instruction signal to the power-on sequence circuit 3a1. The power-on sequence circuit 3a1 is connected to the relay circuit 3a4.
After a short time, the relay circuit 3a5 is driven to
The ND line 6 and the GND line 8 are made conductive, and the Vcc line 9 and the Vcc line 11 are made conductive. As a result, power is supplied to the power supply block 5, and the functional circuit 5a on the block 5 operates.

At this time, an internal operation state confirmation test is performed by a built-in test of the data processing circuit 5a3, and if normality is detected by the power supply normal / processing completion detection circuit 5a5, control is performed from the power supply / processing I / F circuit 5a6. Line 5ac
As a result, an operation normal response signal is output to the power on / off determination I / F circuit 3a11.

Power ON / OFF determination I / F circuit 3a11
Receives this normal operation response signal, and holds this state upon receipt of this signal.

At this time, when the processing performed by the functional circuit 4a on the power supply block 4 to which power is supplied is completed by the data processing circuit 4a3, the normal power supply / processing completion detection circuit 4a5 detects the completion of the processing. An operation completion signal is output from the power supply / processing I / F circuit 4a6 to the power supply on / off determination I / F circuit 3a11 via the control line 4ac.

Power ON / OFF determination I / F circuit 3a11
Receives the operation completion signal, outputs a power-off instruction signal to the power-on sequence circuit 3a1, and also outputs an operation completion signal to the CPU board that integrally controls the system. In order to stop the power supply to the functional circuit 4a, the power-on sequence circuit first drives the relay circuit 3a3 to cut off the continuity between the Vcc line 9 and the Vcc line 10, and after a short time, turns off the relay circuit 3a2. Driving is performed to interrupt the conduction between the GND line 6 and the GND line 7. As a result, the power supply to the power supply block 4 is cut off, and the operation of the functional circuit 4a on the block 4 stops.

At this time, when the data processing circuit 5a3 completes the processing performed by the functional circuit 5a on the power supply block 5 to which power is supplied, the normal power supply / processing completion detection circuit 5a5 detects the processing completion. , Power supply / processing I / F
An operation completion signal is output from the circuit 5a6 to the power on / off determination I / F circuit 3a11 via the control line 5ac.

Power ON / OFF determination I / F circuit 3a11
Receives the operation completion signal, outputs a power-off instruction signal to the power-on sequence circuit 3a1, and also outputs an operation completion signal to the CPU board that integrally controls the system. The power-on sequence circuit 3a1 first stops the relay circuit 3a to stop the power supply to the functional circuit 5a.
By driving a5, the conduction between the Vcc line 9 and the Vcc line 11 is cut off, and after a short time, the relay circuit 3a4 is driven to cut off the conduction between the GND line 6 and the GND line 8. As a result, the power supply to the power supply block 5 is cut off, and the operation of the functional circuit 5a on the block 5 stops.

Power ON / OFF determination I / F circuit 3a11
Waits for the input of the power-on instruction signal 15 from the CPU board for integrated control of the system again, and starts the power-on sequence again if there is an instruction.

As described above, according to the seventh embodiment,
A power-on / off determination I / F circuit 3a11 is provided to detect completion of processing performed by the functional circuit,
Since the processing completion is also notified to the CPU board that integrally controls the system, the power is turned on only when necessary by receiving a power-on instruction again from the CPU board, and the power supply is cut off when the processing is completed. Therefore, further lower power consumption can be realized. In addition, the power supply
Since the power is cut off in the order of cc, GND,
Failure of an IC or the like on a functional circuit that shuts off power can be prevented.

[0094]

As described above, in the printed circuit board according to the present invention, the power supply pattern of one printed circuit board is divided into a plurality of power supply blocks, that is, one of the plurality of divided power supply blocks is used as a power supply block. as the power supply control block for controlling the power supply of the other power supply block, by previously whether to supply power to the advance which blocks indicated by a dip switch or the like, power is supplied only to the specified block Since no power is supplied to the other blocks, low power consumption can be realized. In addition, the power supply control block supplies power to the other power supply blocks in order, and in order of GND and Vcc, while handshaking with each power supply block. However, it is possible to limit the transient current, and it is possible to prevent the occurrence of a failure such as an IC when the printed circuit board is inserted while the power of the electronic device is ON. Furthermore, since the influence on other boards in operation when the board is inserted can be eliminated, data loss due to malfunction can be prevented.

Further, the power supply pattern of one printed circuit board is divided into a plurality of power supply blocks, that is, a power supply block, and one of the plurality of divided power supply blocks is used as a power supply for controlling the power supply of another power supply block. as a supply control block, in advance which mode, since any block in which block a is provided with a power-on mode determination circuit for determining whether it is necessary to supply the power, it is configured number of blocks in a number, for each mode Even when the necessary functional circuits are congested, power is supplied only to the designated block and power is not supplied to the other blocks, so that power consumption can be reduced. Also, the power supply control block sequentially supplies power to the other power supply blocks while taking a handshake with each of the power supply blocks, to GND and Vcc.
Power supply in this order, it is possible to limit the transient current at the time of power supply, and to insert the printed circuit board when the power supply of the electronic device is ON.
And other troubles can be prevented.

Further, the power supply pattern of one printed circuit board is divided into a plurality of power supply blocks, ie, a power supply block, and one of the plurality of divided power supply blocks is used as a power supply for controlling the power supply of another power supply block. As a supply control block, a power-on determination I / F circuit capable of receiving in real time which block is to be supplied with power from a CPU board that integrally controls the system is provided. Even in a large-scale system in which integrated control is performed by a board, power is supplied only to designated blocks, and power is not supplied to other blocks, so that power consumption can be reduced. In addition, the power supply control block supplies power to the other power supply blocks in order of GND and Vcc while taking a handshake with each power supply block.
It is possible to limit a transient current when supplying power, and it is possible to prevent a failure of an IC or the like when a printed circuit board is inserted while the power of the electronic device is ON.

Further, a power cutoff timer circuit 3a9 is provided for detecting the elapse of time when the processing performed by the functional circuit is completed, outputs a power cutoff signal, receives the power cutoff signal, and supplies power to the functional circuit. , The power consumption can be further reduced. In addition, since the power supply is cut off in the order of Vcc and GND, it is possible to prevent the occurrence of a failure of an IC or the like on a functional circuit that cuts off the power supply.

Further, a processing completion detection circuit for detecting that the processing performed by the functional circuit has been completed is provided to output a processing completion signal, receive the processing completion signal, and cut off the power supply to the functional circuit. Therefore, further reduction in power consumption can be realized. In addition, since the power supply is cut off in the order of Vcc and GND, it is possible to prevent the occurrence of a failure of an IC or the like on a functional circuit that cuts off the power supply.

A power-on / off sequence determination circuit is provided to detect the completion of the processing performed by the functional circuit. Upon receiving the processing completion signal, the power supply to the functional circuit is cut off. Therefore, the power supply is repeated again, so that further lower power consumption can be realized. Also, shut off the power by Vcc, GN
Since the power supply is shut off in the order of D, it is possible to prevent the occurrence of a failure of an IC or the like on the functional circuit that shuts off the power supply.

Further, a power ON / OFF determination I / F circuit is provided to detect the completion of the processing performed by the functional circuit, and to notify the CPU board which integrally controls the system of the processing completion. By receiving the power-on instruction again from the board, the power can be turned on only when necessary, and the power supply can be cut off when the processing is completed, so that further lower power consumption can be realized. In addition, since the power supply is cut off in the order of Vcc and GND, it is possible to prevent the occurrence of a failure of an IC or the like on a functional circuit that cuts off the power supply.

[Brief description of the drawings]

FIG. 1 is a first embodiment of a printed circuit board according to the present invention;
FIG. 3 is a diagram showing a configuration in FIG.

FIG. 2 is a detailed configuration diagram of a printed circuit board according to the first embodiment.

FIG. 3 is a second embodiment of a printed circuit board according to the present invention;
FIG.

FIG. 4 is a printed circuit board according to a third embodiment of the present invention;
FIG.

FIG. 5 is a fourth embodiment of a printed circuit board according to the present invention;
FIG.

FIG. 6 is a printed circuit board according to a fifth embodiment of the present invention;
FIG.

FIG. 7 is a printed circuit board according to a sixth embodiment of the present invention;
FIG.

FIG. 8 is a printed circuit board according to a seventh embodiment of the present invention;
FIG.

FIG. 9 is a diagram showing a configuration of a conventional printed circuit board.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Printed circuit board, 2 connector part, 3 power supply block, 3a functional circuit, 3a1 power-on sequence circuit, 3a2 relay circuit, 3a3 relay circuit, 3a4
Relay circuit, 3a5 relay circuit, 3a6 power-on block instruction circuit, 3a7 power-on mode determination circuit,
3a8 Power-on determination I / F circuit, 3a9 Power-off timer circuit, 3a10 Power-on / off sequence determination circuit, 3a11 Power-on / off determination I / F circuit, 4
Power supply block, 4a function circuit, 4a1 power control I / F circuit, 4a2 normal power detection circuit, 4a3 data processing circuit, 4a4 processing completion detection circuit, 4a5 normal power / processing completion detection circuit, 4a6 power / processing I / F circuit 5, power supply block, 5a functional circuit, 5a1
Power supply control I / F circuit, 5a2 Power supply normality detection circuit, 5a2
a3 data processing circuit, 5a4 processing completion detection circuit, 5
a5 power supply normal / processing completion detection circuit, 5a6 power supply / processing I / F circuit, 12 electronic equipment, 13 electronic equipment side connector, 23a functional circuit, 23a1 power-on sequence circuit, 23a2 relay circuit, 23a3 relay circuit, 2
3a4 relay circuit, 23a5 relay circuit, 24a
Function circuit, 24a1 Power supply control I / F circuit, 24a2
Power supply normal detection circuit, 24a3 data processing circuit, 25a
Function circuit, 25a1 Power supply control I / F circuit, 25a2
Power supply normal detection circuit, 25a3 data processing circuit.

Claims (7)

[Claims] A circuit on a printed circuit board is divided in advance into a plurality of blocks each of which is independently supplied with power for each functional unit, and a power supply from outside is provided in the plurality of blocks. A printed circuit board, wherein a power supply control means for supplying power to only a block in which a circuit for realizing a required function among other blocks is mounted is provided in one block. 2. A circuit for judging which block needs to be supplied with power in a certain state is provided in a first block of the plurality of blocks which receives supply of power from the outside. A printed circuit board according to claim 1. 3. The printed circuit board according to claim 2, wherein said judgment circuit is constituted by a program control means which starts up in response to an external control signal. 4. When a certain period of time has elapsed after the other block has been supplied with power, a first block of the plurality of blocks, which is supplied with power from the outside, supplies power to the corresponding block. 2. The printed circuit board according to claim 1, further comprising a power cutoff control unit for cutting off the power. 5. The another block, further comprising a detecting unit for detecting that a series of data processing or the like has been completed after receiving the power supply, wherein the other block receives an external power supply from among the plurality of blocks. 5. The printed circuit board according to claim 4, further comprising a power cutoff control unit that cuts off power supply to a corresponding block when one block receives the processing completion signal. 6. A first block of the plurality of blocks, which receives power supply from outside, is provided with power-on / off control means for repeating power-on and power-off to a corresponding block according to a sequence. The printed circuit board according to claim 1. 7. The printed circuit board according to claim 6, wherein said power-on / off control is implemented by a program control means which is activated by receiving a control signal from the outside.