JP2001074819A - Microcontroller, multi-chip package type semiconductor device, and its test device and test method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To simply conduct a test with a small number of test terminals of an MPU(microcontroller). SOLUTION: A DUT 11 (two-in-one type MCP(multi-chip package)) is constituted by storing an MCU chip 20, equipped with a main program ROM 201, a test ROM 202 stored with a test program sequence, and a self-test circuit 203 for checking the adequacy of the contents and output of the main program ROM according to the test program sequence, and an IC chip 21 for television in the same package and connecting them together. In this test method, the DUT 11 is mounted on the 1st socket of the test head part 13 of an analog tester, an MCU 12 for test control is mounted on the 2nd socket, and a test instruction is sent to the self-test circuit in the MCU chip 20 in the DUT, so that an MCU for test control receives the test result of the self-test circuit and decides whether or not the test result is good or not.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a microcontroller (MCU), a multi-chip package (MCP) type semiconductor device using the same, a test apparatus therefor, and a test method, and more particularly to facilitating general-purpose testing of an MCU. For example, the present invention is applied to an MCP type semiconductor device in which an analog signal IC chip and an MCU chip are housed in the same package and interconnected, and to a test thereof.

[0002]

2. Description of the Related Art FIG. 6 shows a terminal 61 for inputting a test mode setting required for testing a conventional MCU 60, a terminal 62 for inputting an MCU operation command, and a terminal 63 for monitor output for detecting the state of an internal bus. A test mode setting circuit (not shown) connected to the test mode setting input terminal 61 is provided inside the MCU 60.

However, it is not preferable to require many test terminals 61, 62 and 63, and it has not been possible to realize the MCU with the number of terminals less than the number of test terminals.

An OTP type MCU incorporating a semiconductor memory (for example, an ultraviolet erasable programmable read only memory; EPROM) which can be written only once (one-time programmable, OTP). When there are not enough terminals for writing with a PROM writer, a special circuit must be provided for an adapter socket used for writing with a PROM writer, which complicates the configuration.

A two-in-one type MCP in which an IC chip for analog signals (for example, for television) and an MCU chip are housed and connected in the same package is connected to a DUT.
Conventionally, the user has connected to an application product and performed an actual device test.

[0006] If a chip maker uses a high-performance analog tester, the 2-in-1 DUT
To perform a general-purpose test of an MCU, a DUT is mounted on a socket on a test board in a test head unit. However, since an analog tester having a high function is generally expensive, the test cost of the MCP increases. MC
The production cost of P increases.

[0007]

As described above, the conventional MCU and the MCP using the same require a large number of test terminals on the MCU, and the terminal for writing to the PROM built in the MCU with a general-purpose PROM writer is required. If the number is insufficient, the configuration becomes complicated, and there is a problem that if a chip manufacturer performs a general-purpose test of the MCU, the test cost increases.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to provide a microcontroller that requires a small number of test terminals and can easily perform a test.

Another object of the present invention is to make it possible to easily write data into a PROM built in the microcontroller even when a general-purpose PROM writer has insufficient terminals when the microcontroller of the present invention is used. It is an object of the present invention to provide a multi-chip package type semiconductor device which becomes possible.

Another object of the present invention is to simplify the tester function and reduce the tester price when performing a general-purpose test of a microcontroller in the multi-chip package type semiconductor device of the present invention on the chip maker side. An object of the present invention is to provide a test device and a test method for a multi-chip package type semiconductor device that can reduce test cost.

[0011]

A first microcontroller of the present invention comprises a main program ROM, a test ROM storing a test program sequence, and the contents of the main program ROM based on the test program sequence. And a self-test circuit for checking the validity of the output.

[0012] A second microcontroller of the present invention comprises:
A main program ROM, a test ROM storing a test program sequence, a one-time programmable read-only memory, and the main program RO based on the test program sequence.
A self-test circuit for checking the contents of M and the validity of the output.

A first multi-chip package type semiconductor device according to the present invention includes a first microcontroller according to the present invention and an analog signal IC housed and connected in the same package as the first microcontroller. It is characterized by having.

A second multi-chip package type semiconductor device according to the present invention includes the second microcontroller according to the present invention and an analog signal IC housed and connected in the same package as the second microcontroller. It is characterized by having.

A first multi-chip package type semiconductor device test apparatus of the present invention is for mounting the first multi-chip package type semiconductor device or the second multi-chip package type semiconductor device of the present invention as a test device. A first socket; a second socket for mounting a microcontroller for test control;
And a test head section of a tester for mounting the two sockets and electrically connecting the two sockets to each other.

A second multi-chip package type semiconductor device test apparatus according to the present invention comprises a first socket for mounting the second multi-chip package type semiconductor device according to the present invention as a test device, and a test control device. A second socket for mounting a microcontroller, and the two sockets are mounted, and the two sockets are electrically connected so that data can be transferred between the two sockets via signal wiring of a predetermined bus standard. And a test head section of a tester to be connected.

According to the first method for testing a multi-chip package type semiconductor device of the present invention, the first multi-chip package type semiconductor device of the present invention or the second Mounting a multi-chip package type semiconductor device as a test device; and mounting a microcontroller for test control in a second socket provided in the test head unit and electrically connected to the first socket. Sending a test command to a self-test circuit in a microcontroller in the first or second multi-chip package type semiconductor device, receiving a test result from the self-test circuit in the microcontroller for test control, and outputting a test result. And a step of judging the quality of the To.

According to a second method for testing a multi-chip package type semiconductor device of the present invention, the second multi-chip package type semiconductor device of the present invention is used as a test device in a first socket provided in a test head of a tester. Mounting, and a second socket provided in the test head portion and electrically connected to the first socket so that data can be transmitted / received via signal wiring of a predetermined bus standard. Mounting a microcontroller for test control to the microcontroller in the multichip package type semiconductor device via the signal wiring from the test control microcontroller to the one-time programmable read only memory. Transferring data.

[0019]

Embodiments of the present invention will be described below in detail with reference to the drawings.

FIG. 1 shows a two-in-one type MCP in which an MCU chip according to a first embodiment of the present invention is housed and connected in the same package as an analog signal IC chip.
1 schematically shows a system configuration for performing the test of FIG.

In FIG. 1, reference numeral 11 denotes a DUT, 12 denotes an MCU for test control, and 13 denotes a test head of an analog tester.

As shown in FIG. 2, the DUT 11 has an MC
This is a 2-in-1 type MCP in which a U chip 20 and, for example, a television IC chip 21 are housed and connected in the same package.

The MCU chip 20 includes, in addition to the normal main program ROM 201, a test ROM 202 storing a test program sequence and the main program ROM based on the test program sequence.
It has a built-in self-test circuit 203 for performing output monitoring and error correction for checking the contents of the OM and the validity of the output.

As shown in FIG. 3, the test head unit 11 has a first socket 31 for mounting the DUT 11,
A second socket 32 for mounting the MCU 12 for test control is provided, and these two sockets 31,
32 is electrically connected. In this case, the test control MCU 12 is a reference MCU whose performance including an operation margin is guaranteed by a single test.
Also, the MCU chip 20 in the DUT 11 and the M
The CU 12 can transmit and receive data (transmit and receive) via, for example, an I ² C standard signal wiring 33.

The first socket 31 and the second socket 32 are each electrically connected to the tester via an interface (14 in FIG. 1).

Next, a method of testing the DUT 11 composed of the above-mentioned 2-in-1 type MCP will be described.

The tester instructs the DUT 11 and the MCU 12 for test control of the test content, or the MCU 12 for test control instructs the DUT 11 and the tester of the test content. In this case, MCU12 for test control
Alternatively, the tester receives a request for measurement preparation and
Make a response such as busy.

The result of the self-test using the self-test circuit 203 in the MCU chip 20 of the DUT 11 is checked by the test control MCU 12 for pass / fail. On the analog tester side, D
The test of the DC characteristics of the MCU chip 20 in the UT 11 and the test of the functional characteristics of the analog signal IC chip 21 are shared.

As described above, the MCU chip in the DUT 11
20 has a self-test circuit 203 built-in,
According to the method of performing a test in a state where the CU chip 20 and the test control MCU 12 are electrically connected, a general-purpose test can be performed on the MCU chip 20 in the DUT 11 on the chip maker side.

Therefore, on the chip maker side,
An inexpensive low-function analog tester whose main purpose is to test the function of the analog signal IC chip 21 can be used, and the test cost can be reduced.

By rewriting the test program sequence stored in the test ROM 202, it becomes easy to add or reduce the contents of the self test of the DUT 11.

When a one-time type EPROM is stored in the MCU chip 20, an MCU for test control is provided.
12 from the DUT 11 via the signal wiring 33 of the I ² C standard.
The write data is transferred to the CU chip 20 and the MCU chip
It is possible to perform desired writing to the one-time type EPROM in 20. That is, writing to the one-time type EPROM in the MCU chip 20 can be realized without using a PROM writer, and writing can be performed even if the number of terminals of the MCU chip 20 is small.

In the case where a one-time type EPROM is stored in the test control MCU 12, when the chip maker performs desired writing to the one-time type EPROM built in the test control MCU 12, The test control MCU 12 is regarded as a DUT, and writing can be performed from a separately prepared reference MCU via the signal wiring 33.

FIG. 4 is a flow chart showing an example of a method for writing data in a one-time type EPROM built in the MCU 12 for test control.

In FIG. 4, in step S1, the OTP
A type MCU (microcomputer) is inserted into a normal PROM adapter socket, and writing is performed by a general-purpose PROM writer for this OTP type microcomputer in the same manner as for a normal single OTP type microcomputer.

In this case, the OTP type microcomputer is a two-in-one type OT which is a final writing target.
As long as the ROM size and configuration are the same as those of the P-type microcomputer (microcomputer for test control), it is not always necessary to use the 2-in-1 type.

Next, in step S2, step S
OTP-type microcomputer written in 1, that is, an already-written OTP-type microcomputer and an unwritten 2-in-1 type OTP-type microcomputer to be finally written, for a 2-in-1 OTP-type microcomputer Insert into the adapter socket. Then, the microcomputers are reset, the microcomputers are set to a PROM write mode, and data is transferred from a written OTP type microcomputer to an unwritten 2-in-1 OTP type microcomputer via the adapter socket. . Thereby, the unwritten 2-in-1 type OT
Each time the P-type microcomputer receives data from the written OTP-type microcomputer, it writes the data into the PROM.

At this time, the adapter socket supplies the write voltage Vpp to the unwritten 2-in-1 OTP type microcomputer, and transmits data between the microcomputers via, for example, I ² C standard signal wiring. It is configured to give and receive.

FIG. 5 is a diagram showing a final test (F / T) and a sampling test (Kuraken) from the manufacture of the 2-in-1 type OTP type microcomputer according to the present invention on the chip maker side.
Is a flowchart showing an example of the overall flow up to the point where the process is performed.

That is, after the wafer process of the mask plate microcomputer, die sort (D / S) is performed using a logic tester.
Test and split into individual pellets (chips).

Similarly, after the wafer process of the analog signal IC, a die sort test is performed using an analog tester for a signal die sort, and the resultant is divided into individual pellets.

Then, a non-defective pellet of the microcomputer and a non-defective pellet of the analog signal IC are assembled and
Implement an in-one type MCP.

On the other hand, after a wafer process of an OTP type microcomputer incorporating an OTP type PROM, a die sort test is performed using a logic tester to divide the pellet into individual pellets. Then, non-defective pellets are individually assembled and packaged, and used for testing, emulator,
The product is commercialized for PROM writing, and a preliminary test (Pre F / T) test using a logic tester is performed to select a sample microcomputer for which the performance is guaranteed including the operation margin.

Then, as described above in step S1 in FIG. 4, the general-purpose PROM writer writes data to the sample microcomputer as described above in step S1 of FIG.

Next, the O written in step S1 is written.
The TP-type microcomputer is inserted into the adapter socket for the 2-in-1 OTP-type microcomputer in the test head together with the 2-in-1 MCP as a written OTP-type microcomputer. Then, a final test test and a sampling test of the 2-in-1 OTP type microcomputer are performed by using the analog tester for the signal system final test and the sampling test by the method described above with reference to FIG.

As described above, the MCU of the present invention checks the contents of the main program ROM of the MCU chip and the validity of the output based on the test ROM storing the test program sequence and the test program sequence. Built-in self-test circuit that monitors output and corrects errors.

The test head of the analog tester is provided with a socket for mounting an MCU for test control separately from a socket for mounting the MCU of the present invention and an MPC including an analog signal IC as a DUT. In advance, these two sockets are electrically connected.

Then, the test control MCU or the tester instructs the DUT about the contents of the test, and the MUT of the DUT.
The result of the self-test using the self-test circuit in the CU is checked by the test control MCU for pass / fail. On the analog tester side, tests the functional characteristics of the IC chip for analog signals in the DUT and the MCU in the DUT
Test of DC characteristics.

As described above, since a general-purpose test can be performed on the MCU in the MPC on the chip maker side, the analog signal I / O in the MPC can be performed.
For C, it is possible to perform a test using a low-function analog tester, and it is possible to reduce the test cost.

By rewriting the test program sequence, it is easy to add or reduce the content of self-test of the MCU in the DUT.

Also, for example, from the MCU for test control,
By writing to the one-time type PROM in MCU chip via the signal lines ² C bus standard, MC
Even when the number of terminals of U is small, writing to the one-time type PROM can be performed without any trouble.

When writing to the one-time type PROM built in the MCU for test control on the chip maker side, it is necessary to consider this as a DUT and write from the reference MCU separately prepared. Thus, writing can be performed without any trouble even when the number of terminals of the MCU is small.

[0053]

As described above, according to the MCU of the present invention, the number of test terminals is small, and the test can be easily performed.

Further, the MCP type semiconductor device of the present invention can easily write data into the PROM in the MCU even when the general-purpose PROM writer has insufficient terminals when the MCU of the present invention is incorporated.

Further, the test apparatus and the test method of the MCP type semiconductor device of the present invention can be easily performed even when the terminal for writing to the PROM in the MCU in the MCP type semiconductor device by the general-purpose PROM writer is insufficient. Writing can be performed, so that the tester function can be simplified even when testing is performed on the chip maker side, and the tester cost can be reduced, and the test cost can be reduced.

[Brief description of the drawings]

FIG. 1 shows a system configuration for performing a test of a 2-in-1 type MCP in which an MCU chip according to a first embodiment of the present invention is housed and connected in the same package as an analog signal IC chip. FIG.

2 is a 2-in-1 type MCP which is a DUT in FIG. 1;
FIG. 2 is a plan view showing a state in which an MCU chip and a television IC chip are stored in FIG.

3 is a plan view showing a state in which a test head of the analog tester in FIG. 1 is taken out and a first socket for mounting a DUT and a second socket for mounting an MCU for test control are electrically connected; FIG.

FIG. 4 is a flowchart showing an example of a method of writing data into a one-time type PROM built in the MCU for test control in FIG. 1;

FIG. 5 is a flowchart showing an example of the overall flow on the chip maker side from the production of the 2-in-1 OTP type microcomputer according to the present invention to the final test and the sampling test.

FIG. 6 is a plan view showing a terminal for inputting a test mode setting, a terminal for inputting an MCU operation command, and a terminal for monitor output for detecting a state of an internal bus in a conventional MCU.

[Explanation of symbols]

 11: DUT (2-in-1 type MCP), 12: MCU for test control, 13: Test head of analog tester, 20: MCU chip, 21: IC chip for television, 201: Main program ROM, 202: Test ROM, 203 self-test circuit, 31 first socket, 32 second socket, 33 signal wiring.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2G032 AA08 AA09 AJ07 AK19 5B048 AA14 CC11 DD10 9A001 BB05 LL05

Claims (7)

[Claims] 1. A test program ROM storing a main program ROM and a test program sequence.
A microcontroller comprising: M; and a self-test circuit for checking the validity of the contents and output of the main program ROM based on the test program sequence. 2. A main program ROM, a one-time programmable read-only memory, and a test RO storing a test program sequence.
A microcontroller comprising: M; and a self-test circuit for checking the validity of the contents and output of the main program ROM based on the test program sequence. 3. A multichip package type semiconductor device comprising: the microcontroller according to claim 1; and an analog signal IC housed and connected in the same package as the microcontroller. 4. A first socket for mounting the multi-chip package type semiconductor device according to claim 3 as a test device; a second socket for mounting a microcontroller for test control; And a test head section of a tester for electrically connecting the two sockets to each other. 5. A first socket for mounting the multi-chip package type semiconductor device according to claim 3 as a test device; a second socket for mounting a microcontroller for test control; And a test head of a tester electrically connected between the two sockets so that data can be transferred between the two sockets via signal wiring of a predetermined bus standard. Test equipment for multi-chip package type semiconductor devices. 6. A step of mounting the multi-chip package type semiconductor device according to claim 3 as a test device in a first socket provided in a test head section of a tester; Mounting a microcontroller for test control on a second socket electrically connected to the socket of the multi-chip package type semiconductor device, sending a test command to a self-test circuit in a microcontroller in the multi-chip package type semiconductor device, Receiving a test result from a test circuit by the test control microcontroller and determining whether the test result is good or bad. 7. A step of mounting the multi-chip package type semiconductor device according to claim 3 as a test device in a first socket provided in a test head part of a tester; Mounting a microcontroller for test control on a second socket which is electrically connected to a second socket so that data can be transmitted / received via signal wiring of a predetermined bus standard; and Transferring write data from a microcontroller for use to a one-time programmable read-only memory in a microcontroller in the multi-chip package type semiconductor device via the signal wiring. 7. The test method for a multi-chip package type semiconductor device according to item 6.