JP2001057350A - Abrasive material and method of polishing substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable a silicon oxide film and a metal buried film to be effectively flattened at a high level, excessive film layers to be effectively removed from the films, and processes to be easily controlled in a recess CMP(chemical mechanical polishing) technique where a shallow trench isolation is made or a metal buried wiring is formed and a flattening CMP technique where an interlayer insulating film is made flat. SOLUTION: In the case a substrate is polished with abrasive material which contains abrasive grains and additives that give an inflection point of polishing pressure dependence to a polishing speed, provided that a set polishing pressure, an effective polishing pressure at the recess of the substrate where a pattern is formed, an effective polishing pressure at the projection of the substrate, and a pressure at which an inflection point appears in a polishing speed on a part of the substrate where no pattern is formed are represented by P, P1, P2, and P' respectively, abrasive material which is controlled in additive content so as to enable P, P1, P2, and P' to meet a formula, P2>P'>P)P1, is used. Or, a polishing load is so set as to enable P, P1, P2, and P' to meet a formula, P2>P'>P>P1, by which polishing characteristics through which projections where a higher polishing pressure than a pressure where an inflection point appears corresponding to the pattern shape of a polished film is applied are selectively polished can be realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing method used in a semiconductor device manufacturing technique, and more particularly to a polishing step of a substrate surface, in particular, a step of forming a buried layer in a groove of a shallow trench element isolation, a capacitor or a metal wiring. The present invention relates to a substrate polishing agent and a substrate polishing method used in a step of planarizing an interlayer insulating film and the like.

[0002]

2. Description of the Related Art In the current manufacturing process of ULSI semiconductor devices, processing techniques for high density and miniaturization have been researched and developed. One of them, CMP (Chemical Mechanical Polishing) technology, has become an essential technology. The CMP technology in the manufacturing process of a semiconductor device includes a recess CMP technology for removing an extra film formation portion of a film formation layer buried in a groove in element isolation formation, memory capacitor formation, plug and buried metal wiring formation, and the like. And a planarization CMP technique after forming an interlayer insulating film. LOCOS (local oxidation of silicon) has been used in the generation of the design rule of 0.5 μm or more in the device isolation forming technology in the integrated circuit. However, with the further miniaturization of the processing size, the shallow trench having a smaller device isolation width has been used. Trench isolation technology is being adopted. In the shallow trench isolation, CMP is an indispensable technique for removing an extra silicon oxide film buried on a substrate. Also in the metal wiring formation technology, in the generation of the design rule of 0.25 μm or more, W or the like is used for the Al wiring and the plug on the interlayer insulating film. Cu or Cu to fill
-Al alloys are being adopted. As the wiring technology of Cu or Cu / Al alloy, embedded wiring technology such as damascene or dual damascene is under study, and CMP is an essential technology for removing an extra metal film embedded on a substrate. In forming a capacitor of a memory element, a recessed CMP technique of a silicon oxynitride, a tantalum oxide film, and other ferroelectrics is indispensable in order to realize a trench structure or a complicated stacked structure.

Conventionally, in a semiconductor device manufacturing process, an insulating film such as silicon oxide, a capacitor ferroelectric film, a metal or metal alloy for wiring, etc. formed by a method such as plasma-CVD, low-pressure-CVD, sputtering, and electrolytic plating. In general, a method of polishing in a single step using a fumed silica or alumina-based abrasive as a chemical mechanical abrasive for forming a flattened and buried layer has been studied. However,
In such a polishing method, there is a technical problem that the flatness of the pattern is poor, and the characteristics vary due to thickness variation of the buried film and dishing.

In the conventional CMP technology for forming a flattening layer and a buried layer, the polishing rate of a convex portion greatly differs depending on the difference in pattern density or the size difference, and polishing of a concave portion also progresses. There is a technical problem that a high level of planarization cannot be realized in the whole. Therefore, in order to improve the flatness by reducing the difference between the polishing rate of the buried portion that becomes a concave portion after the burying layer is formed and the polishing speed of the convex portion that needs to remove the film layer after the burying layer is formed, to improve flatness. 2. Description of the Related Art A technique of adding an etch-back step of partially removing a film to be polished on a convex portion by etching has been widely adopted. However, since the number of processes increases, there is a problem in terms of manufacturing cost.

In addition, CMP for forming a buried layer
In the technology and the CMP technology for flattening an interlayer film, it is difficult to detect an ideal end point by a polishing apparatus. Therefore, a process management method of controlling a polishing amount by a polishing time is generally performed. However, there has been a problem that not only the change in the pattern step shape but also the state of the polishing cloth significantly changes the polishing rate, making process management difficult.

In the shallow trench isolation, a silicon nitride film is mainly formed as a mask and a stopper except for the silicon oxide film buried portion for element isolation. In order to realize stable element isolation characteristics, silicon nitride in the wafer is required. It is necessary to minimize the variation in the remaining film thickness. For this purpose, after the silicon nitride film is exposed, it is necessary that the polishing rate be reduced. The polishing rate ratio between the silicon oxide film and the silicon nitride film (the polishing rate of the silicon oxide film / the polishing rate of the silicon nitride film) is required. It is desirable that the polishing rate is large. However, the conventional polishing method using a single polishing step using a silica-based polishing agent has a problem that the polishing rate ratio is only about 2 to 3 and a sufficient process margin cannot be obtained. In the formation of a metal buried wiring or a capacitor, polishing must be completed when the film-forming base layer in which the buried groove is formed is exposed. An abrasive having a large polishing rate ratio between the substrate and the underlying film is used. However, on the other hand, when an abrasive having a large polishing rate ratio is used, there is a problem that dishing of the buried layer becomes large.

[0007] An abrasive containing cerium oxide or the like, which can obtain a higher polishing rate of a silicon oxide film than a silica-based abrasive, is also used. However, there are problems such as difficulty in process management because the polishing rate is too high, and large dependence of the polishing rate on the pattern of the film to be polished on the substrate. In addition, there is also a problem that the projections are less likely to be removed as the film pattern to be polished on the substrate becomes finer because the particles are generally used at a relatively low particle concentration, and only the polishing of the peripheral portion proceeds. A polishing agent containing cerium oxide can provide a polishing rate ratio of a silicon oxide film and a silicon nitride film approximately twice that of a silica-based polishing agent, but it is still not practically sufficient.

[0008]

SUMMARY OF THE INVENTION The present invention relates to a shallow
Recess C for trench isolation formation, metal buried wiring formation, etc.
In the MP technology and the CMP technology for planarizing the interlayer insulating film,
It is an object of the present invention to provide a polishing agent and a polishing method capable of efficiently and at a high level removing and flattening an unnecessary film forming layer of a buried film such as a silicon oxide film or a metal and easily performing process control.

[0009]

The polishing agent of the present invention is a polishing agent containing an abrasive for polishing the substrate and providing an inflection point which depends on the polishing pressure on the polishing rate. If
Assuming that the effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P ₁ and the effective polishing pressure of the convex portion is P ₂ , the pressure P ′ at which the inflection point appears in the polishing rate of the substrate without the pattern is P ₂ > P ′.
>P> is a polishing agent adjusted to a concentration of P ₁ become as additives. As a result, the interlayer insulating film is flattened and shallow
It is possible to efficiently and at a high level flattening of a buried film such as formation of a trench element isolation. With the above-mentioned abrasive, when the pressure at which the inflection point appears in the polishing rate of a substrate without a pattern is at an added concentration of P ′, the effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P ₁ and the convex portion is the convex portion. Assuming that the effective polishing pressure is P ₂ , the set polishing load P is P ₂ > P ′>P>
Also by adjusting such that P _1, it is possible to achieve the same effect. Under normal polishing conditions, the polishing rate generally shows a characteristic proportional to the polishing pressure. In the present invention, the additive that gives a polishing pressure-dependent inflection point on the polishing rate, compared with the case where no additive is added,
The polishing rate of a substrate without a pattern is sufficiently small by the additive to a certain polishing pressure, and at a polishing pressure higher than the pressure at which the inflection point is obtained, a polishing rate characteristic sufficiently higher than the polishing speed at a polishing pressure at or below the inflection point is obtained. It means an agent that shows a characteristic that the polishing pressure at which an inflection point appears varies depending on the added amount. As an additive that gives a polishing pressure-dependent inflection point to the polishing rate, an organic polymer anionic surfactant, a nonionic surfactant, or the like is preferably used. In particular, as the anionic surfactant, those containing ammonium acrylate as a copolymer component are preferably used. In a polishing method for polishing a film to be polished by moving a polishing platen and a substrate relatively while a substrate having a film to be polished is pressed against the polishing cloth while supplying an abrasive onto the polishing cloth of the polishing platen. The pressing pressure of the substrate having the film to be polished against the polishing cloth is preferably 100 to 1000 gf / cm ² ,
More preferably, it is 200 to 500 gf / cm ² . With the polishing method of the present invention, for example, a predetermined substrate such as a semiconductor chip on which at least a silicon oxide film is formed can be polished.

[0010]

DETAILED DESCRIPTION OF THE INVENTION A polishing agent comprising an abrasive which provides a substrate with abrasive grains and an inflection point dependent on the polishing pressure on the polishing rate,
When the set polishing pressure is P, the effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P ₁ , and the effective polishing pressure of the convex portion is P _2. A polishing pressure higher than a pressure at which an inflection point appears according to the pattern shape of the film to be polished is applied by the polishing agent in which the concentration of the additive is adjusted so that P ′ becomes P ₂ > P ′>P> P ₁ . The characteristic of selectively polishing the convex portion can be realized.
In addition, the polishing rate after flattening, because the polishing rate of the set polishing pressure is smaller than the pressure at which the inflection point appears,
Since the polishing after the flattening hardly progresses, the process control by the polishing time becomes easy. The dependence of the polishing rate by this additive on the polishing pressure is described in the literature (IEDM96 (Int.
ernational Electronic Device Meeting) Proceedings)
(1996) p.349-352). as a result,
High-efficiency, high-level planarization with little pattern density and small size dependency can be realized.

In the above polishing agent, when the pressure at which the inflection point appears in the polishing rate of a substrate without a pattern is at an additive concentration at which the pressure becomes P ′, the effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P _1. , the effective grinding pressure of the convex portion when the P _2, also by adjusting the set polishing load P such that _{P 2> P '>P>} P 1, it is possible to achieve the same effect.

The polishing target film is polished by relatively moving the polishing platen and the substrate while pressing the substrate having the film to be polished against the polishing cloth while supplying the abrasive onto the polishing cloth of the polishing platen. In the polishing method, the pressure of pressing the substrate having the film to be polished against the polishing cloth is within a range in which the convex portions are selectively polished with respect to the concave portions of the pattern according to the pressure-dependent characteristic of the polishing rate mainly determined by the amount of the additive. Must be set to The pressing pressure on the polishing cloth is 100 to 1000 gf
/ Cm ² , preferably 200 to 500 gf /
cm ² is more preferable. In order to satisfy the in-plane uniformity of the polishing rate and the flatness of the pattern, 2
More preferably, it is 00 to 500 gf / cm ² .
If the pressing pressure on the polishing cloth is more than 1000 gf / cm ² , polishing flaws are likely to occur, and 100 gf / c
If it is less than m ² , a sufficient polishing rate cannot be obtained.

The abrasive used in the polishing agent and the polishing method of the present invention are inorganic oxide particles such as cerium oxide, silicon oxide and aluminum oxide, and cerium oxide particles are preferably used. Here, the concentration of the abrasive grains is not limited, but is preferably in the range of 0.5 to 15% by weight from the viewpoint of easy handling of the suspension.

In the present invention, the additive which gives an inflection point depending on the polishing pressure on the polishing rate does not contain metal ions, and is considered to be an acrylic acid polymer and its ammonium salt, a methacrylic acid polymer and its ammonium salt. , Water-soluble organic polymers such as polyvinyl alcohol, water-soluble anionic surfactants such as ammonium lauryl sulfate and ammonium polyoxyethylene lauryl ether, and water-soluble nonionic surfactants such as polyoxyethylene lauryl ether and polyethylene glycol monostearate Examples include surfactants, water-soluble amines such as monoethanolamine and diethanolamine. Among them, anionic surfactants and the like are preferably used, and in particular, at least one or more surfactants selected from water-soluble anionic surfactants such as a polymer dispersant containing an ammonium salt as a copolymerization component. Use In addition, a water-soluble nonionic surfactant, a water-soluble anionic surfactant, a water-soluble cationic surfactant, or the like may be used in combination. These surfactants are added in an amount of 0.1 to 100 parts by weight of the slurry.
The range of 1 to 10 parts by weight is preferred. Further, the molecular weight of the surfactant is preferably from 100 to 50,000,
00 to 20000 is more preferable. As a method of adding the additive, it is preferable that the additive is mixed with the abrasive dispersion just before polishing. When a structure that mixes well in the slurry supply pipe of the polishing device is provided, adjust the supply rates of the abrasive dispersion and the aqueous solution of the additive individually and mix them to a predetermined concentration in the pipe. Is also possible. When stored for a long time after mixing the additives, the particle size distribution of the abrasive may change, but since the polishing rate and polishing characteristics such as scratches are not significantly affected, the method of adding the surfactant is There is no restriction.

As a method for producing an inorganic insulating film to which the polishing agent or polishing method of the present invention is applied, a constant pressure CVD method, a plasma C
VD method and the like. In forming a silicon oxide insulating film by a constant-pressure CVD method, monosilane: SiH _{4 is} used as a Si source, and oxygen: O ₂ is used as an oxygen source. This is obtained by performing the SiH ₄ —O ₂ -based oxidation reaction at a low temperature of about 400 ° C. or less. Phosphorus in order to surface planarization by a high temperature reflow: when doped with P, it is preferable to use a SiH ₄ -O ₂ -PH ₃ system reaction gas. The plasma CVD method has an advantage that a chemical reaction requiring a high temperature can be performed at a low temperature under normal thermal equilibrium. The plasma generation method includes two types, a capacitive coupling type and an inductive coupling type. As a reaction gas, a SiH ₄ —N ₂ O-based gas using SiH ₄ as a Si source and N ₂ O as an oxygen source, and tetraethoxysilane (TEO)
S) as a Si source using a TEOS-O ₂ based gas (TEOS
-Plasma CVD method). Substrate temperature is 250
The reaction pressure is preferably in the range of 67 to 400 Pa. Thus, the silicon oxide insulating film of the substrate used in the present invention may be doped with elements such as phosphorus and boron. Similarly, silicon nitride film formation by low pressure CVD
Dichlorosilane: SiH ₂ Cl ₂ is used as an i source, and ammonia: NH ₃ is used as a nitrogen source. This SiH ₂ Cl ₂ -N
It is obtained by performing an H ₃ -based oxidation reaction at a high temperature of 900 ° C. The plasma CVD method uses Si as a Si source.
H _4, include SiH ₄ -NH ₃ based gas using the NH ₃ as a nitrogen source. The substrate temperature is preferably from 300 to 400C.

As a predetermined substrate, a semiconductor substrate, that is, a semiconductor substrate in which circuit elements and wiring patterns are formed,
A substrate in which at least a silicon oxide film is formed over a semiconductor substrate such as a semiconductor substrate at a stage where circuit elements are formed can be used. By polishing the silicon oxide film layer formed on such a semiconductor substrate with the above-mentioned polishing agent and the polishing method, unevenness on the surface of the silicon oxide film layer is eliminated, and a smooth surface is formed over the entire semiconductor substrate. This is completed when applied to the step of flattening the interlayer insulating film.In the case of the shallow trench isolation, the flattened silicon oxide film is further polished to the underlying silicon nitride layer. Then, only the silicon oxide film embedded in the element isolation portion is left. At this time, if the polishing rate ratio with respect to silicon nitride serving as a stopper is large, the polishing rate after exposure of the nitride film is reduced, and the polishing process margin is increased. In addition, in order to use it for shallow trench isolation, it is necessary that scratch generation during polishing is small.
Here, as a polishing apparatus, a general polishing apparatus having a holder for holding a semiconductor substrate and a platen on which a polishing cloth (pad) is attached (a motor or the like capable of changing the number of rotations is attached) is used. it can. As the polishing cloth, general nonwoven fabric, foamed polyurethane, porous fluororesin and the like can be used, and there is no particular limitation. Further, it is preferable that the polishing cloth is subjected to groove processing for storing the abrasive. The polishing conditions are not limited, but the rotation speed of the platen is preferably low at 100 rpm or less so that the semiconductor does not jump out. The pressing pressure of the semiconductor substrate having the film to be polished against the polishing cloth is 100
To 1000 gf / cm ² , and more preferably 200 to 500 gf / cm ² in order to satisfy the in-plane uniformity of the polishing rate and the flatness of the pattern. During polishing, an abrasive is continuously supplied to the polishing cloth by a pump or the like. There is no limit on this supply,
It is preferable that the surface of the polishing cloth is always covered with the abrasive.

It is preferable that the semiconductor substrate after polishing is thoroughly washed in running water, and then water drops adhering to the semiconductor substrate are wiped off using a spin drier or the like, and then dried. In this manner, after forming a shallow trench isolation on a Si substrate, an insulating layer is formed, or after a silicon oxide insulating film layer is planarized, an aluminum wiring is formed thereon, and an oxide layer formed thereon is formed. The silicon film is planarized by the above method. An upper layer aluminum wiring is formed on the flattened silicon oxide film layer, a silicon oxide film is formed between the wirings and on the wiring, and then polished by the polishing agent and the polishing method of the present invention, whereby the insulating film is formed. Eliminate surface irregularities,
The surface is smooth over the entire surface of the semiconductor substrate. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured. Alternatively, after forming a shallow trench isolation on a Si substrate, a trench for an embedded wiring is formed on the interlayer insulating film layer and the surface thereof, and a barrier metal layer such as TiN or TaN and a seed layer for the wiring metal are formed by a sputtering method. Then, a film of Cu or Cu.Al alloy is formed by an electrolytic plating method or the like. By applying the polishing agent and the polishing method of the present invention to this film formation layer, metal can be embedded only in the wiring groove. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured.

In addition, in the process of forming the capacitor of the memory element, in the trench type cell structure, when forming a buried structure such as polysilicon or silicon oxynitride,
Even in a stacked cell structure, an embedding process may be employed to form a complicated structure, and the polishing of the present invention is performed on ferroelectric materials such as STO and BST in addition to silicon oxide silicon and tantalum oxide films. Agents and polishing methods are applied.

The polishing agent and the polishing method of the present invention can be applied to a silicon oxide film or a silicon nitride film formed on a semiconductor substrate, Cu, Cu.A
1) a metal film such as an alloy, a ferroelectric film, a silicon oxide film formed on a wiring board having a predetermined wiring, glass,
Inorganic insulating films such as silicon nitride, metal films, optical glasses such as photomasks, lenses, prisms, etc .; inorganic conductive films such as ITO; optical integrated circuits, optical switching elements, optical waveguides and optical waveguides composed of glass and crystalline materials. Fiber end face, optical single crystal such as scintillator, solid laser single crystal, blue laser LED sapphire substrate, SiC, GaP, Ga
It is also used as a polishing method for semiconductor single crystals such as As, glass substrates for magnetic disks, magnetic heads and the like.

[0020]

EXAMPLES (Example 1) (Preparation of slurry) Cerium carbonate hydrate was added at 800 ° C. for 2 hours.
The mixture was fired in the air for an hour, and was dry-ground using a jet mill to produce cerium oxide particles. Cerium oxide particles 1K
g, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight) as a dispersant, and 8977 g of deionized water were mixed and subjected to ultrasonic dispersion for 10 minutes while stirring. The obtained slurry was filtered through a 1-micron filter, and further 5% by weight of slurry was obtained by adding deionized water. The slurry pH was 8.3. 600 g of the above cerium oxide slurry (solid content: 5% by weight) and polyacrylic acid (10
(0%) 180 g of an ammonium salt aqueous solution (40% by weight) and 2220 g of deionized water were mixed to prepare a cerium oxide abrasive (cerium oxide solid content: 1% by weight) to which a surfactant was added.

(Blanket Wafer Polishing 1) Diameter 20
A blanket wafer having a 1000-nm silicon oxide film formed on a 0-mm Si substrate was manufactured. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And the processing pressure is 100 gf / c
is set to m ^2, the above-mentioned cerium oxide abrasive surface plate: dropwise (solid content 1 wt%) at a rate of 200 cc / min, the platen and the wafer was rotated for 1 minute at 50 rpm, silicon oxide The film was polished. Similarly, set the processing pressure to 200
Polishing the other wafer is set to 100 gf / cm ² every range of ~800gf / cm ^2. The polished wafer was washed and dried, and the film thickness was measured with an interference film thickness meter to calculate the change in film thickness before and after polishing. As a result, the pressure was 100 gf /
The polishing rate of cm ² is 24 nm / min, and the pressure is 200 gf.
/ Cm ² polishing rate is 41 nm / min, pressure 300 g
The polishing rate of f / cm ² is 65 nm / min, and the pressure is 400
The polishing rate of gf / cm ² is 85 nm / min, and the pressure is 50.
Polishing rate of 0 gf / cm ² is 105 nm / min, the polishing rate of the pressure 600 gf / cm ² is 123 nm / min,
The polishing rate at a pressure of 700 gf / cm ² is 146 nm / mi.
n, the polishing rate at a pressure of 800 gf / cm ² is 302 nm /
min, and an inflection point of the polishing rate was obtained at a processing pressure of 700 gf / cm ² .

(Blanket wafer polishing 2) Diameter 20
A blanket wafer having a 1000 nm silicon oxide film formed on a 0 mm Si substrate and a blanket wafer having a 100 nm silicon nitride film formed thereon were produced. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And the processing pressure is 3
Set to 00gf / cm ^2, platen to the cerium oxide abrasive (solid content: 1 wt%) of 200 cc / min
The platen and the wafer were rotated at 50 rpm for 1 minute while dripping at a speed of 1 to polish the silicon oxide film. Similarly, the processing pressure was set to 300 gf / cm ² , and the silicon nitride film was polished. The polished wafer was washed and dried, and the film thickness was measured with an interference film thickness meter to calculate the change in film thickness before and after polishing. As a result, the polishing rate of the silicon oxide film was 65 nm / min, the polishing rate of the silicon nitride film was 6 nm / min, and the polishing rate ratio (silicon oxide film polishing rate / silicon nitride film polishing rate) was 11
Met.

(Polished pattern wafer) Diameter 200 mm
After forming a 100 nm silicon nitride film on the Si substrate, a photoresist was applied, and dots of the 100 × 100 μm ² silicon nitride film were left as a mask material at a pitch of 158 μm, and a 400 nm trench was formed in the Si substrate by etching. Subsequently, after forming a thin thermal oxide film, a silicon oxide film having a thickness of 680 nm was formed by a low-pressure CVD method, and a pattern wafer in which the silicon oxide film was embedded in a trench having a thickness of 500 nm including the silicon nitride film was manufactured. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. Further, the processing pressure was set to 300 gf / cm ² . The area ratio of the pattern projections of this wafer is about 35
%, The effective polishing pressure P ₂ of the pattern convex portion at the start of polishing is about 860 gf / cm ^{2 at} maximum, which is larger than the inflection point pressure 700 gf / cm ² , and the effective polishing pressure P ₁ of the pattern concave portion is set. It will be smaller than the pressure of 300 gf / cm ² . While dropping the cerium oxide abrasive (solid content: 1% by weight) at a rate of 200 cc / min on the surface plate, the surface plate and the wafer were rotated at 50 rpm for 3 minutes,
The silicon oxide film was polished. Polishing was performed under the same conditions with a polishing time of 4 minutes and 5 minutes. After the wafer was washed and dried, the thickness of the silicon oxide film on the silicon nitride film and the trench portion was measured by an interference film thickness meter, and the step at the boundary was measured by a stylus type step meter. The measurement results of the wafer after polishing for 3 minutes show that the thickness of the silicon oxide film on the silicon nitride film is 158 nm, the thickness of the silicon oxide film in the trench portion is 650 nm, and the remaining step is at least <10 nm. It was found that the planarization was completed. The measurement result of the wafer after polishing for 4 minutes shows that the thickness of the silicon oxide film on the silicon nitride film is 102
nm, the thickness of the silicon oxide film in the trench portion is 597 nm, and the measurement result of the wafer after polishing for 5 minutes shows that the thickness of the silicon oxide film on the silicon nitride film is 48 nm, and the thickness of the silicon oxide film in the trench portion. Was 545 nm, and it was found that polishing hardly progressed after 3 minutes. In the actual formation of the shallow trench isolation, it is necessary to polish the protrusions to the silicon nitride film. However, when applied to the planarization CMP of the silicon oxide interlayer film, this is a very good characteristic. Understand.

(Example 2) (Preparation of slurry) Cerium carbonate hydrate was added at 800 ° C for 2 hours.
The mixture was fired in the air for an hour, and was dry-ground using a jet mill to produce cerium oxide particles. Cerium oxide particles 1K
g, 23 g of an aqueous solution of ammonium polyacrylate (40% by weight) as a dispersant, and 8977 g of deionized water were mixed and subjected to ultrasonic dispersion for 10 minutes while stirring. The obtained slurry was filtered through a 1-micron filter, and further 5% by weight of slurry was obtained by adding deionized water. The slurry pH was 8.3. 600 g of the above cerium oxide slurry (solid content: 5% by weight) and polyacrylic acid (10
(0%) 135 g of an aqueous ammonium salt solution (40% by weight) and 2265 g of deionized water were mixed to prepare a cerium oxide abrasive (cerium oxide solid content: 1% by weight) to which a surfactant was added.

(Blanket Wafer Polishing 1) Diameter 20
A blanket wafer having a 1000-nm silicon oxide film formed on a 0-mm Si substrate was manufactured. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And the processing pressure is 100 gf / c
is set to m ^2, the above-mentioned cerium oxide abrasive surface plate: dropwise (solid content 1 wt%) at a rate of 200 cc / min, the platen and the wafer was rotated for 1 minute at 50 rpm, silicon oxide The film was polished. Similarly, set the processing pressure to 200
Polishing the other wafer is set to 100 gf / cm ² every range of ~800gf / cm ^2. The polished wafer was washed and dried, and the film thickness was measured with an interference film thickness meter to calculate the change in film thickness before and after polishing. As a result, the pressure was 100 gf /
The polishing rate of cm ² is 35 nm / min, and the pressure is 200 gf.
/ Cm ² polishing rate is 76 nm / min, pressure 300 g
The polishing rate of f / cm ² is 105 nm / min, and the pressure is 40.
The polishing rate of 0 gf / cm ² is 128 nm / min, the polishing rate of 500 gf / cm ² is 155 nm / min,
The polishing rate at a pressure of 600 gf / cm ² is 286 nm / mi.
n, the polishing rate at a pressure of 700 gf / cm ² is 401 nm /
min, the polishing rate at a pressure of 800 gf / cm ² is 520 n.
m / min, and an inflection point of the polishing rate was obtained at a processing pressure of 500 gf / cm ² .

(Blanket Wafer Polishing 2) Diameter 20
A blanket wafer having a 1000 nm silicon oxide film formed on a 0 mm Si substrate and a blanket wafer having a 100 nm silicon nitride film formed thereon were produced. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And the processing pressure is 3
Set to 00gf / cm ^2, platen to the cerium oxide abrasive (solid content: 1 wt%) of 200 cc / min
The platen and the wafer were rotated at 50 rpm for 1 minute while dripping at a speed of 1 to polish the silicon oxide film. Similarly, the processing pressure was set to 300 gf / cm ² , and the silicon nitride film was polished. The polished wafer was washed and dried, and the film thickness was measured with an interference film thickness meter to calculate the change in film thickness before and after polishing. As a result, the polishing rate of the silicon oxide film was 106 nm / min,
The polishing rate of the silicon nitride film is 7 nm / min, and the polishing rate ratio (silicon oxide film polishing rate / silicon nitride film polishing rate) is 1
It was 5.

(Polishing of Pattern Wafer) Diameter 200 mm
After forming a 100 nm silicon nitride film on the Si substrate, a photoresist was applied, and dots of the 100 × 100 μm ² silicon nitride film were left as a mask material at a pitch of 158 μm, and a 400 nm trench was formed in the Si substrate by etching. Subsequently, after forming a thin thermal oxide film, a 680 nm-thick silicon oxide film is formed by a low-pressure CVD method, and a pattern wafer having a 500 nm-thick silicon oxide film embedded in a trench including a silicon nitride film is manufactured. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. Further, the processing pressure was set to 300 gf / cm ² . The area ratio of the pattern projections of this wafer is about 35
Since a was the% effective polishing pressure P ₂ of the pattern convex portions at the start of polishing is greater than the maximum 860gf / cm ² about a and inflection point pressure 500 gf / cm ^2, the effective grinding pressure P ₁ of the pattern recess configuration It will be smaller than the pressure of 300 gf / cm ² . While dropping the cerium oxide abrasive (solid content: 1% by weight) at a rate of 200 cc / min on the surface plate, the surface plate and the wafer were rotated at 50 rpm for 3 minutes,
The silicon oxide film was polished. Similarly, polishing was performed at polishing times of 4 minutes and 5 minutes. After the wafer was washed and dried, the thickness of the silicon oxide film on the silicon nitride film and the trench portion was measured by an interference film thickness meter, and the step at the boundary was measured by a stylus type step meter. The measurement result of the wafer after polishing for 3 minutes shows that the silicon oxide film on the silicon nitride film has disappeared, the thickness of the silicon nitride film is 87 nm, and the thickness of the silicon oxide film in the trench portion is 4 nm.
It was 80 nm. It was found that the level difference was at least <10 nm and the planarization was completed. The measurement result of the wafer after polishing for 4 minutes shows that the thickness of the silicon nitride film is 80 n.
m, the thickness of the silicon oxide film in the trench portion is 465 nm, and the measurement result of the wafer after polishing for 5 minutes shows that the thickness of the silicon nitride film is 73 nm and the thickness of the silicon oxide film in the trench portion is 44
It was 8 nm. After 3 minutes, the polishing hardly progressed, and the residual step was at least <30 nm, which is a very good result. As described above, by adjusting the amount of the additive, the present invention can be applied to CMP for forming a shallow trench structure.

Comparative Example 1 (Blanket Wafer Polishing) Blanket wafers each having a silicon oxide film of 1000 nm formed on a Si substrate having a diameter of 200 mm and a blanket wafer having a silicon nitride film formed of 100 nm were prepared. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. , And the processing pressure is 300 gf / cm
^The surface plate and the wafer were rotated at 50 rpm for 1 minute while dropping (solid content: 12.5% by weight) at a rate of 200 cc / min using a commercially available silica slurry on the platen, and then oxidized. The silicon film was polished. Similarly, the processing pressure was set to 300 gf / cm ² , and the silicon nitride film was polished.
The polished wafer was washed and dried, and the film thickness was measured with an interference film thickness meter to calculate the change in film thickness before and after polishing. As a result, the polishing rate of the silicon oxide film was 175 nm / min, the polishing rate of the silicon nitride film was 70 nm / min, and the polishing rate ratio (silicon oxide film polishing rate / silicon nitride film polishing rate) was 2.
It was 5.

(Polishing of Pattern Wafer) Diameter 200 mm
After forming a 100 nm silicon nitride film on the Si substrate, a photoresist was applied, and dots of the 100 × 100 μm ² silicon nitride film were left as a mask material at a pitch of 158 μm, and a 400 nm trench was formed in the Si substrate by etching. Subsequently, after forming a thin thermal oxide film, a silicon oxide film having a thickness of 680 nm was formed by a low-pressure CVD method, and a pattern wafer in which the silicon oxide film was embedded in a trench having a thickness of 500 nm including the silicon nitride film was manufactured. The pattern wafer is set on a holder to which a suction pad for attaching a substrate to be held is attached, and the holder is placed with the insulating film face down on a platen having a diameter of 600 mm to which a polishing pad made of porous urethane resin is attached. Further, the processing pressure was set to 300 gf / cm ² . Commercially available silica slurry (solid content: 1
(2.5% by weight) at a rate of 200 cc / min while rotating the platen and the wafer at 50 rpm for 2 minutes.
The silicon oxide film was polished. Similarly, polishing was performed at polishing times of 3 minutes and 4 minutes. After the wafer was washed and dried, the thickness of the silicon oxide film on the silicon nitride film and the trench portion was measured by an interference film thickness meter, and the step at the boundary was measured by a stylus type step meter. Measurement results of the wafer after polishing for 2 minutes show that the thickness of the silicon oxide film on the silicon nitride film is 112 nm, the thickness of the silicon oxide film in the trench portion is 524 nm, and the remaining step is 9 nm.
It was about 0 nm. The measurement result of the wafer after polishing for 3 minutes shows that the silicon oxide film on the silicon nitride film is gone, the thickness of the silicon nitride film is 62 nm, the thickness of the silicon oxide film in the trench portion is 329 nm, and the remaining step is It was about 130 nm. The measurement result of the wafer after polishing for 4 minutes showed that the silicon nitride film disappeared and the Si substrate was exposed. Polishing was performed to the target position of the silicon nitride film in a polishing time of 3 minutes, but the residual step was large,> 100 nm, and the polishing rate after the silicon nitride film was exposed did not decrease so much. Then, it is difficult to set the polishing time.

[0030]

According to the polishing agent and the polishing method of the present invention, a buried film such as a silicon oxide film or a metal is used in a recess CMP technique such as formation of a shallow trench isolation and formation of a buried metal wiring and a CMP technique for flattening an interlayer insulating film. The removal and flattening of the unnecessary film formation layer can be efficiently performed at a high level, and the process management can be easily performed.

Claims (4)

[Claims] 1. A polishing agent containing an abrasive which gives an inflection point dependent on the polishing pressure to the polishing rate, wherein the polishing pressure is set to P, and wherein the polishing pressure is P. Assuming that the effective polishing pressure is P ₁ and the effective polishing pressure of the convex portion is P ₂ , the pressure P ′ at which an inflection point appears in the polishing rate of a substrate without a pattern is P ₂ > P ′>P> P _1. Polishing agent with adjusted additive concentration. 2. An effective polishing pressure for a concave portion of a substrate on which a pattern is formed, when the polishing agent has an additive amount concentration at which a pressure at which an inflection point appears in the polishing rate of a substrate without a pattern becomes P ′. P _1, when the effective grinding pressure of the protrusions and P _2, a polishing method of a substrate, which comprises adjusting the set polishing load P such that _{P 2> P '>P>} P 1. 3. The method for polishing a substrate according to claim 2, wherein the semiconductor chip on which at least the silicon oxide film is formed is polished. 4. A polishing method, wherein a substrate having a film to be polished is pressed against the polishing cloth while the polishing agent is supplied onto the polishing cloth of the polishing platen, and the polishing platen and the substrate are moved relatively to thereby polish the film to be polished. 4. The method for polishing a substrate according to claim ² , wherein in the polishing step, the pressure of pressing the substrate having the film to be polished against the polishing cloth is 100 to 1000 gf / cm ² .