JP2003045829A - Abrasive and method of polishing substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an abrasive and a method of polishing a substrate, which can efficiently perform removal of an excessively formed film layer and planarization of a silicon oxide film and an embedded film of a metal or the like with high-level quality and with easy process control in a recess CMP technology such as for shallow trench isolation formation and for embedded metal wiring formation and in a planarization CMP technology for an interlayer insulation layer. SOLUTION: A substrate is polished with an abrasive containing abrasive grains and an additive that gives an inflection point in the polishing pressure dependence of the polishing rate, wherein the concentration of the additive in the abrasive slurry is adjusted to satisfy the relation P2>P'>P>P1, where P is the set polishing pressure, P1 is the effective polishing pressure for recessed parts of the substrate on which a pattern is formed, P2 is the effective polishing pressure for protruding parts, and P' is the pressure at which the inflection point appears in the polishing rate for a substrate on which no pattern is formed. Or, by setting the polishing weight so as to satisfy the relation P2>P'>P>P1, it is possible to realize a polishing characteristic in which the polishing is selectively progressed at the protruding parts to which a higher polishing pressure than the pressure at which the inflection point appears according to the pattern shape of the film to be polished is applied.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing method used in a semiconductor device manufacturing technique, and more particularly to a polishing process of a substrate surface, particularly a shallow trench device isolation process, a process of forming a buried layer in a groove such as a capacitor or a metal wiring. The present invention relates to a substrate polishing agent and a substrate polishing method used in a planarization process of an interlayer insulating film and the like.

[0002]

2. Description of the Related Art In the current ULSI semiconductor device manufacturing process, research and development are being carried out on processing techniques for high density and miniaturization. One of them, CMP (Chemical Mechanical Polishing) technology has become an indispensable technology. The CMP technique in the manufacturing process of a semiconductor device includes a recess CMP technique for removing an excessive film formation portion of a film formation layer embedded in a groove in element isolation formation, memory capacitor formation, plug and embedded metal wiring formation, and the like. There is also a flattening CMP technique after forming an interlayer insulating film. LOCOS (Silicon Local Oxidation) has been used in the generation of design rule 0.5 μm or more in the element isolation formation technology in integrated circuits. Trench isolation technology is being adopted. In shallow trench isolation, CMP is an indispensable technique for removing the excess silicon oxide film embedded on the substrate. Also in the metal wiring forming technology, W and the like were used for the Al wiring and the plug on the interlayer insulating film in the generation with the design rule of 0.25 μm or more. Cu or Cu to fill
-Al alloys are being adopted. As the wiring technology of Cu or Cu / Al alloy, a buried wiring technology such as damascene or dial damascene has been studied, and CMP is an essential technology for removing an extra metal film buried on a substrate. Also in forming a capacitor of a memory device, a recess CMP technique of silicon oxynitride, a tantalum oxide film, and other ferroelectrics is an essential technique in order to realize a trench structure or a complicated stack type structure.

Conventionally, in a semiconductor element manufacturing process, an insulating film such as silicon oxide formed by a method such as plasma-CVD, low-pressure-CVD, sputtering, and electrolytic plating, a ferroelectric film of a capacitor, a metal for wiring, a metal alloy, etc. A method of polishing in a single step using a fumed silica or alumina-based polishing agent as a chemical mechanical polishing agent for forming the planarization and burying layer is generally studied. However,
Such a polishing method has a technical problem that the flatness of the pattern is poor, and the characteristics vary due to variations in the thickness of the embedded film and dishing.

In the conventional CMP technique for forming the flattening and burying layers, the polishing rate of the convex portions greatly differs depending on the difference in the pattern density or the size difference, and the polishing of the concave portions also progresses. There is a technical problem that a high level of flatness cannot be realized in the whole. Therefore, in order to improve the flatness by reducing the difference between the polishing rate of the embedded portion that becomes the concave portion after the embedded layer is formed and the polishing rate of the convex portion that needs to be removed after the embedded layer is formed, the flatness is improved. A technique of adding an etch-back step of partially removing the film to be polished on the convex portion by etching is widely adopted. However, since the number of steps increases, there is a problem in terms of manufacturing cost.

CMP for forming a buried layer
In the technique and the CMP technique for flattening the interlayer film, since it is difficult to detect an ideal end point by a polishing apparatus, a process management method in which a polishing amount is controlled by a polishing time is generally performed. However, there is a problem in that process control is difficult because not only the pattern step shape change but also the polishing cloth state and the like significantly change.

In the shallow trench isolation, a silicon nitride film is mainly formed as a mask and a stopper other than the portion where the silicon oxide film is embedded for element isolation, and in order to realize stable element isolation characteristics, silicon nitride in the wafer must be formed. It is necessary to minimize the remaining film thickness variation. For that purpose, a property that the polishing rate is lowered after the silicon nitride film is exposed is required, and a polishing rate ratio between the silicon oxide film and the silicon nitride film (polishing rate of silicon oxide film / silicon nitride film A high polishing rate) is desirable. However, the conventional one-step polishing method using a silica-based polishing agent has a problem that the polishing rate ratio is only about 2 to 3 and a sufficient process margin cannot be obtained. Even in the case of forming a buried wiring of metal or a capacitor, it is necessary to finish the polishing when the film-forming underlayer in which the buried groove is formed is exposed. An abrasive having a large polishing rate ratio between the underlayer and the underlayer is used. However, on the other hand, when an abrasive having a large polishing rate ratio is used, there is a problem that the dishing of the embedded layer becomes large.

Abrasives containing cerium oxide or the like, which can obtain a higher polishing rate for silicon oxide films than silica-based abrasives, are also used. However, there are problems that process control is difficult because the polishing rate is too high, and that the patterning rate of the film to be polished on the substrate is highly dependent on the polishing rate. In addition, since the particles are generally used at a relatively low particle concentration, the finer the film-to-be-polished pattern on the substrate is, the more difficult it is to remove the convex portions, and only the peripheral portion thereof is polished. Further, the polishing agent containing cerium oxide can obtain a polishing rate ratio of the silicon oxide film and the silicon nitride film which is about twice that of the silica-based polishing agent, but it is still not practically sufficient.

[0008]

SUMMARY OF THE INVENTION The present invention is a shallow
Recess C for trench isolation formation, metal buried wiring formation, etc.
In the MP technology and the CMP technology for planarizing the interlayer insulating film,
The present invention provides a polishing agent and a polishing method capable of efficiently removing and flattening a surplus film-forming layer of a buried film such as a silicon oxide film or a metal, and easily performing process control.

[0009]

The abrasive of the present invention is an abrasive containing a substrate as an abrasive grain and an additive which gives an inflection point depending on the polishing pressure to the polishing rate, and the preset polishing pressure is P. If
The effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P
1. If the effective polishing pressure of the convex portion is P2, the pressure P'at which an inflection point appears in the polishing rate of a substrate without a pattern is P2> P '>
It is an abrasive in which the concentration of the additive is adjusted so that P> P1. As a result, the flattening of the interlayer insulating film and the flattening of the buried film such as shallow trench element isolation formation can be efficiently performed.
It can be done at a high level. With the above-mentioned abrasives, when the pressure is such that the pressure at which an inflection point appears in the polishing rate of a substrate without a pattern becomes P ′, the effective polishing pressure of the concave portion of the patterned substrate is P1, and the effective polishing pressure of the convex portion is When the effective polishing pressure is P2, the same effect can be realized by adjusting the set polishing load P so that P2> P '>P> P1. Under normal polishing conditions, the polishing rate generally exhibits characteristics proportional to the polishing pressure. In the present invention, an additive that gives an inflection point depending on the polishing pressure to the polishing rate means that the polishing rate of a substrate having no pattern is sufficiently small up to a certain polishing pressure by the additive, as compared with the case where the additive is not added. A polishing pressure that is higher than the inflection point means an additive that gives a polishing rate characteristic that is sufficiently higher than the polishing rate below the inflection point. Refers to what is shown.
The additive that gives the polishing rate an inflection point depending on the polishing pressure is
Organic polymer anionic surfactants, nonionic surfactants and the like are preferably used. In particular, as the anionic surfactant, those containing ammonium acrylate as a copolymerization component are preferably used. In a polishing method for polishing a film to be polished by relatively moving a polishing platen and a substrate while a substrate having a film to be polished is pressed against the polishing cloth while supplying an abrasive onto the polishing cloth of the polishing platen. The pressing pressure of the substrate having the film to be polished against the polishing cloth is 100.
~ 1000 gf / cm2, preferably 200
More preferably, it is ˜500 gf / cm 2. With the polishing method of the present invention, for example, a predetermined substrate such as a semiconductor chip having at least a silicon oxide film formed thereon can be polished.

[0010]

BEST MODE FOR CARRYING OUT THE INVENTION A polishing agent comprising a substrate as an abrasive grain and an additive which gives a polishing pressure dependent inflection point to a polishing rate,
When the set polishing pressure is P and the effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P1 and the effective polishing pressure of the convex portion is P2, the pressure P'where the inflection point appears in the polishing rate of the substrate without the pattern Select a convex part that has a polishing pressure higher than the pressure at which the inflection point appears, depending on the pattern shape of the film to be polished, by adjusting the concentration of the additive so that P2> P '>P> P1 It is possible to realize the characteristic of polishing physically.
Further, since the polishing rate after being flattened is a polishing rate at a set polishing pressure smaller than the pressure at which the inflection point appears,
Since the polishing after the flattening hardly progresses, the process control by the polishing time becomes easy. For the polishing pressure dependence of the polishing rate by this additive, see the literature (IEDM96 (Int
ernational Electronic Device Meeting) Proceedings)
(1996) p.349-352). as a result,
It is possible to realize high efficiency and high level planarization with little pattern density and size dependence.

With the above-mentioned polishing agent, when the pressure is such that the pressure at which an inflection point appears at the polishing rate of a substrate without a pattern becomes P ', the effective polishing pressure of the concave portion of the substrate on which the pattern is formed is P1, When the effective polishing pressure of the convex portion is P2, the same effect can be realized by adjusting the set polishing load P so that P2> P '>P> P1.

The film to be polished is polished by relatively moving the polishing platen and the substrate while pressing the substrate having the film to be polished against the polishing cloth while supplying the polishing agent onto the polishing cloth of the polishing platen. In the polishing method, the pressing pressure of the substrate having the film to be polished against the polishing cloth is the range in which the convex portions are selectively polished with respect to the pattern concave portions, depending on the pressure-dependent characteristics of the polishing rate that is mainly determined by the amount of the additive. Must be set to. Pressing pressure to the polishing cloth is 100-1000gf
/ Cm 2 is preferable, and 200 to 500 gf /
More preferably it is cm 2. To satisfy the in-plane uniformity of the polishing rate and the flatness of the pattern, 2 is required.
More preferably, it is from 00 to 500 gf / cm 2.
If the pressing pressure against the polishing cloth is greater than 1000 gf / cm 2, polishing scratches are likely to occur, and 100 gf / c
If it is less than m2, a sufficient polishing rate cannot be obtained.

Abrasive grains used in the polishing agent and polishing method of the present invention are inorganic oxide particles such as cerium oxide, silicon oxide and aluminum oxide, and cerium oxide particles are preferably used. Here, the concentration of the abrasive grains is not limited, but a range of 0.5 to 15% by weight is preferable from the viewpoint of easy handling of the suspension.

In the present invention, the additive that gives an inflection point to the polishing rate depending on the polishing pressure is an acrylic acid polymer and its ammonium salt, a methacrylic acid polymer and its ammonium salt, as long as it does not contain metal ions. , Water-soluble organic polymers such as polyvinyl alcohol, water-soluble anionic surfactants such as ammonium lauryl sulfate and ammonium polyoxyethylene lauryl ether sulfate, water-soluble nonionics such as polyoxyethylene lauryl ether and polyethylene glycol monostearate Examples thereof include surfactants and water-soluble amines such as monoethanolamine and diethanolamine. Among them, anionic surfactants and the like are preferably used, and in particular, at least one surfactant selected from water-soluble anionic surfactants such as polymer dispersants containing ammonium salt as a copolymerization component. To use. In addition, a water-soluble nonionic surfactant, a water-soluble anionic surfactant, a water-soluble cationic surfactant, etc. may be used in combination. The amount of these surfactants added was 0.
The range of 1 to 10 parts by weight is preferable. The molecular weight of the surfactant is preferably 100 to 50,000,
More preferably, it is 00 to 20000. As a method of adding the additive, it is preferable to mix it with the abrasive grain dispersion immediately before polishing. If the slurry supply pipe of the polishing machine is designed to be sufficiently mixed, the supply speed of the abrasive dispersion and the additive aqueous solution should be adjusted individually, and the mixture should be mixed to the specified concentration in the pipe. Is also possible. When stored for a long time after mixing the additives, the particle size distribution of the abrasive may change, but since no significant effect is seen on the polishing characteristics such as polishing rate and polishing scratches, the method of adding the surfactant is There is no limit.

As a method for producing an inorganic insulating film to which the polishing agent or polishing method of the present invention is applied, constant pressure CVD method or plasma C method is used.
VD method etc. are mentioned. The silicon oxide insulating film is formed by the constant pressure CVD method using monosilane: SiH4 as the Si source and oxygen: O2 as the oxygen source. It can be obtained by carrying out this SiH4—O2 system oxidation reaction at a low temperature of about 400 ° C. or lower. When phosphorus: P is doped to achieve surface flattening by high temperature reflow, it is preferable to use a SiH4—O2—PH3 based reaction gas. The plasma CVD method has an advantage that a chemical reaction that requires a high temperature under normal thermal equilibrium can be performed at a low temperature. There are two plasma generation methods, a capacitive coupling type and an inductive coupling type. As the reaction gas, SiH4 is used as a Si source, and SiH4-N2O-based gas using N2O as an oxygen source and tetraethoxysilane (TEO).
TEOS-O2-based gas (TEOS) using S as the Si source
-Plasma CVD method). Substrate temperature is 250
The reaction pressure is preferably in the range of to 400 ° C and the reaction pressure in the range of 67 to 400 Pa. Thus, the silicon oxide insulating film of the substrate used in the present invention may be doped with elements such as phosphorus and boron. Similarly, the silicon nitride film formation by the low pressure CVD method is
Dichlorosilane: SiH2Cl2 is used as the i source, and ammonia: NH3 is used as the nitrogen source. This SiH2Cl2-N
It is obtained by carrying out the H3 system oxidation reaction at a high temperature of 900 ° C. The plasma CVD method uses SiH as a Si source.
4. SiH4—NH3 based gas using NH3 as a nitrogen source can be mentioned. The substrate temperature is preferably 300 to 400 ° C.

As a predetermined substrate, a semiconductor substrate, that is, a semiconductor substrate at a stage where circuit elements and wiring patterns are formed,
A substrate in which at least a silicon oxide film is formed on a semiconductor substrate such as a semiconductor substrate in a stage where a circuit element is formed can be used. By polishing the silicon oxide film layer formed on such a semiconductor substrate with the above-described polishing agent and polishing method, unevenness on the surface of the silicon oxide film layer is eliminated, and a smooth surface is formed over the entire surface of the semiconductor substrate. This is the end when applied to the planarization process of the interlayer insulating film, but in the case of shallow trench isolation, the planarized silicon oxide film is further polished to the silicon nitride layer of the base layer. , Leaving only the silicon oxide film embedded in the element isolation portion. At this time, if the polishing rate ratio with respect to the silicon nitride serving as the stopper is large, the polishing rate after exposing the nitride film is small, and the polishing process margin is large. Further, in order to use for shallow / trench separation, it is also necessary that the number of scratches generated during polishing is small.
Here, as a polishing device, a general polishing device having a holder for holding a semiconductor substrate and a surface plate to which a polishing cloth (pad) is attached (a motor or the like whose rotation speed is changeable) is used is used. it can. As the polishing cloth, general non-woven cloth, foamed polyurethane, porous fluororesin, etc. can be used without any particular limitation. Further, it is preferable that the polishing cloth is grooved so that the polishing agent is accumulated. The polishing conditions are not limited, but the rotation speed of the surface plate is preferably a low rotation of 100 rpm or less so that the semiconductor does not jump out. The pressing pressure of the semiconductor substrate having the film to be polished against the polishing cloth is 100.
It is preferably from 1000 to 1000 gf / cm @ 2, and more preferably from 200 to 500 gf / cm @ 2 in order to satisfy the in-plane uniformity of the polishing rate on the wafer and the flatness of the pattern. During polishing, an abrasive is continuously supplied to the polishing cloth with a pump or the like. There is no limit to this supply,
It is preferable that the surface of the polishing cloth is always covered with an abrasive.

It is preferable that the semiconductor substrate after the polishing is thoroughly washed in running water, and then water droplets adhering to the semiconductor substrate are removed by using a spin dryer or the like and then dried. In this way, after forming the shallow trench isolation on the Si substrate, the insulating layer is formed, or after the silicon oxide insulating film layer is flattened, the aluminum wiring is formed on the insulating layer, and the oxidation film formed on the aluminum wiring is formed. The silicon film is flattened by the above method. By forming an upper aluminum wiring on the flattened silicon oxide film layer, forming a silicon oxide film between the wirings and on the wiring, and then polishing with a polishing agent and a polishing method of the present invention, an insulating film is obtained. Eliminates surface irregularities,
The entire surface of the semiconductor substrate is made smooth. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured. Alternatively, after forming a shallow trench isolation on a Si substrate, a groove of an embedded wiring is formed in an interlayer insulating film layer and its surface, and a barrier metal layer such as TiN or TaN and a seed layer for wiring metal are formed by a sputtering method. Then, Cu or a Cu / Al alloy is formed into a film by an electrolytic plating method or the like. By applying the polishing agent and the polishing method of the present invention to this film forming layer, the metal can be embedded only in the wiring groove portion. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured.

In addition, in the process of forming the capacitor of the memory device, in the trench type cell structure, when the buried structure of polysilicon or silicon oxynitride is formed,
Even in the stack type cell structure, the embedding process may be adopted to form a complicated structure, and the present invention can be applied to ferroelectric materials such as STO and BST as well as silicon oxide silicon and tantalum oxide films. Agents and polishing methods are applied.

The polishing agent and polishing method of the present invention are applied to a silicon oxide film or a silicon nitride film formed on a semiconductor substrate, Cu, Cu · A.
not only a metal film such as an l-alloy and a ferroelectric film, but also a silicon oxide film formed on a wiring board having predetermined wiring, glass,
Inorganic insulating film such as silicon nitride, metal film, optical glass such as photomask, lens, prism, etc., inorganic conductive film such as ITO, optical integrated circuit, optical switching element, optical waveguide, optical composed of glass and crystalline material End face of fiber, single crystal for optics such as scintillator, solid laser single crystal, LED sapphire substrate for blue laser, SiC, GaP, Ga
It is also used as a polishing method for semiconductor single crystals of As and the like, glass substrates for magnetic disks, magnetic heads and the like.

[0020]

(Example) (Example 1) (Preparation of slurry) Cerium carbonate hydrate at 800 ° C for 2 hours
Cerium oxide particles were prepared by firing in air for a period of time and dry pulverizing with a jet mill. Cerium oxide particles 1K
g, 23 g of a polyacrylic acid ammonium salt aqueous solution (40% by weight) as a dispersant, and 8977 g of deionized water were mixed, and ultrasonic dispersion was performed for 10 minutes while stirring. The obtained slurry was filtered with a 1-micron filter, and deionized water was further added to obtain a 5 wt% slurry. The slurry pH was 8.3. 600 g of the above cerium oxide slurry (solid content: 5% by weight) and polyacrylic acid having a molecular weight of 5000 (pH 6.5) as an additive (10
180% of 0%) ammonium salt aqueous solution (40% by weight) and 2220 g of deionized water were mixed to prepare a cerium oxide abrasive (cerium oxide solid content: 1% by weight) to which a surfactant was added.

(Blanket Wafer Polishing 1) Diameter 20
A blanket wafer in which a 1000 nm silicon oxide film was formed on a 0 mm Si substrate was produced. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. , Further processing pressure 100gf / c
The silicon oxide film was set to m 2 and the cerium oxide abrasive (solid content: 1% by weight) was dropped onto the surface plate at a rate of 200 cc / min while rotating the surface plate and the wafer at 50 rpm for 1 minute. Was polished. Similarly, the processing pressure is 200
Another wafer was polished by setting every 100 gf / cm 2 in the range of up to 800 gf / cm 2. The wafer after polishing was washed and dried, the film thickness was measured by an interference film thickness meter, and the change in film thickness before and after polishing was calculated. As a result, the pressure is 100 gf /
Polishing rate of cm2 is 24 nm / min, pressure is 200 gf
/ Cm2 polishing rate 41nm / min, pressure 300g
Polishing rate at f / cm2 is 65 nm / min, pressure is 400
Polishing rate of gf / cm2 is 85 nm / min, pressure is 50
The polishing rate at 0 gf / cm 2 is 105 nm / min, the polishing rate at a pressure of 600 gf / cm 2 is 123 nm / min,
Polishing rate at a pressure of 700 gf / cm2 is 146 nm / mi
n, pressure 800 gf / cm 2 polishing rate is 302 nm /
min, and an inflection point of the polishing rate was obtained at a processing pressure of 700 gf / cm 2.

(Blanket Wafer Polishing 2) Diameter 20
A blanket wafer in which a 1000 nm silicon oxide film was formed on a 0 mm Si substrate and a blanket wafer in which a 100 nm silicon nitride film was formed were prepared. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. , Further processing pressure 3
The cerium oxide abrasive (solid content: 1% by weight) was set to 00 gf / cm 2 and 200 cc / min on the surface plate.
The surface plate and the wafer were rotated at 50 rpm for 1 minute while dropping the silicon oxide film to polish the silicon oxide film. Similarly, the processing pressure was set to 300 gf / cm @ 2 and the silicon nitride film was polished. The wafer after polishing was washed and dried, the film thickness was measured by an interference film thickness meter, and the change in film thickness before and after polishing was calculated. As a result, the polishing rate of the silicon oxide film was 65 nm / min, the polishing rate of the silicon nitride film was 6 nm / min, and the polishing rate ratio (silicon oxide film polishing rate / silicon nitride film polishing rate) was 11
Met.

(Polishing of patterned wafer) Diameter 200 mm
After forming a 100 nm silicon nitride film on a Si substrate, a photoresist was applied to leave dots of a 100 × 100 μm 2 silicon nitride film at a pitch of 158 μm as a mask material, and a 400 nm trench was formed in the Si substrate by etching. Then, after forming a thin thermal oxide film, a silicon oxide film was formed to a thickness of 680 nm by a low pressure CVD method, and a pattern wafer was prepared in which a silicon oxide film was embedded in a trench of 500 nm including the silicon nitride film thickness. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. Further, the processing pressure was set to 300 gf / cm 2. The area ratio of the pattern protrusions on this wafer is about 35.
%, The effective polishing pressure P2 of the convex portion of the pattern at the start of polishing is about 860 gf / cm2 at the maximum, which is larger than the inflection point pressure of 700 gf / cm2, and the effective polishing pressure P1 of the concave portion of the pattern is set to 300 gf / cm2. Will be smaller than. While dropping the above cerium oxide abrasive (solid content: 1% by weight) on the surface plate at a speed of 200 cc / min, rotate the surface plate and the wafer at 50 rpm for 3 minutes,
The silicon oxide film was polished. Polishing was performed under the same conditions with the polishing time of 4 minutes and 5 minutes. After the wafer was washed and dried, the film thickness of the silicon oxide film on the silicon nitride film and the trench portion was measured by an interference film thickness meter, and the level difference at the boundary was measured by a stylus type step meter. The measurement result of the wafer after polishing for 3 minutes shows that the film thickness of the silicon oxide film on the silicon nitride film is 158 nm, the film thickness of the silicon oxide film in the trench portion is 650 nm, and the residual step is at least <10 nm or less. It was found that the flattening was completed. The measurement result of the wafer after polishing for 4 minutes shows that the film thickness of the silicon oxide film on the silicon nitride film is 102.
nm, the thickness of the silicon oxide film in the trench portion is 597 nm, and the measurement result of the wafer after polishing for 5 minutes shows that the thickness of the silicon oxide film on the silicon nitride film is 48 nm and the thickness of the silicon oxide film in the trench portion. Was 545 nm, and it was found that polishing hardly progressed after 3 minutes. In the actual formation of the shallow trench isolation, it is necessary to polish the convex portion up to the silicon nitride film, but when applied to the planarization CMP of the silicon oxide interlayer film, this is a very good characteristic. Recognize.

Example 2 (Preparation of Slurry) Cerium carbonate hydrate was added at 800 ° C. for 2 hours.
Cerium oxide particles were prepared by firing in air for a period of time and dry pulverizing with a jet mill. Cerium oxide particles 1K
g, 23 g of a polyacrylic acid ammonium salt aqueous solution (40% by weight) as a dispersant, and 8977 g of deionized water were mixed, and ultrasonic dispersion was performed for 10 minutes while stirring. The obtained slurry was filtered with a 1-micron filter, and deionized water was further added to obtain a 5 wt% slurry. The slurry pH was 8.3. 600 g of the above cerium oxide slurry (solid content: 5% by weight) and polyacrylic acid having a molecular weight of 5000 (pH 6.5) as an additive (10
135 g of 0%) ammonium salt aqueous solution (40 wt%) and 2265 g of deionized water were mixed to prepare a cerium oxide abrasive (cerium oxide solid content: 1 wt%) to which a surfactant was added.

(Blanket Wafer Polishing 1) Diameter 20
A blanket wafer in which a 1000 nm silicon oxide film was formed on a 0 mm Si substrate was produced. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. , Further processing pressure 100gf / c
The silicon oxide film was set to m 2 and the cerium oxide abrasive (solid content: 1% by weight) was dropped onto the surface plate at a rate of 200 cc / min while rotating the surface plate and the wafer at 50 rpm for 1 minute. Was polished. Similarly, the processing pressure is 200
Another wafer was polished by setting every 100 gf / cm 2 in the range of up to 800 gf / cm 2. The wafer after polishing was washed and dried, the film thickness was measured by an interference film thickness meter, and the change in film thickness before and after polishing was calculated. As a result, the pressure is 100 gf /
Polishing rate of cm2 is 35 nm / min, pressure of 200 gf
/ Cm2 polishing rate is 76nm / min, pressure 300g
Polishing rate at f / cm2 is 105 nm / min, pressure is 40
The polishing rate at 0 gf / cm2 is 128 nm / min, the polishing rate at a pressure of 500 gf / cm2 is 155 nm / min,
Polishing rate at a pressure of 600 gf / cm2 is 286 nm / mi
n, pressure 700 gf / cm @ 2 polishing rate is 401 nm /
Polishing rate of 520 n at a pressure of 800 gf / cm 2
m / min, and an inflection point of the polishing rate was obtained at a processing pressure of 500 gf / cm 2.

(Blanket Wafer Polishing 2) Diameter 20
A blanket wafer in which a 1000 nm silicon oxide film was formed on a 0 mm Si substrate and a blanket wafer in which a 100 nm silicon nitride film was formed were prepared. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. , Further processing pressure 3
The cerium oxide abrasive (solid content: 1% by weight) was set to 00 gf / cm 2 and 200 cc / min on the surface plate.
The surface plate and the wafer were rotated at 50 rpm for 1 minute while dropping the silicon oxide film to polish the silicon oxide film. Similarly, the processing pressure was set to 300 gf / cm @ 2 and the silicon nitride film was polished. The wafer after polishing was washed and dried, the film thickness was measured by an interference film thickness meter, and the change in film thickness before and after polishing was calculated. As a result, the polishing rate of the silicon oxide film was 106 nm / min,
The polishing rate of the silicon nitride film is 7 nm / min, and the polishing rate ratio (silicon oxide film polishing rate / silicon nitride film polishing rate) is 1
It was 5.

(Polishing of patterned wafer) Diameter 200 mm
After forming a 100 nm silicon nitride film on a Si substrate, a photoresist was applied to leave dots of a 100 × 100 μm 2 silicon nitride film at a pitch of 158 μm as a mask material, and a 400 nm trench was formed in the Si substrate by etching. Subsequently, after forming a thin thermal oxide film, a silicon oxide film is formed by a low pressure CVD method to a thickness of 680 nm, and a silicon wafer film is formed in a trench of 500 nm including the silicon nitride film thickness to form a patterned wafer. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. Further, the processing pressure was set to 300 gf / cm 2. The area ratio of the pattern protrusions on this wafer is about 35.
%, The effective polishing pressure P2 of the convex portion of the pattern at the start of polishing is about 860 gf / cm2 at the maximum, which is higher than the inflection point pressure of 500 gf / cm2, and the effective polishing pressure P1 of the pattern concave portion is set to 300 gf / cm2. Will be smaller than. While dropping the above cerium oxide abrasive (solid content: 1% by weight) on the surface plate at a speed of 200 cc / min, rotate the surface plate and the wafer at 50 rpm for 3 minutes,
The silicon oxide film was polished. Similarly, polishing was performed for polishing time of 4 minutes and 5 minutes. After the wafer was washed and dried, the film thickness of the silicon oxide film on the silicon nitride film and the trench portion was measured by an interference film thickness meter, and the level difference at the boundary was measured by a stylus type step meter. The measurement result of the wafer after polishing for 3 minutes shows that the silicon oxide film on the silicon nitride film has disappeared, the thickness of the silicon nitride film is 87 nm, and the thickness of the silicon oxide film in the trench portion is 4 nm.
It was 80 nm. It was found that the step was at least <10 nm or less and the flattening was completed. The measurement result of the wafer after polishing for 4 minutes shows that the film thickness of the silicon nitride film is 80 n.
m, the thickness of the silicon oxide film in the trench portion is 465 nm, and the measurement result of the wafer after polishing for 5 minutes shows that the thickness of the silicon nitride film is 73 nm and the thickness of the silicon oxide film in the trench portion is 44 nm.
It was 8 nm. It can be seen that after 3 minutes, the polishing hardly progressed and the residual level difference was at least <30 nm, which is a very good result. As described above, it is possible to apply to CMP for forming the shallow trench structure by adjusting the amount of the additive.

Comparative Example 1 (Blanket Wafer Polishing) A blanket wafer having a silicon oxide film of 1000 nm formed on a Si substrate having a diameter of 200 mm and a blanket wafer having a silicon nitride film formed of 100 nm were prepared. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. , Further processing pressure 300gf / cm
Setting to 2, while using a commercially available silica slurry on the surface plate (solid content: 12.5% by weight) at a rate of 200 cc / min, rotate the surface plate and the wafer at 50 rpm for 1 minute to oxidize. The silicon film was polished. Similarly, the processing pressure was set to 300 gf / cm @ 2 and the silicon nitride film was polished.
The wafer after polishing was washed and dried, the film thickness was measured by an interference film thickness meter, and the change in film thickness before and after polishing was calculated. As a result, the polishing rate of the silicon oxide film was 175 nm / min, the polishing rate of the silicon nitride film was 70 nm / min, and the polishing rate ratio (silicon oxide film polishing rate / silicon nitride film polishing rate) was 2.
It was 5.

(Pattern wafer polishing) Diameter 200 mm
After forming a 100 nm silicon nitride film on a Si substrate, a photoresist was applied to leave dots of a 100 × 100 μm 2 silicon nitride film at a pitch of 158 μm as a mask material, and a 400 nm trench was formed in the Si substrate by etching. Then, after forming a thin thermal oxide film, a silicon oxide film was formed to a thickness of 680 nm by a low pressure CVD method, and a pattern wafer was prepared in which a silicon oxide film was embedded in a trench of 500 nm including the silicon nitride film thickness. Set the above pattern wafer on the holder to which the suction pad for mounting the substrate to be attached is attached, and place the holder with the insulating film surface facing down on the surface plate of 600 mm in diameter to which the polishing pad made of porous urethane resin is attached. Further, the processing pressure was set to 300 gf / cm 2. Commercially available silica slurry (solid content: 1
2.5% by weight) at a rate of 200 cc / min while rotating the platen and the wafer at 50 rpm for 2 minutes,
The silicon oxide film was polished. Similarly, polishing was performed for polishing time of 3 minutes and 4 minutes. After the wafer was washed and dried, the film thickness of the silicon oxide film on the silicon nitride film and the trench portion was measured by an interference film thickness meter, and the level difference at the boundary was measured by a stylus type step meter. The measurement result of the wafer after polishing for 2 minutes shows that the film thickness of the silicon oxide film on the silicon nitride film is 112 nm, the film thickness of the silicon oxide film in the trench portion is 524 nm, and the residual step difference is 9 nm.
It was about 0 nm. The measurement result of the wafer after polishing for 3 minutes shows that the silicon oxide film on the silicon nitride film disappeared, the film thickness of the silicon nitride film was 62 nm, the film thickness of the silicon oxide film in the trench portion was 329 nm, and the residual step difference was It was about 130 nm. As a result of measuring the wafer after polishing for 4 minutes, the silicon nitride film disappeared and the Si substrate was exposed. It was possible to polish to the target position of the silicon nitride film in 3 minutes of polishing time, but the remaining step difference was as large as> 100 nm, and the polishing rate after the silicon nitride film was exposed did not decrease so much. Then, it is difficult to set the polishing time.

[0030]

According to the polishing agent and the polishing method of the present invention, in the recess CMP technique such as shallow trench isolation formation and metal buried wiring formation and the flattening CMP technique of the interlayer insulating film, a silicon oxide film, a buried film of metal or the like is formed. It is possible to remove excess film-forming layer and planarize it efficiently, at a high level, and easily in process control.

Claims (4)

[Claims] 1. An abrasive containing a substrate as an abrasive grain, and an additive containing an inflection point that gives a polishing rate-dependent inflection point to a polishing rate, and when the set polishing pressure is P, the concave portion of the substrate on which a pattern is formed is formed. Assuming that the effective polishing pressure is P1 and the effective polishing pressure of the convex portion is P2, the concentration of the additive is such that the pressure P'at which an inflection point appears in the polishing rate of the substrate without the pattern is P2> P '>P> P1. Adjusted abrasive. 2. The effective polishing pressure of the concave portion of the substrate on which the pattern is formed, when the polishing agent has an addition amount concentration at which the pressure at which the inflection point appears in the polishing rate of the substrate without the pattern becomes P ′. A method of polishing a substrate, wherein P1 and an effective polishing pressure of the convex portion are P2, and a set polishing load P is adjusted to satisfy P2> P '>P> P1. 3. The method for polishing a substrate according to claim 2, wherein the semiconductor chip on which at least a silicon oxide film is formed is polished. 4. The film to be polished is moved by relatively moving the polishing platen and the substrate while the substrate having the film to be polished is pressed against the polishing cloth while supplying the polishing agent onto the polishing cloth of the polishing plate. The substrate polishing method according to claim 2 or 3, wherein in the polishing step, the pressure of the substrate having the film to be polished against the polishing cloth is 100 to 1000 gf / cm 2.