JP2001054036A - Decoder and television receiver using it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a decoder that can simultaneously display a plurality of standard definition coding image signals without the need for a new additional device by decoding the standard definition coding image signals for a plurality of programs and sequentially outputting standard definition image signals for a plurality of the programs. SOLUTION: A multiplexer/demultiplexer selection circuit 2 demultiplexes and selects a coded image signal with standard definition and a coded audio signal and stores them to a coded image signal memory 4 under the control of a control circuit 3. A coded image signal decoding circuit 5 divides a 1-frame period or a 1-field period, reads the coded image signal from the coded image signal memory 4, applies time division to each program and decodes it. A decoded image signal format conversion circuit 6 rearranges decoded images in the display sequence, selects a display image under the control from the control circuit 3, converts the number of pixels so that it matches the number of pixels of an output device 9 to apply format conversion and outputs the image signal to the output device 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a decoding device for decoding coded data obtained by coding a digital signal by variable-length high-efficiency coding by variable-length decoding, and a television receiver using the same. About.

[0002]

2. Description of the Related Art In digital satellite broadcasting based on the ATSC standard, which has begun broadcasting in the United States, and digital broadcasting scheduled to be broadcast in Japan, high-definition images (H1920 × V1080, interlaced system) and standard are used. For a high-definition image (the number of pixels is H720 × V480, interlaced), the ratio of the number of pixels is 6: 1 and the ratio of the transfer rate is about 3: 1. Therefore, when transferring a high-definition coded image in one transfer band, a single program will be transferred, and when transferring a standard-definition coded image, a plurality of programs will be multiplexed and transferred. ing.

A device for receiving and displaying this signal is:
When a high definition image is displayed, a single received program is decoded and displayed. When a standard definition image is displayed, an image to be decoded is selected from a plurality of received programs and decoded and displayed. When a plurality of multiplexed standard-definition coded images transferred are displayed on a plurality of screens by dividing the screen, a plurality of high-definition coded image signals are decoded as described in JP-A-6-205317. A possible decoding circuit is required.

[0004]

In order to receive a high-definition coded image signal, a single decoding circuit may be provided, and a plurality of multiplexed standard-definition coded images are displayed on a screen at the same time. For this reason, it is not preferable to provide a plurality of decoding circuits capable of decoding a high-definition coded image signal because the cost of the receiver increases.

An object of the present invention is to use a decoding circuit capable of decoding a single high-definition coded image signal and simultaneously display a plurality of standard definition coded image signals without adding a new device. It is an object of the present invention to provide a decoding device capable of performing the above and a television receiver using the same.

[0006]

In order to achieve the above object, the present invention comprises a coded image signal demultiplexing / selection circuit and a coded image signal memory. In order to achieve the object of the present invention, a decoding apparatus according to the present invention comprises: a demultiplexing / selection circuit for separating and selecting a standard definition coded image signal and a coded audio signal of a plurality of transmitted programs; A coded image signal memory for switching and storing the standard definition coded image signal in a predetermined unit; and an ability to decode a high definition coded image signal of one program, and read out from the coded image signal memory. An encoded image signal decoding circuit for decoding a standard definition encoded image signal of the plurality of programs, and a control circuit for controlling the demultiplexing / selection circuit and the encoded image signal memory. Signals are sequentially output.

In this decoding device, a decoded image format conversion circuit and an output device are provided, and the image signal decoded by the encoded image signal decoding circuit is converted according to the form of the output device. A standard definition image signal of the program is output to the output device. It is also preferable to provide an encoded audio signal decoding circuit and decode the encoded audio signal output from the demultiplexing / selection circuit. It is preferable that a decoded audio format conversion circuit and an output device are provided, and the decoded audio signal is converted according to the form of the output device. A plurality of encoded audio signal decoding circuits for decoding the encoded audio signals of the plurality of programs output from the demultiplexing / selection circuit; and a format of the audio signal decoded by the encoded audio signal decoding circuit. It is more preferable to provide a plurality of decoded audio format conversion circuits for performing the conversion.

Further, an audio signal selection circuit may be provided, and one of the outputs of the plurality of format conversion circuits may be selected and output to an output device. Preferably, one of the plurality of decoded audio format conversion circuits is output to an output device, and the other decoded audio format conversion circuit is input to another device.

[0009] In order to achieve the object of the present invention, a decoding apparatus according to the present invention converts a coded signal obtained by time-division multiplexing one or more programs from a coded image signal, a coded audio signal, and a coded additional signal. Demultiplexing / selecting means for demultiplexing / selecting, a control means for controlling the demultiplexing / selecting means, and an encoded image signal for sequentially storing the encoded image signals in at least one or more programs by switching them in a predetermined unit Accumulating means, encoded image signal decoding means for reading and decoding the encoded image signals accumulated in the encoded image signal accumulating means in the order of accumulation, and image signals decoded by the encoded image signal decoding means , The decoded image signal form conversion means for converting the decoded image signal into a form suitable for the form of the output device, the coded sound signal decoding means for decoding the coded sound signal, and the decoding by the coded sound signal decoding means. The audio signal, characterized in that it comprises a decoding audio signal form converting means for converting to fit the form of the output device.

In this decoding device, it is preferable that the predetermined unit is a frame unit. Further, the coded image signal decoding means has a capability of decoding at least one or more high definition coded image signals, and can perform time division decoding of at least one or more standard definition coded image signals. Further, it is preferable to include a plurality of encoded audio signal decoding units and a plurality of audio signal form conversion units.

In order to achieve the object of the present invention, a television receiver according to the present invention comprises: a demultiplexer for separating and selecting a standard definition coded image signal and a coded audio signal of a plurality of transmitted programs; A coded image signal decoding circuit having the ability to switch between standard definition coded image signals of a plurality of programs in a predetermined unit and store them in a coded image signal memory to decode a high definition coded image signal of one program And decoding a standard definition coded image signal of the plurality of programs by a coded image signal decoding circuit, and displaying the standard definition image signals of the plurality of programs on a display device. In this television receiver, the plurality of programs are four programs, and it is preferable that the standard definition images of the four programs are respectively displayed on four divided parts of a display device.

In order to achieve the object of the present invention, a television receiver according to the present invention comprises a coded signal receiving means for receiving a time-division multiplexed coded signal, and a coded signal received by the coded signal receiving means. A demultiplexing / selection circuit for separating and selecting a standard definition coded image signal and a coded audio signal of a plurality of programs; and an encoded image signal for switching and storing the standard definition coded image signals of the plurality of programs in a predetermined unit A coded image signal decoding circuit having a memory and a capability of decoding a high definition coded image signal of one program, and decoding a standard definition coded image signal of the plurality of programs read from the coded image signal memory; And a control circuit for controlling the demultiplexing / selection circuit and the coded image signal memory; and an output device, and sequentially outputs the standard definition image signals of the plurality of programs to the output device. And it features. Further, in this television receiver, an encoded audio signal decoding circuit is provided,
The encoded audio signal output from the demultiplexing / selection circuit is decoded.

[0013] To achieve the object of the present invention, a television receiver according to the present invention comprises: a coded signal receiving means for receiving a coded signal obtained by time-division multiplexing at least one or more programs; Demultiplexing / selecting means for separating / selecting a coded image signal, a coded audio signal, and a coded additional signal from a multiplexed coded signal, control means for controlling the demultiplexing / selecting means, and at least one program An encoded image signal accumulating means for switching and sequentially accumulating the encoded image signals in a predetermined unit, and reading and decoding the encoded image signals accumulated in the encoded image signal accumulating means in the order of accumulation Coded image signal decoding means, decoded image signal form conversion means for converting the image signal decoded by the coded image signal decoding means to conform to the form of the output device, Encoded audio signal decoding means for decoding an encoded audio signal; decoded audio signal form conversion means for converting an audio signal decoded by the encoded audio signal decoding means so as to conform to the form of the output device; And characterized in that:

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below with reference to the drawings using examples.

FIG. 1 is a block diagram showing an embodiment of a decoding apparatus according to the present invention. In the figure, a decoding device includes a broadcast coded signal receiving unit 1, a demultiplexing / selecting circuit 2 for separating and selecting a coded image signal, a coded audio signal, and a coded additional signal from a coded signal, a control circuit 3, and a coded image. A signal memory 4, a high-definition encoded image signal decoding circuit 5, a decoded image format conversion circuit 6, an encoded audio signal decoding circuit 7,
It comprises a decoded audio format conversion circuit 8 and an output device 9. In this embodiment, the encoded image signal memory 4
Is FIFO (First in First out:
(Reads in the order in which they were written). The control circuit 3 controls the demultiplexing / selection circuit 2, the encoded image signal memory 4, the decoded image format conversion circuit 6, and the decoded audio format conversion circuit 8.

In this embodiment, the broadcast coded signal receiving section 1 may include a tuner. When a tuner is not included, the input signal from the antenna is connected to the broadcast coded signal receiving unit 1 via the tuner. The output device 9 includes a display device and a speaker. Thereby, a television receiver can be configured.

The broadcast coded signal receiving section 1 receives a broadcast coded signal obtained by time-division multiplexing a program coded at 6 or less, preferably 4 standard definition, and outputs it to the demultiplexing / selection circuit 2. The size of the standard definition encoded image signal is H720 × V4
80 and the size of the high-definition coded image signal is H1920.
In the case of × V1080, the number of pixels of the standard definition coded image signal is one sixth of the number of pixels of the high definition coded image signal.
Can decode a broadcast coded signal coded at six standard definitions. However, in decoding, it takes time to rearrange and extract programs, so that the decoding circuit 5 can actually decode only about five standard definition encoded image signals. Considering the arrangement of the decoded standard definition image on the screen, four programs are preferable. Therefore, in the present embodiment described below, a case will be described in which standard definition image signals of four programs are decoded.

Under the control of the control circuit 3 in the multiplex separation / selection circuit 2, four standard definition coded image signals and one coded audio signal are separated and selected. The four separated and selected encoded image signals are stored in the encoded image signal memory 4 in the order of program 1, program 2, program 3, and program 4 in frame units or field units under the control of the control circuit 3. Is done. The coded image signal decoding circuit 5 has a capability of decoding up to a high-definition coded image signal in the standard ATSC of US digital broadcasting in one frame period. Therefore, as described above, the high-definition coded image signal is
1080i (interlace) size of C (H1920
× V1080), the standard definition coded image signal is converted to an ATSC 480i (interlace) size (H720 × V48).
In the case of 0), since the ratio of the number of pixels is 6: 1, the decoding time in each standard definition coded image is only 1/6 of the decoding time in the high definition coded image from the ratio of the number of pixels.

Since there are four encoded image signals stored in the encoded image signal memory 4, the encoded image signal decoding circuit 5 divides one frame period or field period into four, and The coded image signal is read out from the memory 4 and time-divided for each program in a frame unit or a field unit and decoded. The decoded image signal format conversion circuit 6 sorts the decoded images in the display order,
It has a function of selecting a display image under the control of and a function of converting the number of pixels according to the number of pixels of the output device 9. After performing format conversion, the image signal is output to the output device 9. The coded voice signal decoding device 7 decodes the coded voice signal separated and selected by the demultiplexing / selection circuit 2. The decoded audio format conversion circuit 8 includes the control circuit 3
The format conversion is performed in accordance with the output device 9 under the control of, and output to the output device 9. As the audio format conversion, it is possible to convert a 6-channel surround signal into a 2-channel stereo signal, and vice versa.

As described above, a plurality of coded image signals separated and selected by the demultiplexing / selection circuit 2 are subjected to time division processing in frame units or field units, so that a single high-definition coded image signal decoding device can perform multiple time division processing. A standard definition encoded image signal can be decoded. In addition, which of the four standard definition programs is to be selected can be selected by the demultiplexing / selecting circuit 2 according to a command from the control circuit 3. In the above embodiment, the time-division decoding of four standard definition encoded image signals has been described. However, the number of standard definition encoded image signals to be time-division decoded can be set to six or less.

Hereinafter, the processing operation of a high-definition coded image signal,
That is, the relationship between decoding and display will be described with reference to FIG. FIG. 2 is a timing chart for explaining processing of a high-definition encoded image signal by the encoded image signal decoding circuit.
In the figure, the horizontal axis indicates time t, the vertical axis indicates the number of pixels processed in the first field and the second field, the solid line indicates the number of decoded pixels, and the broken line indicates the number of display pixels. The solid line 21
Indicates the number of decoded pixels obtained by decoding a high-definition coded image signal for one field of the first field, and a solid line 22 indicates a decoded pixel obtained by decoding a high-definition coded image signal for one field of the next field in the first field. Show the number, dotted line 2
Reference numeral 3 denotes the number of pixels obtained by reading the decoded pixels of the solid line 21 at double speed, and dotted line 24 denotes the number of pixels obtained by reading the decoded pixels of the solid line 22 at double speed. Similarly to the first field, the solid line 25 indicates the number of decoded pixels obtained by decoding the high definition coded image signal for one field of the second field, and the solid line 26 indicates the number of pixels for one field of the next field in the second field. The number of decoded pixels obtained by decoding the high-definition coded image signal is shown, and the dotted line 27 shows the number of pixels obtained by reading out the decoded pixels of the solid line 25 at double speed. In the drawing, the interval between t1 and t2, t2 and t3,... Indicates the time of one field.

As is apparent from the figure, the first field and the second field of the high definition coded image signal are decoded simultaneously. The decoding of the first and second fields is performed between times t1 and t3, and the decoded signal of the first field is read out for display between times t2 and t3 at twice the decoding speed, and The decoded signal of the two fields is read out at a speed twice as fast as the decoding for display between time t3 and time t4. As shown by solid lines 22 and 26, the image signal of the next field in the first and second fields is t3
And the image signal of the first field is read out for display between t4 and t5 as indicated by the dotted line 24. In this way, the images of the first field and the second field are output to the output device 9 continuously.

Next, the processing operation of the standard definition coded image signal, that is, the relationship between decoding and display will be described with reference to FIG. FIG. 3 is a timing chart for explaining the processing of the standard definition encoded image signal by the encoded image signal decoding circuit.
In the figure, the horizontal axis indicates time t, the vertical axis indicates the number of pixels processed in the first field and the second field, the solid line indicates the number of decoded pixels, and the broken line indicates the number of display pixels. Also, in the drawing, t1 to t2, t2 to t3,... Indicate half the time of one field, and t1 to t5 indicate one frame. Decoding is performed by dividing one frame into four. In the figure, program 1
~ CH4 to CH4 correspond to program 4, for example,
1st of CH1 indicates the first field of program 1, 2nd of CH1 indicates the second field of program 1, and similarly, CH1
1st field of program 2 is the first field of program 2 and 2n of CH2
d indicates the second field of program 2. Hereinafter, the same applies.

The first and second fields of CH1 are decoded as shown by solid lines 31 and 32 between times t1 and t2, and the first and second fields of CH2 are decoded by solid lines 33 between times t2 and t3. , 34, and the first and second fields of CH3 are
It is decoded as shown by solid lines 35 and 36 between 3 and t4,
The first field and the second field of CH4 are from time t4.
During t5, decoding is performed as shown by the solid lines 37 and 38. As described above, in the standard definition image signal of each channel, the first and second fields are simultaneously decoded in a period of about 1/4 of one frame.

On the other hand, the decoded signal of the solid line 31 is read out for display at time t3 to t4 as shown by the dotted line 39, and the decoded signal of the solid line 32 is read at time t5 to t6 as shown by the dotted line 40. The decoded signal of the solid line 33 is read out for display at a time t3 to t4 as shown by a dotted line 40, and the decoded signal of the solid line 34 is read out at a time t5 to t6 as shown by a dotted line 42 as shown by a dotted line 42. It is read out for display, and the decoded signal of the solid line 35 is at time t4 to t5 as shown by the dotted line 43.
The decoded signal of the solid line 36 is read out for display at time t6 to t7 as shown by the dotted line 44, and the decoded signal of the solid line 37 is read out at time t8 to t9 as shown by the dotted line 45. , And the decoded signal of the solid line 38 is read out for display from time t6 to time t7, as indicated by the dotted line 46. Thus, the first,
The second field is read and displayed once per frame. Accordingly, four standard definition images are displayed on the output device 9. As shown in FIGS. 2 and 3, it is possible to decode a plurality of standard definition encoded images which are simultaneously displayed by one high definition encoding device.

FIG. 4 is a plan view of an output device showing an output image of a standard definition coded image. As shown in the figure, images 51 to 54 of standard definition programs 1 to 4 are displayed on the display screen of the output device. By displaying a screen of four programs on one display device, it is possible to select a desired program while watching this screen. Further, in programs such as sports, images of different angles can be displayed.

The display position of each horizontal program can be changed by changing the reading order of the decoded images in the coded image signal memory 4 or by the decoded image format conversion circuit 6. The display position of each vertical program is changed based on the temporal relationship between the decoded pixels and the display pixels.
Not only in the reading order, but also in the encoded image signal memory 4.
It is necessary to change the order of storing in.

Next, another embodiment of the decoding apparatus according to the present invention will be described with reference to FIG. FIG. 5 is a block diagram showing another embodiment of the decoding apparatus according to the present invention. 5, the same components as those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted. In the figure, reference numeral 10 denotes a coded voice decoding circuit, 11 denotes a decoded voice format conversion circuit, and 12 denotes a decoded voice selection circuit.
Is a demultiplexing / selecting circuit 2 similar to the coded speech decoding circuit 7.
It is connected to the.

From a broadcast coded signal obtained by time-division multiplexing of the four standard definition coded programs received by the broadcast coded signal receiving unit 1, the demultiplexing / selection circuit 2 controls the control signal from the control circuit 3 to One coded image signal and two coded audio signals are separated and selected.

As described with reference to FIG. 1, the four coded image signals separated and selected by the demultiplexing / selection circuit 2 are divided into programs 1, 2 and 3 in frame units under the control of the control circuit 3. , Program 4 in the order of the encoded image signal memory 4
(In this embodiment, FIFO: First in Firsts
t out of memory is used). The coded image signal decoding circuit 5 has a capability of decoding up to a high-definition coded image signal in the standard ATSC of US digital broadcasting in one frame period. The high-definition coded image signal is converted to ATSC 1080i size (H1920 ×
V1080), the standard definition coded image signal is
In the case of the 80i size (H720 × V480), the ratio of the number of pixels is 6: 1, and the decoding time of each standard definition coded image is 1/6 of the decoding time of the high definition coded image based on the ratio of the number of pixels. I'm done. Since the number of encoded image signals stored in the encoded image signal memory 4 is four, the encoded image signal decoding circuit 5 divides one frame period into four, and performs encoding from the encoded image signal memory 4. The image signal is read out and decoded in a time-division manner for each program in frame units.
The decoded image signal format conversion circuit 6 rearranges the decoded images in the display order, selects a display image under the control of the control circuit 3, performs format conversion in accordance with the output device 9, and outputs it to the output device 9.

The coded voice signal decoding device 7 decodes the coded voice signal separated and selected by the demultiplexing / selection circuit 2. The decoded audio format conversion circuit 8 performs a format conversion according to the output device 9 under the control of the control circuit 3 and outputs the converted audio to the decoded audio selection circuit 12. The coded voice signal decoding device 10 decodes the coded voice signal separated and selected by the demultiplexing / selection circuit 2. Under the control of the control circuit 3, the decoded audio format conversion circuit 11 converts the format (change from 6-channel surround to 2-channel stereo or change from 2-channel stereo to 6-channel surround) according to the output device 9. And the like, and outputs the result to the decoded voice selection circuit 12. The decoded audio selection circuit 12 selects the decoded audio from the decoded audio format conversion circuit 8 or 11 under the control of the control circuit 3 and outputs it to the output device 9.

As described in the embodiment of FIG. 1, the sound of which program is selected, that is, the selection of the audio channel can be performed by the demultiplexing / selection circuit 2. It takes about 0.5 to 1 second to complete this, but this can be avoided by adding a new encoded speech decoding circuit 10 and decoded speech format conversion circuit 11.

In this embodiment, an example is shown in which two coded audio signal decoding circuits 7 and 10 are used. However, by providing two or more coded audio signal decoding circuits, for example, n circuits, n Can be output. Further, in this embodiment, by eliminating the decoded audio selection circuit 12, connecting the output of the decoding format conversion circuit 8 directly to the output device 9, and connecting the decoded audio format conversion circuit 11 to another device, for example, a VTR, There is an effect that a voice different from the voice heard from the speaker can be recorded on the VTR.

By using a plurality of encoded audio signal decoding circuits in this manner, a plurality of decoded audio signals are selected and output or output simultaneously, one is output to a speaker, and the other is output to another device. Can output. Further, by switching the coded audio signal to be demultiplexed and selected by the demultiplexing / selection circuit 2, the decoded audio signal can be switched by one coded audio signal decoding circuit 7. Further, a plurality of standard definition coded image signals separated and selected by the demultiplexing selection circuit are subjected to time division processing in frame units or field units, so that a single high definition coded image signal decoding device can provide a plurality of standard definition code signals. The decoded image can be decoded and displayed simultaneously.

[0035]

As described above, according to the present invention,
A plurality of standard definition coded image signals separated and selected by the demultiplexing / selection circuit are subjected to time division processing in frame units or field units, so that a single high definition coded image signal decoding device provides a plurality of standard definition encoded images. Can be decrypted.

[Brief description of the drawings]

FIG. 1 is a block diagram showing an embodiment of a decoding device according to the present invention.

FIG. 2 is a timing chart for explaining processing of a high-definition encoded image signal by an encoded image signal decoding circuit.

FIG. 3 is a timing chart for explaining processing of a standard definition encoded image signal by an encoded image signal decoding circuit.

FIG. 4 is a plan view of an output device showing an output image of a standard definition encoded image.

FIG. 5 is a block diagram showing another embodiment of the decoding device according to the present invention.

[Explanation of symbols]

1 ... Broadcast coded signal receiving unit 2 ... Demultiplexing / selection circuit 3
... Control circuit, 4 ... Encoded image signal memory, 5 ... Encoded image signal decoding circuit, 6 ... Decoded image format conversion circuit, 7 ... Encoded audio signal decoding circuit, 8 ... Decoded audio format conversion circuit, 9 ... Output Apparatus, 10 ... encoded audio signal decoding circuit, 11 ... decoded audio format conversion circuit, 12
... Decoding voice selection circuit.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H04N 7/081 H04N 7/13 Z 7/24 (72) Inventor Keisuke Inada Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa 292 F-term in Hitachi Multimedia Systems Development Division (Reference) 5C025 BA02 BA03 BA04 BA05 BA06 BA25 BA27 BA28 BA30 CA06 DA01 DA04 5C059 KK06 LA00 MA00 RB01 RB14 SS02 SS05 SS30 UA05 UA36 5C063 AA01 AB20 AC05 BA14 CA29 5J064 AA02 BB13 BC01 BD02

Claims (16)

[Claims] 1. A demultiplexing / selection circuit for separating and selecting a transmitted standard definition coded image signal and a coded audio signal of a plurality of programs, and a standard definition coded image signal of the plurality of programs in a predetermined unit. A coded image signal memory for switching and storing, and a capability of decoding a high definition coded image signal of one program, and decoding a standard definition coded image signal of the plurality of programs read from the coded image signal memory And a control circuit for controlling the demultiplexing / selecting circuit and the coded image signal memory, and sequentially outputting standard definition image signals of the plurality of programs. . 2. The decoding device according to claim 1, further comprising a decoded image format conversion circuit and an output device, wherein the image signal decoded by the coded image signal decoding circuit is converted according to the form of the output device. And a decoding device for outputting the standard definition image signals of the plurality of programs to the output device. 3. The decoding device according to claim 1, further comprising an encoded audio signal decoding circuit, and decoding the encoded audio signal output from said demultiplexing / selection circuit. 4. The decoding device according to claim 3, further comprising a decoded audio format conversion circuit and an output device, wherein the decoded audio signal is converted according to the form of the output device. Device. 5. The decoding apparatus according to claim 1, wherein a plurality of encoded audio signal decoding circuits for decoding encoded audio signals of a plurality of programs output from said demultiplexing / selection circuit, and said encoded audio signal. A decoding device, comprising: a plurality of decoded audio format conversion circuits for converting the format of an audio signal decoded by a signal decoding circuit. 6. The decoding device according to claim 5, further comprising an audio signal selection circuit, wherein one of the outputs of the plurality of format conversion circuits is selected and output to an output device. . 7. The decoding device according to claim 5, wherein one of the plurality of decoded audio format conversion circuits is output to an output device, and the other decoded audio format conversion circuit is input to another device. A decoding device characterized by the above-mentioned. 8. A demultiplexing / selecting means for separating and selecting a coded image signal, a coded audio signal, and a coded additional signal from a coded signal obtained by time-division multiplexing of one or more programs, and Control means for controlling; and coded image signal storing means for switching and storing the coded image signals in at least one or more programs in a predetermined unit and sequentially storing the coded image signals.
An encoded image signal decoding unit that reads out and decodes the encoded image signals stored in the encoded image signal storage unit in the order of accumulation, and an output device that outputs the image signal decoded by the encoded image signal decoding unit. A decoded image signal form conversion means for converting to a form, a coded sound signal decoding means for decoding the coded sound signal, and a sound signal decoded by the coded sound signal decoding means for the form of the output device. And a decoded audio signal form conversion means for converting the decoded audio signal to conform to the above. 9. The decoding device according to claim 8, wherein said predetermined unit is a frame unit. 10. The decoding apparatus according to claim 8, wherein said coded image signal decoding means has a capability of decoding at least one or more high definition coded image signals,
A decoding device capable of performing time-division decoding of one or more standard definition encoded image signals. 11. The decoding apparatus according to claim 8, further comprising a plurality of encoded audio signal decoding means and a plurality of audio signal form conversion means. 12. A multiplex separation method for separating and selecting a transmitted standard definition coded image signal and a coded audio signal of a plurality of programs, and switching the standard definition coded image signals of the plurality of programs in a predetermined unit. Decoding the standard definition coded image signals of the plurality of programs by a coded image signal decoding circuit having the ability to decode the high definition coded image signal of one program Decrypted by the circuit,
A television receiver for displaying standard definition image signals of the plurality of programs on a display device. 13. The television receiver according to claim 12, wherein said plurality of programs are four programs, and standard definition images of said four programs are respectively displayed on four divided parts of a display device. Television receiver. 14. An encoded signal receiving means for receiving an encoded signal which has been time division multiplexed, and a standard definition encoded image signal and an encoded audio signal of a plurality of programs received by said encoded signal receiving means are separated. A demultiplexing / selecting circuit for selecting, a coded image signal memory for switching and accumulating standard definition coded image signals of the plurality of programs in a predetermined unit, and an ability to decode a high definition coded image signal of one program. And controlling the encoded image signal decoding circuit for decoding the standard definition encoded image signals of the plurality of programs read from the encoded image signal memory, the demultiplexing / selection circuit, and the encoded image signal memory. A television receiver, comprising: a control circuit; and an output device, and sequentially outputs standard definition image signals of the plurality of programs to the output device. 15. The television receiver according to claim 14, further comprising an encoded audio signal decoding circuit, wherein the encoded audio signal output from said demultiplexing / selection circuit is decoded. . 16. An encoded signal receiving means for receiving an encoded signal in which at least one or more programs are time-division multiplexed, an encoded image signal, an encoded audio signal, Demultiplexing / selecting means for separating / selecting an encoded additional signal, control means for controlling the demultiplexing / selecting means, and switching and accumulating the coded image signals in at least one or more programs in a predetermined unit. Coded image signal storage means, coded image signal decoding means for reading and decoding the coded image signals stored in the coded image signal storage means in the order of accumulation, and decoding by the coded image signal decoding means A decoded image signal form conversion means for converting the obtained image signal to conform to the form of the output device;
Coded audio signal decoding means for decoding the coded audio signal; decoded audio signal form conversion means for converting the audio signal decoded by the coded audio signal decoding means so as to conform to the form of the output device; A television receiver comprising: a device;