JP2001053027A5

JP2001053027A5 -

Info

Publication number: JP2001053027A5
Application number: JP1999225266A
Authority: JP
Filing date: 1999-08-09
Publication date: 2005-06-16
Anticipated expiration: 2019-08-09

Description

【００１６】
【課題を解決するための手段】
図１は本発明の原理的構成の説明図であり、この図１を参照して本発明における課題を解決するための手段を説明する。
図１（ａ）乃至（ｃ）参照
（１）本発明は、半導体装置の製造方法において、半導体１上に、Ｓｉ_x（Ｇｅ_yＣ_1-y）_1-x層２及びＳｉ_v（Ｇｅ_wＣ_1-w）_1-v層３（但し、０＜ｘ＜ｖ≦１，ｙ≦１，ｗ≦１）を順次堆積させたのち、Ｓｉ_v（Ｇｅ_wＣ_1-w）_1-v層３上に金属層４を堆積させ、加熱処理により金属化合物層５，６を形成する際に、Ｓｉ _v （Ｇｅ _w Ｃ _1-w ） _1-v 層３の厚さを、堆積させる金属層４の膜厚により決定しておくことを特徴とする。 0016.
[Means for solving problems]
FIG. 1 is an explanatory diagram of a principle configuration of the present invention, and a means for solving a problem in the present invention will be described with reference to FIG. 1.
See FIGS. 1 (a) to 1 (c)
(1) The present invention provides a method of manufacturing a semiconductor device, on the semiconductor _{_{1, Si x (Ge y C}} 1-y) 1-x layer 2 and _{_{_{Si v (Ge w C 1-}}} w) 1-v layer 3 (where, 0 <x <v ≦ 1 , y ≦ 1, w ≦ 1) mixture was allowed to sequentially _{_{_{deposited, Si v (Ge w C 1}}} -w) depositing a metal layer 4 on _1-v layer 3, in forming the metal compound layers 5 and 6 by heat treatment, that you determined by the thickness of the _{_{_{Si v (Ge w C 1-}}} w) 1-v layer 3, the thickness of the metal layer 4 deposited It is a feature.

（２）また、本発明は、半導体装置の製造方法において、半導体１上に、Ｓｉ _x （Ｇｅ _y Ｃ _1-y ） _1-x 層２及びＳｉ _v （Ｇｅ _w Ｃ _1-w ） _1-v 層３（但し、０＜ｘ＜ｖ≦１，ｙ≦１，ｗ≦１）を順次堆積させたのち、Ｓｉ _v （Ｇｅ _w Ｃ _1-w ） _1-v 層３上に金属層４を堆積させ、加熱処理により金属化合物層５，６を形成する際に、Ｓｉ_x（Ｇｅ_yＣ_1-y）_1-x層２の組成比を、堆積させる金属層４の膜厚、及び、Ｓｉ_v（Ｇｅ_wＣ_1-w）_1-v層３の組成比及び膜厚によって決定することを特徴とする。 (2) Further, the present invention provides a method of manufacturing a semiconductor device, on the semiconductor _{_{1, Si x (Ge y C}} 1-y) 1-x layer 2 and _{_{_{Si v (Ge w C 1-}}} w) 1-v layer 3 (where, 0 <x <v ≦ 1 , y ≦ 1, w ≦ 1) After are sequentially _{_{_{deposited, Si v (Ge w C 1}}} -w) depositing a metal layer 4 on _1-v layer 3 is, in forming the metal compound layers 5 and 6 by heat _{_{treatment, Si x (Ge y C 1}} -y) 1-x layer 2 of the composition ratio, film thickness of the metal layer 4 deposited, and, Si _v (Ge _{_w} C _{_1-w)} and determining the relative proportion and the thickness of _1-v layer 3.

Claims

On the semiconductor, an Si _x (Ge _y C _1-y ) _1-x layer and an Si _v (Ge _w C _1-w ) _1-v layer (where 0 <x <v ≦ 1, y ≦ 1, w ≦ 1) is sequentially deposited, and then a metal layer is deposited on the Si _v (Ge _w C _1-w ) _1-v layer, and when the metal compound layer is formed by heat treatment , the Si _v (Ge _w C _1-w ) A method of manufacturing a semiconductor device , wherein the thickness of the _1-v layer is determined by the thickness of the metal layer to be deposited .

On the semiconductor, Si _{x x} (Ge _{y y} C _{1-y 1-y} ) _{1-x 1-x} Layer and Si _{v v} (Ge _{w w} C _{1-w 1-w} ) _{1-v 1-v} After sequentially depositing layers (where 0 <x <v ≦ 1, y ≦ 1, w ≦ 1), the Si _{v v} (Ge _{w w} C _{1-w 1-w} ) _{1-v 1-v} When depositing a metal layer on the layer and forming a metal compound layer by heat treatment, the Si layer _{x x} (Ge _{y y} C _{1-y 1-y} ) _{1-x 1-x} The composition ratio of the layers, the film thickness of the metal layer to be deposited, and the Si _{v v} (Ge _{w w} C _{1-w 1-w} ) _{1-v 1-v} A method of manufacturing a semiconductor device, characterized by determining the composition ratio and the film thickness of the layers.