JP2001044522A - Manufacture of thermopile - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the manufacture of a termoplie which prevents p++-Si from dissolving when silicon is etched, and is easily manufactured. SOLUTION: A diaphragm part 3 is formed on a silicon substrate 2, and a thermopile is formed of impurity-diffused Si and a conductive substance at the diaphragm part 3. In this case, an SiO2 layer is formed on the silicon substrate 2 and then removed at a part where impurities need not diffuse, and impurities are diffused in an oxygen atmosphere to form an impurity-diffused Si layer in a desired pattern and an SiO2 layer containing impurities over the entire surface of the substrate; and an Si3N4 layer, etc., is formed on the SiO2 layer containing the impurities, and then the SiO2 layer containing the impurities, Si3N4 layer, etc., at a contact formation part and a diaphragm hole formation part of the thermopile are removed. Then a conductive substance layer is provided to form the termopile, and thereafter silicon etching is carried out to form the diaphragm part.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for manufacturing a thermopile.

[0002]

2. Description of the Related Art Thermopiles comprising a plurality of thermocouple elements are used for various measurements and detections in addition to the field of contact / non-contact temperature detection. As such an example, the present inventor has proposed a thermopile type flow velocity sensor (Japanese Patent Laid-Open No. 9-2286).
No. 20).

This thermopile type flow rate sensor is an excellent flow rate sensor having an effect that an accurate flow rate can be calculated without the need for providing an external circuit such as a temperature compensation circuit.

The thermopile of this thermopile type flow rate sensor is made of silicon in which boron is diffused at a high concentration (hereinafter referred to as "p ⁺⁺ ").
-Si ") and aluminum.

That is, a drawing of this flow sensor is shown in FIG.
It will be described using FIG. The flow rate sensor indicated by reference numeral 1 in FIG.
A silicon substrate (Si substrate) 2 as a support substrate
And a silicon dioxide layer (SiO_TwoLayer) and trisilicon tetranitride
Layer (Si_ThreeN _FourLayer)
Diaphragm 3 and a fin formed on the diaphragm 3
Micro heater 4 as a heater and micro heater 4
Downstream, on the diaphragm 3 except for the cold junction forming part
And a power supply terminal 6A,
6B for supplying a drive current to the micro heater 4
Power supply wiring 6 and output terminals 7A and 7B,
-Output the first temperature detection signal output from the mopile 5
Output wiring 7 and the upstream side of the micro heater 4
Formed on the diaphragm 3 except for the cold junction forming portion
The upstream thermopile 8 and the output terminals 9A and 9B
The second temperature detection output from the upstream thermopile 8
A second output wiring 9 for outputting an output signal.
Has been established.

FIG. 2 shows an enlarged top view of the thermopile (FIG. 2).
(A)) and a sectional view (FIG. 2 (b)). In this case, since the downstream thermopile 5 and the upstream thermopile 8 have the same configuration, the downstream thermopile 5 will be described. The thermocouple constituting the downstream thermopile 5 is composed of p ⁺⁺ -Si and aluminum,
As shown in (b), the cold junction 5 of the downstream thermopile 5
A is provided on a portion of the Si substrate 2 (thickness: about 400 μm) where the diaphragm 3 is not formed, and the hot junction 5B of the downstream thermopile 5 is on the diaphragm 3 composed of the SiO ₂ layer and the Si ₃ N ₄ layer. It is provided in.

According to the downstream thermopile 5, an output voltage of several tens of mV can be obtained in a flow velocity range of 0.01 m / sec to 3 m / sec, so that large amplification is not required and signal processing becomes possible. Here, a process of forming a thermopile will be described with reference to FIG.

First, as shown in FIG. 3A, the surfaces of both surfaces of a Si substrate 2 are oxidized to form an SiO ₂
It is formed on both sides of the i-substrate 2. Next, as shown in FIG. 3B, the SiO ₂ layer is etched by photolithography, a window is opened on the upper surface (upper side in the figure) of the Si substrate, and boron (B; Boron) which is a p-type impurity is To the concentration, p
^++- Si layer 10 is formed. Then, the p ⁺⁺ -Si layer 10
Is formed, the SiO ₂ layer on the surface is removed.

Subsequently, as shown in FIG.
By oxidizing the surfaces of both surfaces of the substrate (including the p ⁺⁺ -Si layer 10) 2, SiO ₂ layers are formed again on both surfaces of the Si substrate 2.

Then, a Si ₃ N ₄ layer is formed on both surfaces of the Si substrate 2 by vapor deposition, and the surface is oxidized to cover the Si ₃ N ₄ layer, thereby forming a SiO ₂ layer. As a result, the SiO ₂ / Si ₃ N ₄ / SiO ₂ layer 11 is formed on both surfaces of the Si substrate 2.

Next, a photoresist film is formed, and the upper surface is exposed using a mask corresponding to the contact hole for wiring.
As shown in FIG. 3D, SiO ₂ / Si ₃ N ₄ / SiO ₂
The layer 11 is removed, and a contact hole 12 is formed. On the other hand, the lower surface is exposed with a mask corresponding to the diaphragm, and the SiO ₂ / Si ₃ N ₄ / Si corresponding to the diaphragm is exposed.
The O ₂ layer 11 is removed.

Subsequently, as shown in FIG. 3E, an aluminum thin film (Al thin film) 13 which is a conductive material for wiring is formed.
Is formed by vacuum evaporation, the unnecessary Al thin film is removed by etching, leaving only the wiring pattern portion by photolithography, and sintering is performed.

Next, as shown in FIG.
iO_TwoLayer 14 is formed by vapor deposition and photolithography
To open a window corresponding to the bonding pad position,
iO _TwoThe bonding pad 15 is removed by removing the layer.
To form

Subsequently, as shown in FIG.
The substrate 2 is anisotropically etched using the SiO ₂ / Si ₃ N ₄ / SiO ₂ layer 11 as a mask to form a concave portion, thereby forming the diaphragm 3. Through the above steps, the downstream thermopile 5 and the upstream thermopile 8 are formed.

In the above process, when etching the Si substrate 2 using the SiO ₂ / Si ₃ N ₄ / SiO ₂ layer 11 as a mask, the etching rate of p ⁺⁺ -Si depends on the etching rate of silicon which does not undergo boron diffusion. 1/1 compared to speed
The fact that it is about 00 is used. However, this does not mean that p ^++- Si does not dissolve in the etchant at all, and that the p ^++- Si surface on which the silicon dioxide film is formed after the high concentration diffusion of boron has a relatively high etching rate, Are melted by the etching process, thereby causing a problem such as an extreme increase in electric resistance or a break in conduction at a contact.

To solve such a problem, the present inventors have
The reactive ion etching apparatus (RIE) is used to etch silicon in the vertical direction to form a film having high selectivity with respect to a Si etchant used for etching an SiO ₂ layer or the like, thereby forming p ⁺⁺ −. A technique for preventing the dissolution of Si has been proposed in the past.

This technique will be described with reference to FIG.
FIG. 4A is a view showing a thermopile, and FIG.
FIGS. 4B to 4H show the process of forming the cross section along the line AA in FIG.

As shown in FIG. 4B, boron, which is a p-type impurity, is diffused into the Si substrate 2 by ion implantation or the like.
^++- Si layer 10 is formed. Next, a resist layer having an opening was formed on the p ⁺⁺ -Si layer 10 by photolithography (see FIG. 4C). Then, p ⁺⁺ -Si
A portion corresponding to the opening of the layer 10 is etched by a reactive ion etching method.

After removing the resist layer, a SiO ₂ layer is formed on both sides by heat treatment or the like, and a Si ₃ N ₄ layer is formed on the SiO ₂ layer by CVD or the like (hereinafter, these two layers are combined together to form a Si ₃ N ₄ layer). ₃ N ₄ / SiO ₂ layer 11).

Thereafter, a resist layer is formed, and Si ₃ N ₄
/ Si0 masked except portions to be removed out of the _two layers, performing exposure. As a result, Si as shown in FIG. ₄ (f) ₃ N 4 /
Unnecessary portions of the Si0 ₂ layer is removed.

Then, as shown in FIG. 4 (g), an aluminum (or platinum) thin film 1 which is a conductive material for wiring is used.
3 is formed by vacuum evaporation or the like, and unnecessary aluminum thin films are removed by photolithography and etching, leaving only the wiring portions. Finally, the diaphragm 3 is formed by adding an anisotropic etching to the lower side of the Si substrate 2 to form a concave portion.

However, in such a manufacturing method, in the reactive ion etching, the etching rate varies in the wafer surface, and as a result, the wiring resistance and the heat capacity of the sensor vary in the wafer surface.

[0023]

SUMMARY OF THE INVENTION The present invention solves the above-mentioned conventional problems, that is, it prevents the dissolution of p ^++- Si when etching silicon, and provides a thermopile which is easy to manufacture. It is intended to provide a manufacturing method.

[0024]

According to a first aspect of the present invention, there is provided a method of manufacturing a thermopile, comprising the steps of: forming a diaphragm portion on a silicon substrate; and forming an impurity diffusion Si and a conductive material on the diaphragm portion. In a method for manufacturing a thermopile, a portion that does not require impurity diffusion is removed after forming an SiO ₂ layer on a silicon substrate, and the impurity is diffused in a desired pattern by diffusing the impurity in an oxygen atmosphere. After forming an Si layer and an SiO ₂ layer containing impurities on the entire surface of the substrate, and then forming a Si ₃ N ₄ layer on the SiO ₂ layer containing the impurities, a contact forming portion of the thermopile and a diaphragm are formed. the hole forming portion, after removing the SiO ₂ layer and Si ₃ N ₄ layer or the like containing impurities, to form a thermopile is provided a conductive material layer, then edge A thermopile fabrication method for forming the diaphragm section performs ring.

[0025]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the method for manufacturing a thermopile according to the present invention, it is necessary to oxidize a portion of a silicon substrate which does not require impurity diffusion into SiO _{2 in} advance of impurity diffusion. By forming such a mask layer made of SiO ₂ , diffusion of impurities to necessary portions becomes easy.

It is necessary to diffuse impurities in an atmosphere containing oxygen (oxygen atmosphere). Oxygen in this atmosphere also forms a SiO ₂ layer on the surface of the part where the impurities are diffused. Examples of the diffused impurity include boron.

In the prior art, a SiO ₂ layer was formed on a p ⁺⁺ -Si layer made of silicon in which boron was diffused at a high concentration. At this time, the boron concentration on the surface of the p ⁺⁺ -Si layer decreases, and this portion is
It was etched at the same time.

However, in the present invention, p
^During the formation of the ^++- Si layer, a boron SiO ₂ layer is formed on the entire surface of the substrate including the portion where the boron SiO ₂ layer is formed, thereby preventing a decrease in the boron concentration of the p ⁺⁺ -Si layer. As a result, the influence on the p ⁺⁺ -Si layer at the time of etching the Si layer is prevented.

Hereinafter, an example of the method for manufacturing a thermopile according to the present invention will be described with reference to model diagrams. FIG. 5 (a)
Is a thermopile produced according to the present invention.
FIG. 5 schematically shows a manufacturing process for the cross section in FIG.
(B) to FIG. 5 (g).

[0030] First, by heating in an oxidizing atmosphere in the Si substrate (silicon substrate) 2, (see FIG. 4 (b)) SiO ₂ (silicon dioxide) layer is provided, then, SiO ₂ layer unnecessary portions impurity diffusion Is removed.

Next, in a oxygen atmosphere, boron as an impurity is diffused into the Si substrate to form an impurity-diffused Si layer in a desired pattern, that is, a p ^++- Si layer made of silicon in which boron is diffused at a high concentration. . At this time, boron diffuses into the SiO ₂ layer manufactured as described above to form a boron SiO ₂ layer.

Further, while the surface of the p ⁺⁺ -Si layer is oxidized by oxygen in atmosphere, together with the SiO ₂ layer is formed, boron SiO ₂ boron in the SiO ₂ layer is diffused
5 and an SiO ₂ layer (boron SiO ₂ layer) containing boron as an impurity is formed on the entire surface of the substrate (FIG. 5).
(C)).

Next, Si ₃ N _{4 is formed} on the boron SiO ₂ layer.
A layer or the like is formed by a CVD method or the like (see FIG. 5D). Thereafter, a photoresist film (not shown) is formed, the upper surface is exposed using a mask only at a portion corresponding to the wiring contact hole, and the lower surface is exposed using a mask only at a portion corresponding to the diaphragm.
The contact holes 12 and the Si ₃ N ₄ / SiO ₂ layer 11 at the diaphragm forming portion are removed.

Further, metals such as aluminum and platinum;
Alternatively, a conductive material layer made of various alloys or the like and provided as a thin film wiring is provided, and a thermopile including a plurality of thermocouples including a p ^++- Si layer and a conductive material is formed, and then hydrazine, tetramethyl Ammonium hydride (T
MAH), anisotropic silicon etching using potassium hydroxide, etc., to remove the Si layer on the back of the thermopile to form a diaphragm. During this etching, p ⁺⁺
Since there is no portion where the boron concentration is reduced in the -Si layer, the influence of the etching is extremely small.

According to the method for manufacturing a thermopile described above, there is no possibility that the p ⁺⁺ -Si layer is excessively etched, and the thermopile can be formed with high accuracy. It is possible to improve the manufacturing yield and suppress the variation in the resistance value. Since the etching does not proceed excessively, it is easy to control the processing time of the silicon etching, and the reliability of the obtained product is extremely high. Since the number of steps is small, manufacturing time can be reduced and cost can be reduced. Since reactive ion etching is not required, it is easy to reduce equipment costs, and it is not necessary to determine conditions for reactive ion etching. And the like.

[0036]

According to the method for producing a thermopile of the present invention, p
^++-An excellent thermopile manufacturing method that has many effects, such as being free from the possibility of excessively etching the Si layer, having good accuracy, high reliability, and having a small number of steps even in the etching process. .

[Brief description of the drawings]

FIG. 1 is a diagram showing an example of a flow rate sensor using a thermopile.

FIG. 2A is an enlarged top view of a thermopile. (B) It is a figure showing the sectional view of a thermopile.

FIG. 3 is a model diagram showing a method for manufacturing a thermopile according to the related art. (A)-(g) It is a model figure which shows each process of manufacture.

FIG. 4 is a model diagram showing a method for manufacturing a thermopile according to the related art. (A) It is an enlarged top view which shows a thermopile. (B)-(h) It is a model figure which shows the manufacturing process of the cross section in AA of (a).

FIG. 5 is a model diagram showing a method for manufacturing a thermopile according to the present invention. (A) It is an enlarged top view which shows a thermopile. It is a model figure showing a manufacturing process of a section in AA of (b)-(g) (a).

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Flow rate sensor 2 Si substrate 3 Diaphragm 4 Micro heater 5 Downstream thermopile 5A Cold junction 5B Hot junction 6 Power supply wiring 7 First output wiring 8 Upstream thermopile 9 Second output wiring 10 p ++-Si layer 11 (SiO ₂ /) Si ₃ N ₄ / SiO ₂ layer 12 Contact hole 13 Conductive substance such as Al 14 SiO ₂ layer 15 Bonding pad 16 Resist

Claims (1)

[Claims] A diaphragm portion provided on a silicon substrate;
Made of impurity-diffused Si and conductive material
In a method for manufacturing a thermopile for forming a thermopile,
And SiO on the silicon substrate_TwoAfter forming the layer, impurity diffusion
Important part of SiO_TwoRemove layer and remove impurities in oxygen atmosphere
To diffuse the impurity-diffused Si layer in a desired pattern,
SiO containing impurities on the entire substrate surface_TwoLayer and form
And then the impurity-containing SiO_TwoSi on the layer_ThreeN_FourLayers
After forming the contact, the contact formation part of the thermopile and the die
SiO containing impurities in the portion where flam holes are formed _TwoLayer and S
i_ThreeN_FourAfter removing the layer, etc., a conductive material layer is
A pile is formed, and then silicon etching is performed to form a diaphragm.
A method for producing a thermopile.