JP2001015457A - Production of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for producing a semiconductor device having electrodes arranged at a fine pitch and comprising a step for testing a large number of semiconductor devices collectively. SOLUTION: A semiconductor device tester e7 which can perform burn-in test of a wafer 401 not yet diced into chip size comprises a circuit substrate 303, a film 305, a positioning plate 307, and a retaining plate 309. The circuit substrate is connected through connection terminals 303a, 303b with a peripheral device and can receive or deliver various electric signals and a power supply voltage. The positioning plate has a through hole 307b and can align a wafer to be measured. The retaining plate has a plurality of ventilation through holes 309b. When the wafer is subjected to burn-in, it can be exposed to the convecting air. After burn-in, the wafer is diced into chip size packages.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art Conventionally, when testing a newly developed device, an IC socket adapted to the shape of the device to be measured has been used. The IC socket is in electrical contact with the device under test and serves as a means for transmitting electric signals between the peripheral device and the device under test.

[0003] IC socket, device under test, and I
Figure 2 shows the connection relationship between the C socket and the device under test
This will be described with reference to FIG. 9, FIG. 30, and FIG.

FIG. 29 is a mounting sectional view showing a connection relationship between the device under test 1, the IC socket 3, and the circuit board 5. The IC socket 3 has a plurality of contacts 3a, and is soldered to the circuit board 5 by the contacts 3a. The device under test 1 is pressed down by the holding portion 7 and is electrically connected to the contact 3 a of the IC socket 3.

FIG. 30 is a perspective view of the device under test 1 as viewed from the surface on which electrodes are formed. Here, the device under test 1 is a so-called CSP (Chip Size Package) device packaged in a chip size. The device under test 1 includes a plurality of electrodes 1a for input / output of electric signals and power supply. I
Each contact 3a provided in the C socket 3 is arranged so as to contact the corresponding electrode 1a.

FIG. 31 is a plan view of the circuit board 5 on which the device under test 1 and the IC socket 3 are mounted as viewed from above. The circuit board 5 is connected via the connection terminals 5a and 5b.
An electric signal can be transmitted to peripheral devices (not shown) such as an IC tester and a burn-in device.

By arranging the device under test 1, the IC socket 3, and the circuit board 5 as described above,
The electric signal and the power supply voltage input from the peripheral device to the circuit board 5 via the connection terminals 5a and 5b are transmitted to the IC socket 3
Is supplied from the electrode 1a to the device under test 1 via the contact 3a. The electric signal output from the device under test 1 follows the reverse path and reaches the peripheral device. The function test of the device under test 1 becomes possible by the electrical connection as described above.

In addition to the use of the IC socket as described above, particularly when performing a function test of a wafer level device,
A method is employed in which a probe needle is brought into contact with a signal input / output electrode of the device and a wafer pad serving as a power supply electrode.

In the function test using the probe needle, since the number of times of contact between the wafer and the probe needle increases, the contact durability of the probe needle becomes a problem. When the contact durability of the probe needle is low, the cost for the function test increases, and as a result, the price of the device itself increases. Therefore, generally, tungsten, beryllium copper, or the like having high hardness is used as the material of the probe needle.

FIG. 32 shows a probe card 13 provided with the probe needles 11. The probe card 13 has a predetermined circuit corresponding to the device to be measured printed thereon, and is capable of transmitting an electric signal to a peripheral device (not shown) via the connection terminals 13a and 13b.

FIG. 33 shows the positional relationship between the probe card 13 and the wafer 15 as a device to be measured. The electric signal supplied from the peripheral device is input to the probe card 13 from the connection terminals 13a and 13b, and reaches the probe needle 11 via a circuit formed on the probe card 13. Then, an electric signal is applied from the probe needles 11 to the pads formed on the wafer 15. Further, the electric signal output from the wafer 15 follows the reverse route and reaches the peripheral device. With the above configuration, a functional test of the wafer 15 can be performed.

[0012]

The function test using an IC socket and the function test using a probe needle have the following problems, respectively.

The current minimum pitch of the contacts of an IC socket is generally 0.65 mm. On the other hand, CSP
In recent years, as typified by (1), the package size has been reduced, and accordingly, the electrode pitch of the device has been reduced to 1.
It has shifted from 27 mm to 0.8 mm and 0.5 mm.
As described above, as the electrode pitch of the device is reduced, the pitch of the contacts of the IC socket needs to be reduced.

However, in order to reduce the pitch of the contacts of the IC socket to 0.65 mm or less, it is necessary to increase the processing accuracy of the IC socket. In this case, an increase in the manufacturing cost of the IC socket is inevitable, which may lead to a rise in the price of the device.

In addition, the number of IC sockets that can be mounted on a circuit board is limited due to the size of the IC socket body. By limiting the number of IC sockets mounted on a circuit board, the number of devices that can be functionally tested at one time is also limited. That is, the function test of the device using the conventional IC socket is not always efficient.

In order to improve the efficiency of the function test using the probe needles, it is desirable to increase the number of probe needles mounted on the probe card and simultaneously test many devices. However, the probe needle is conventionally fixed to the probe card with a resin or the like, and a large fixing space is required. Therefore, it is difficult to increase the number of probe needles without increasing the size of the probe card. Met.

Also, as the integration of devices is increasing,
The pitch of the pads of the device with which the probe needle comes into contact has been reduced. As the pitch of the pads is reduced in this manner, the pitch of the probe needles mounted on the probe card also needs to be reduced. However, with the conventional configuration, it has been difficult to narrow the pitch of the probe needles.

The present invention has been made in view of the above-mentioned problems, and has as its object to manufacture a semiconductor device having fine-pitch electrodes, and to test a large number of semiconductor devices at once. It is an object of the present invention to provide a method of manufacturing a semiconductor device including steps that can be performed.

[0019]

According to the present invention, there is provided a process for sealing a wafer surface with a resin, performing a burn-in test on the resin-sealed wafer, and Splitting the wafer into individual chip size packages after conducting a test. According to such a manufacturing method, a burn-in test is performed at a wafer level without dividing into chips, so that an improvement in manufacturing efficiency is realized. In addition, since there is no need to prepare a socket for each chip in the burn-in test, at least the cost of the socket is reduced.

[0020]

BRIEF DESCRIPTION OF THE DRAWINGS FIG.
Preferred embodiments of the method for manufacturing a semiconductor device according to the present invention will be described in detail. In the following description and the accompanying drawings, components having substantially the same functions and configurations are denoted by the same reference numerals, and redundant description is omitted.

(First Embodiment) As shown in FIG. 1, a semiconductor device test apparatus e1 according to a first embodiment of the present invention comprises a circuit board 103, a film 105, a positioning plate 107, and a holding plate 107. 109 is included.

The circuit board 103 has connection terminals 103a, 1
03b is connected to a peripheral device (not shown) so that various electric signals and power supply voltage can be input and output.
For example, a multilayer board is used as the circuit board 103.

The film 105, the positioning plate 107, and the holding plate 109 are provided with reference holes 105a, 107, respectively.
a, 109 a are provided at four corners, and are fixed to the circuit board 103 by pins 111.

The positioning plate 107 has a plurality of through holes 107b as positioning portions.
01 is possible. This through hole 10
7 b is formed according to the outer shape of the device under test 201.

FIG. 2 is a sectional view showing a semiconductor device test apparatus e1 according to the first embodiment and a plurality of devices under test 201 incorporated in the semiconductor device test apparatus e1 for various function tests. . Each device under test 201 is inserted into a through hole 107 b of the positioning plate 107, and
It is held down to 5. In order to evenly and appropriately apply the pressure from the holding plate 109 to each device to be measured 201, a cushioning material 113 is provided between each device to be measured 201 and the holding plate 109. The film 105 is pressed against the circuit board 103 by the pressure from the pressing plate 109.

The device under test 201, the film 105,
The connection of the circuit board 103 will be described with reference to FIG.

The device under test 20 is mounted on the circuit board 103.
The plurality of electrodes 1 are located at positions facing the plurality of electrodes 201a.
03c is formed.

On the surface of the film 105 on the device 201 side, a plurality of electrodes 201a of the device 201
A bump 105b is formed at a position opposite to. The bump 105b is a terminal capable of supplying a power supply voltage and inputting / outputting various electric signals, and is formed in a hemispherical shape by electrolytic plating. For example, it is formed of copper and its surface is plated with gold. In addition, instead of this, the protrusion may be formed by etching.

On the surface of the film 105 on the circuit board 103 side, electrodes (lands) 105c are formed at positions facing the plurality of electrodes 103c of the circuit board 103. Then, the bumps 10 formed on different surfaces of the film 105 are formed.
5b and the electrode 105c are electrically connected via the through hole 105d.

When a function test of the device under test 201 is performed, various electric signals and power supply voltages output from peripheral devices (not shown) are input to the circuit board 103 from the connection terminals 103a and 103b. Reaches the electrode 103c via the wiring circuit formed in the above. At this time, as shown in FIGS. 2 and 3, the electrode 103c is formed by the electrode 105c and the bump 105 formed on the film 105.
b, it is electrically connected to an electrode 201a formed on the device under test 201. Therefore, various electric signals and power supply voltages output from peripheral devices are
The measured device 20 is supplied to the device
1 will be driven electrically. Various electric signals output from the device under test 201 are transferred to bumps 105 b and electrodes 105 c formed on the film 105.
Through the electrode 103c, is taken into the circuit board 103, and is sent to peripheral devices.

As described above, according to the semiconductor device test apparatus e1 according to the first embodiment, since there is no contact formed by machining unlike the conventional IC socket 3, each device under test 201 It is possible to cope with the narrowing of the pitch of the plurality of electrodes 201a formed on the substrate. For example, even if the pitch of the electrodes 201a is 0.5 mm or less, a function test can be performed on the device under test 201.

Further, according to the semiconductor device test apparatus e1 according to the first embodiment, a plurality of devices under test 2
Since the positioning plate 107 for collectively aligning the devices under test 201 is provided as in the related art.
There is no need to prepare an IC socket every time. Therefore,
The cost of the IC socket is reduced.
Further, by using the area on the circuit board 103 occupied by the body portion of the IC socket, the number of devices under test 201 that can be mounted on the circuit board 103 increases, and a large number of Function test becomes possible.

(Second Embodiment) FIG. 4 shows a semiconductor device test apparatus e2 according to a second embodiment of the present invention.
FIG. 9 is a sectional view showing a plurality of devices under test 201 incorporated in the semiconductor device test apparatus e2 for various functional tests. As shown in FIG. 4, the semiconductor device test apparatus e2 according to the second embodiment has the same configuration as the semiconductor device test apparatus e1 according to the first embodiment except that the film 105 is replaced with a printed circuit board 115. Have

Each device under test 201 has a positioning plate 1
07 is inserted into the through hole 107 b of the holding plate 10.
9 is pressed against the printed circuit board 115. In order to evenly and appropriately apply the pressure from the holding plate 109 to each device to be measured 201, a cushioning material 113 is provided between each device to be measured 201 and the holding plate 109. Also, the printed circuit board 115
The circuit board 103 is pressed by the pressure from the holding plate 109.
Is pressed down.

Device to be measured 201, printed circuit board 11
5 and the connection of the circuit board 103 will be described with reference to FIG.

Device under test 20 on printed circuit board 115
A plurality of electrodes 20 of the device under test 201 are
A bump 115b is formed at a position facing 1a. The bump 115b is a terminal capable of supplying a power supply voltage and inputting / outputting various electric signals, and is formed in a hemispherical shape by electrolytic plating. For example, it is formed of copper and its surface is plated with gold. In addition, instead of this, the protrusion may be formed by etching.

On the surface of the printed board 115 on the circuit board 103 side, electrodes (lands) 115c are formed at positions facing the plurality of electrodes 103c of the circuit board 103.
The bumps 115b and the electrodes 115c formed on different surfaces of the printed board 115 are electrically connected through the through holes 115d.

When a functional test of the device under test 201 is performed, various electric signals and power supply voltages output from peripheral devices (not shown) are input to the circuit board 103 from the connection terminals 103a and 103b. Reaches the electrode 103c via the wiring circuit formed in the above. At this time, as shown in FIGS. 4 and 5, the electrode 103c is
15b, it is electrically connected to the electrode 201a formed on the device 201 to be measured. Therefore, various electric signals and power supply voltages output from the peripheral devices are supplied to the device under test 201, and the device under test 201 is electrically driven. Various electric signals output from the device under test 201 are transmitted from the electrodes 103c to the circuit board 10 via bumps 115b and electrodes 115c formed on the printed circuit board 115.
3 and transmitted to peripheral devices.

As described above, according to the semiconductor device test apparatus e2 according to the second embodiment, the same effects as those of the semiconductor device test apparatus e1 according to the first embodiment can be obtained.

According to the semiconductor device test apparatus e2 according to the second embodiment, the printed circuit board 1 is electrically connected between the device under test 201 and the circuit board 103.
The semiconductor device test apparatus e1 according to the first embodiment, which includes the film 15 and the film 105, can reduce the cost.

(Third Embodiment) A semiconductor device test apparatus e3 according to a third embodiment of the present invention is different from the semiconductor device test apparatus e2 according to the second embodiment as shown in FIG. It has a configuration including a circuit board 103, a printed board 115, a positioning plate 107, a holding plate 109, and a cushioning material 113.

However, in the semiconductor device test apparatus e3 according to the third embodiment, the circuit board 103, the printed board 115, and the positioning plate 107 are integrated as the first unit 121, and the holding plate 109 and the buffer The material 113 is integrated as a second unit 122.

When performing a function test of the device under test 201, the device under test 201 is stored in a device fixing portion 121a created by the through hole 107b of the positioning plate 107 constituting the first unit 121. And
The device under test 201 is pressed by the second unit 122 and is electrically connected to the printed circuit board 115 constituting the first unit 121. Further, since the printed circuit board 115 is electrically connected to the circuit board 103 in advance, the electric signal and the power supply voltage output from the peripheral device are supplied to the device under test 201 and output from the device under test 201. Electrical signals will also be transmitted to the peripheral devices.

As described above, according to the semiconductor device test apparatus e3 according to the third embodiment, the same effects as those of the semiconductor device test apparatus e2 according to the second embodiment can be obtained.

Further, the semiconductor device test apparatus e3 according to the third embodiment includes a first unit 121 integrally including a circuit board 103, a printed board 115, and a positioning plate 107, and a holding plate 109 and a cushioning material 113. , The circuit board 103, the printed board 115, and the positioning plate 1 when testing the device under test 201.
It is not necessary to assemble the 07, the holding plate 109, and the cushioning material 113 again, and the function test of the device to be measured can be performed in substantially the same procedure as when a conventional IC socket is used. Therefore, the efficiency of the function test is improved, and the cost for the test can be reduced.

In the semiconductor device test apparatus e3 according to the third embodiment, the printed circuit board 115 can be replaced with the film 105 provided in the semiconductor device test apparatus e1 according to the first embodiment. is there.

(Fourth Embodiment) As shown in FIG. 7, a semiconductor device test apparatus e4 according to a fourth embodiment of the present invention comprises a circuit board 103, a film 106, a rubber sheet 131, and a positioning plate 107. , And holding plate 109
. That is, the semiconductor device test apparatus e4 according to the fourth embodiment differs from the semiconductor device test apparatus e1 according to the first embodiment in that the film 105 is replaced with the film 106,
It has a configuration in which a rubber sheet 131 is added.

Film 106 and rubber sheet 131
Are provided with reference holes 106a and 131a at four corners, respectively, and are fixed to the circuit board 103 by pins 111 together with the positioning plate 107 and the holding plate 109.

FIG. 7 shows the device under test 202. The device under test 202 is the same CSP device as the device under test 201 described above, and is a BGA (Ball Grid Array). The positioning plate 107 has a plurality of through-holes 107b as positioning portions, and enables positioning of the device under measurement 202. This through hole 107b is
It is formed according to the outer shape of the device under test 202.

FIG. 8 is a sectional view showing a semiconductor device test apparatus e4 according to the fourth embodiment, and a plurality of devices under test 202 incorporated in the semiconductor device test apparatus e4 for various function tests. . Each device under test 202 is inserted into the through hole 107 b of the positioning plate 107, and the rubber sheet 1 is
31. And the holding plate 109
A buffer 113 is provided between each device 202 to be measured and the pressing plate 109 in order to uniformly and appropriately apply the pressure from the device 202 to each device under measurement 202. The rubber sheet 131 is pressed against the film 106 by the pressure from the pressing plate 109, and the film 106 is pressed against the circuit board 103.

Device under test 202, rubber sheet 13
The connection between the film 1, the film 106 and the circuit board 103 will be described with reference to FIG.

As described above, the device under test 202 is BG
A, and a plurality of solder balls are arranged as the electrodes 202a.

The device under test 20 is placed on the circuit board 103.
The plurality of electrodes 1 are located at positions facing the plurality of electrodes 202a.
03c is formed.

The electrode 106b is formed on the surface of the film 106 on the rubber sheet 131 side. Film 106
The electrode 106c is formed at a position facing the plurality of electrodes 103c of the circuit board 103 on the surface on the circuit board 103 side. The electrodes 106b and 106c formed on different surfaces of the film 106 are electrically connected through the through holes 106d.

The rubber sheet 131 is connected to the electrodes 106b of the film 106 and the electrodes 202a of the device 202 to be measured.
Anisotropic conductive rubber portion 131b is provided at a position opposed to.

When a functional test of the device under test 202 is performed, various electric signals and power supply voltages output from peripheral devices (not shown) are input to the circuit board 103 from the connection terminals 103a and 103b. Reaches the electrode 103c via the wiring circuit formed in the above. At this time, as shown in FIGS. 8 and 9, the electrode 103c is formed by the electrode 106c and the electrode 106b formed on the film 106.
Is electrically connected to the anisotropic conductive rubber portion 131b embedded in the rubber sheet 131. further,
The anisotropic conductive rubber portion 131b is electrically connected to an electrode 202a formed on the device under measurement 202. Therefore, various electric signals and power supply voltages output from the peripheral device are supplied to the device under measurement 202,
The device under test 202 is driven electrically. Various electric signals output from the device under test 202 are passed through the anisotropic conductive rubber portion 131b embedded in the rubber sheet 131 and the electrodes 106b and 106c formed on the film 106 to form the electrode 103c. Are taken into the circuit board 103 and sent to peripheral devices.

As described above, according to the semiconductor device test apparatus e4 according to the fourth embodiment, since there is no contact formed by machining unlike the conventional IC socket 3, the semiconductor device test apparatus e4 according to the first embodiment As in the semiconductor device test apparatus e1 according to the embodiment, the pitch of the plurality of electrodes 202a formed on each device under measurement 202 can be reduced. For example, the pitch of the electrode 202a is 0.5 mm
Even in the following case, it is possible to perform a function test on the device under measurement 202.

According to the semiconductor device test apparatus e4 of the fourth embodiment, a plurality of devices under test 2
Since the positioning plate 107 is provided for aligning the devices under test 202 at once, the device 202
There is no need to prepare an IC socket every time. Therefore,
The cost of the IC socket is reduced.
Furthermore, by using the area on the circuit board 103 occupied by the body portion of the IC socket, the number of devices under test 202 that can be mounted on the circuit board 103 increases, and a large number of Function test becomes possible.

In the case of a BGA such as the device under test 202, it is necessary to pay attention to the deformation of the ball-shaped electrode when performing various functional tests. In this regard, since the semiconductor device test apparatus e4 according to the fourth embodiment includes the rubber sheet 131 which has elasticity and can be electrically connected only in the thickness direction, it is formed on the device under measurement 202. The deformed electrode 202a is not deformed. Then, the anisotropic conductive rubber portion 131b provided on the rubber sheet 131 causes the elasticity of the anisotropic conductive rubber portion 131b.
2 comes into contact with the ball-shaped electrode 202a provided over a larger area. Therefore, according to the semiconductor device test apparatus e4 according to the fourth embodiment, each device under test 202 is reliably electrically connected to a peripheral device, and a highly accurate functional test can be performed.

(Fifth Embodiment) FIG. 10 shows a semiconductor device test apparatus e according to a fifth embodiment of the present invention.
5, and a plurality of devices under test 202 incorporated in the semiconductor device test apparatus e5 for various function tests.
FIG. As shown in FIG. 10, a semiconductor device test apparatus e5 according to the fifth embodiment differs from the semiconductor device test apparatus e4 according to the fourth embodiment in that the film 106 is replaced with a printed circuit board 116. Have

Each device under test 202 has a positioning plate 1
07 is inserted into the through hole 107 b of the holding plate 10.
9 presses against the rubber sheet 131. In order to uniformly and appropriately apply the pressure from the holding plate 109 to each device to be measured 202, a cushioning material 113 is provided between each device to be measured 202 and the holding plate 109. The rubber sheet 131 is
The printed board 116 is pressed by the pressure from the holding plate 109.
, And the printed circuit board 116 is pressed against the circuit board 103.

Device under test 202, rubber sheet 13
1, connection between the printed circuit board 116 and the circuit board 103 will be described with reference to FIG.

An electrode 116b is formed on the surface of the printed board 116 on the rubber sheet 131 side. On the surface of the printed circuit board 116 on the circuit board 103 side, the circuit board 103
The electrode 116c is located at a position facing the plurality of electrodes 103c.
Are formed. The electrodes 116b and 116c formed on different surfaces of the printed circuit board 116 are electrically connected through the through holes 116d.

The rubber sheet 131 is used for the printed circuit board 116.
Of the electrode 116b and the electrode 20 of the device under measurement 202
An anisotropic conductive rubber portion 131b is provided at a position facing 2a.

When a function test of the device under test 202 is performed, various electric signals and power supply voltages output from peripheral devices (not shown) are input to the circuit board 103 from the connection terminals 103a and 103b. Reaches the electrode 103c via the wiring circuit formed in the above. At this time, as shown in FIGS. 10 and 11, the electrode 103c is connected to the anisotropic conductive rubber portion 131b embedded in the rubber sheet 131 via the electrodes 116c and 116b formed on the printed circuit board 116. It is electrically connected.
Further, the anisotropic conductive rubber portion 131b is electrically connected to an electrode 202a formed on the device under measurement 202. Therefore, various electric signals and power supply voltages output from the peripheral devices are supplied to the device under test 202, and the device under test 202 is electrically driven. Various electric signals output from the device under test 202 are transmitted to the anisotropic conductive rubber portion 131 b embedded in the rubber sheet 131 and the printed circuit board 116.
The electrodes are taken into the circuit board 103 from the electrodes 103c via the electrodes 116b and 116c formed at the same time, and are sent to peripheral devices.

As described above, according to the semiconductor device test apparatus e5 according to the fifth embodiment, the same effects as those of the semiconductor device test apparatus e4 according to the fourth embodiment can be obtained.

According to the semiconductor device test apparatus e5 according to the fifth embodiment, the printed circuit board 1 is electrically connected between the device under test 202 and the circuit board 103.
The semiconductor device test apparatus e4 according to the fourth embodiment, which includes the film 16 and the film 106, can reduce the cost.

(Sixth Embodiment) A semiconductor device test apparatus e6 according to a sixth embodiment of the present invention will be described with reference to FIG.
As shown in (5), the semiconductor device testing apparatus e5 according to the fifth embodiment has a configuration including a circuit board 103, a printed board 116, a rubber sheet 131, a positioning plate 107, a holding plate 109, and a cushioning material 113. Things.

However, in the semiconductor device test apparatus e6 according to the sixth embodiment, the circuit board 103, the printed board 116, the rubber sheet 131, and the positioning plate 107 are integrated as a first unit 141, and The plate 109 and the cushioning material 113 are integrated as a second unit 142.

When the function test of the device under test 202 is performed, the device under test 202 is stored in the device fixing portion 141a created by the through hole 107b of the positioning plate 107 constituting the first unit 141. And
The device under test 202 is pressed by the second unit 142 and the rubber sheet 1 forming the first unit 141 is pressed.
31 will be electrically connected. The rubber sheet 131 is electrically connected to the printed board 116 in advance, and the printed board 116 is
Is electrically connected to Accordingly, the electric signal and the power supply voltage output from the peripheral device are supplied to the device under test 202, and the electric signal output from the device under test 202 is also transmitted to the peripheral device.

As described above, according to the semiconductor device test apparatus e6 according to the sixth embodiment, the same effects as those of the semiconductor device test apparatus e5 according to the fifth embodiment can be obtained.

Further, the semiconductor device test apparatus e6 according to the sixth embodiment includes a circuit board 103, a printed board 116, a rubber sheet 131, and a positioning plate 107.
Of the circuit board 103 and the printed circuit board 1 when the device under test 202 is tested because the first unit 141 and the second unit 142 are formed integrally with the holding plate 109 and the cushioning material 113.
16, there is no need to reassemble the rubber sheet 131, the positioning plate 107, the holding plate 109, and the cushioning material 113, and the functional test of the device to be measured can be performed in substantially the same procedure as when using a conventional IC socket. Becomes
Therefore, the efficiency of the function test is improved, and the cost for the test can be reduced.

In the semiconductor device test apparatus e6 according to the sixth embodiment, the printed circuit board 116 can be replaced with the film 106 provided in the semiconductor device test apparatus e4 according to the fourth embodiment. is there.

(Seventh Embodiment) A semiconductor device test apparatus e7 according to a seventh embodiment of the present invention will be described with reference to FIG.
As shown in FIG. 1, the circuit board 303, the film 305, the positioning plate 307, and the pressing plate 309 are included.

The circuit board 303 includes connection terminals 303a,
03b is connected to a peripheral device (not shown) so that various electric signals and power supply voltage can be input and output.
For example, a multilayer board is used as the circuit board 303.

The film 305, the positioning plate 307, and the holding plate 309 are provided with reference holes 305a, 307, respectively.
a, 309a are provided at the four corners, and are fixed to the circuit board 303 by pins 311.

The positioning plate 307 is provided with a through hole 307b as a positioning portion so that the position of the wafer 401 to be measured can be adjusted. This through hole 307b is
It is formed according to the outer shape of the wafer 401 to be measured.

The holding plate 309 has a plurality of ventilation holes 309b. For example, the measured wafer 40
When performing burn-in on 1
The wafer to be measured 401 can be exposed to the circulating air. Except for burn-in, these ventilation through holes 309b may be omitted.

A wafer to be measured 401 to be subjected to various functional tests by the semiconductor device test apparatus e7 according to the seventh embodiment will be described with reference to FIG.

The wafer 401 to be measured is coated with a resin, and is finally divided into a plurality of CSP devices 411. FIG. 15 shows an AA ′ section of the CSP device 411 in FIG. A plurality of electrodes 411b are provided on the surface of the device body 411a. Here, each electrode 411b is a so-called land type (LGA) having a flat surface.

FIG. 16 is a cross-sectional view showing the semiconductor device test apparatus e7 according to the seventh embodiment and the state of the wafer to be measured 401 immediately before being incorporated in the semiconductor device test apparatus e7 for various functional tests. is there. The holding plate 309 is provided with a buffer 313 at a position facing the wafer 401 to be measured. And the circuit board 30
3, the film 305 and the positioning plate 307 are shown in FIG.
As shown in FIG. 6, it is preferable to assemble in advance and to integrate them.

Then, the wafer to be measured 401 is incorporated in a semiconductor device test apparatus e7 according to the seventh embodiment, as shown in FIG. The measured wafer 401 is
It is inserted into the through hole 307b of the positioning plate 307,
It is pressed against the film 305 by the pressing plate 309. The pressure from the holding plate 309 is reduced by the cushioning material 313 provided on the holding plate 309.
It is evenly and appropriately given to the wafer 401 to be measured. The film 305 is pressed against the circuit board 303 by the pressure from the pressing plate 309.

The connection between the wafer to be measured 401, the film 305, and the circuit board 303 will be described with reference to FIG.

The circuit board 303 includes a wafer 401 to be measured.
The plurality of electrodes 30 are located at positions facing the plurality of electrodes 411b.
3c is formed.

On the surface of the film 305 on the side of the wafer 401 to be measured, bumps 305b are formed at positions facing the plurality of electrodes 411b of the wafer 401 to be measured. The bump 305b is a terminal capable of supplying a power supply voltage and inputting / outputting various electric signals, and is formed in a hemispherical shape by electrolytic plating. For example, it is formed of copper and its surface is plated with gold. In addition, instead of this, the protrusion may be formed by etching.

On the surface of the film 305 on the circuit board 303 side, electrodes (lands) 305c are formed at positions facing the plurality of electrodes 303c of the circuit board 303. Then, the bumps 30 formed on different surfaces of the film 305 are formed.
5b and the electrode 305c are electrically connected through the through-hole 305d.

When a function test of the wafer 401 to be measured is performed, various electric signals and power supply voltages output from peripheral devices (not shown) are input to the circuit board 303 from the connection terminals 303a and 303b, and the circuit board 303 And reaches the electrode 303c via the wiring circuit formed in the first step. At this time, as shown in FIGS. 17 and 18, the electrode 303c is formed by the electrode 305c formed on the film 305 and the bump 3
05b, it is electrically connected to the electrode 411b formed on the wafer 401 to be measured. Therefore,
Various electric signals and power supply voltages output from the peripheral device are supplied to the wafer to be measured 401 and the wafer to be measured 40
1 will be driven electrically. Various electric signals output from the wafer under test 401 are stored in the film 3
Through the bumps 305b and the electrodes 305c formed on the substrate 05, they are taken into the circuit board 303 from the electrodes 303c and sent to peripheral devices.

As described above, according to the semiconductor device test apparatus e7 according to the seventh embodiment, since there is no contact formed by machining, the wafer to be measured 40
It is possible to cope with narrowing of the pitch of the plurality of electrodes 411b formed in one. For example, even if the pitch of the electrodes 411b is 0.5 mm or less, it is possible to perform a functional test on the wafer 401 to be measured.

Further, according to the semiconductor device test apparatus e7 of the seventh embodiment, it is possible to perform various functional tests at the wafer level without dividing the chip into chips. Therefore, it is not necessary to prepare an IC socket for each chip, so that the cost for the IC socket is reduced.

Further, the semiconductor device test apparatus e7 according to the seventh embodiment is characterized in that the resin-coated CS
Compatible with P-level wafers, batch testing / burn-in becomes possible by incorporating this semiconductor device testing device e7 into a conventional test / monitor burn-in device.

Although the semiconductor device testing apparatus e7 according to the seventh embodiment is provided with the film 305, a printed circuit board may be used instead.

(Eighth Embodiment) A semiconductor device test apparatus e8 according to an eighth embodiment of the present invention is shown in FIG.
As shown in the figure, the circuit board 303, the film 306, the rubber sheet 331, the positioning plate 307, and the pressing plate 30
9 is included. That is, the semiconductor device test apparatus e8 according to the eighth embodiment is
The semiconductor device testing apparatus e7 according to the embodiment has a configuration in which the film 305 is replaced with a film 306 and a rubber sheet 331 is added.

Film 306 and rubber sheet 331
Are provided with reference holes 306a and 331a at four corners, respectively, and are fixed to the circuit board 303 by pins 311 together with the positioning plate 307 and the holding plate 309.

The positioning plate 307 is provided with a through hole 307b as a positioning portion, so that the position of the wafer 402 to be measured can be adjusted. This through hole 307b is
It is formed according to the outer shape of the wafer 402 to be measured.

A wafer to be measured 402 to be subjected to various functional tests by the semiconductor device test apparatus e8 according to the eighth embodiment will be described with reference to FIG.

The wafer to be measured 402 is coated with a resin similarly to the wafer to be measured 401, and is finally divided into a plurality of CSP devices 412. BB 'of the CSP device 412 in FIG.
A cross section is shown in FIG. A plurality of electrodes 412b are provided on the surface of the device body 412a. Here, each electrode 412b is of a ball type and the CSP device 4
12 is configured as a BGA.

FIG. 22 is a sectional view showing the semiconductor device test apparatus e8 according to the eighth embodiment and the state of the wafer 402 to be measured immediately before being incorporated in the semiconductor device test apparatus e8 for various functional tests. is there. The holding plate 309 is provided with a cushioning material 313 at a position facing the wafer 402 to be measured. And the circuit board 30
3, the film 306, the rubber sheet 331, and the positioning plate 307 are preferably assembled in advance and integrated as shown in FIG.

Then, as shown in FIG. 23, the wafer to be measured 402 is incorporated in a semiconductor device test apparatus e8 according to the eighth embodiment. The measured wafer 402 is
It is inserted into the through hole 307b of the positioning plate 307,
It is pressed against the rubber sheet 331 by the pressing plate 309. The pressure from the holding plate 309 is evenly and appropriately applied to the wafer 402 to be measured by the cushioning material 313 provided on the holding plate 309. The rubber sheet 331 is pressed against the film 306 by the pressure from the pressing plate 309, and the film 306 is pressed against the circuit board 303.

The wafer to be measured 402, the rubber sheet 331,
The connection between the film 306 and the circuit board 303 will be described with reference to FIG.

The wafer to be measured 402 is a BGA as described above.
And a plurality of solder balls are arranged as electrodes 412b.

The circuit board 303 includes a wafer 402 to be measured.
The plurality of electrodes 30 are located at positions facing the plurality of electrodes 412b.
3c is formed.

An electrode 306b is formed on the surface of the film 306 on the rubber sheet 331 side. Film 306
The electrode 306c is formed at a position facing the plurality of electrodes 303c of the circuit board 303 on the surface on the side of the circuit board 303. The electrodes 306b and 306c formed on different surfaces of the film 306 are electrically connected through the through holes 306d.

The rubber sheet 331 has an anisotropic conductive rubber portion 331b at a position facing the electrode 306b of the film 306 and the electrode 412b of the wafer 402 to be measured.

When a function test of the wafer 402 to be measured is performed, various electric signals and power supply voltages output from peripheral devices (not shown) are input to the circuit board 303 from the connection terminals 303a and 303b, and are supplied to the circuit board 303. And reaches the electrode 303c via the wiring circuit formed in the first step. At this time, as shown in FIGS. 23 and 24, the electrode 303c is formed by the electrode 306c and the electrode 30 formed on the film 306.
6b, it is electrically connected to the anisotropic conductive rubber portion 331b embedded in the rubber sheet 331. Further, the anisotropic conductive rubber portion 331 b is
Is electrically connected to the electrode 412b formed at the bottom. Therefore, various electric signals and power supply voltages output from the peripheral devices are supplied to the wafer 402 to be measured, and the wafer 402 to be measured is electrically driven.
Various electric signals output from the wafer 402 to be measured are passed through the anisotropic conductive rubber portion 331 b embedded in the rubber sheet 331 and the electrodes 306 b and 306 c formed on the film 306, and the electrode 303 c Are taken into the circuit board 303 and sent to peripheral devices.

As described above, according to the semiconductor device test apparatus e8 according to the eighth embodiment, the same effects as those of the semiconductor device test apparatus e7 according to the seventh embodiment can be obtained.

By the way, as shown in FIG.
In the case of GA, it is necessary to pay attention to the deformation of the ball-shaped electrode when performing various functional tests. In this regard, since the semiconductor device test apparatus e8 according to the eighth embodiment includes the rubber sheet 331 which has elasticity and can be electrically connected only in the thickness direction, it is formed on the wafer 402 to be measured. The electrode 412b is not deformed. The anisotropic conductive rubber portion 3 provided on the rubber sheet 331
Due to its elasticity, 31b comes into contact with a ball-shaped electrode 412b provided on the wafer 402 to be measured in a wider area. Therefore, according to the semiconductor device test apparatus e8 according to the eighth embodiment, the measured wafer 402 is reliably electrically connected to the peripheral device, and a highly accurate functional test can be performed.

Although the semiconductor device test apparatus e8 according to the eighth embodiment is provided with the film 306, a printed circuit board may be used instead.

(Ninth Embodiment) A semiconductor device test apparatus e9 according to a ninth embodiment of the present invention will be described with reference to FIG.
As shown in the figure, the circuit board 503, the probe needles 511, the probe sheet 521, and the rubber sheet 531 are included.

The circuit board 503 is connected to a peripheral device (not shown), and can input and output various electric signals and power supply voltages.

The probe needle 511 is made of tungsten or beryllium copper. In the probe needle 511, the contact portion 51 with the rubber sheet 531 is provided.
1a is to prevent oxidation and ensure good contact
Gold plating 511 is applied. The gold plating process is not limited to the contact portion 511a, and may be applied to the entire surface of the probe needle 511.

As the probe sheet 521, a heat-resistant rubber sheet or a membrane sheet made of glass fiber / polyimide is used. The probe needle 511 is buried in the probe sheet 521, and is provided with a notch 511b as shown in FIG. 26 to prevent the probe needle 511 from dropping off the probe sheet 521.

The rubber sheet 531 includes a plurality of electrodes 503 a formed on the circuit board 503 and a plurality of probe needles 5.
An anisotropic conductive rubber portion 531a that electrically connects the eleven contact portions 511a is provided.

A description will be given of a wafer to be measured on which various function tests can be performed by the semiconductor device test apparatus e9 according to the ninth embodiment. Here, as an example, FIG. 27 shows an IC chip 601 formed in one section of the wafer to be measured. This IC chip 601 has a plurality of pads 601a. Usually, the pad 601a is formed of aluminum. The pad 6 of the IC chip 601
All regions (particularly, regions where circuits are formed) except the region where 01a is formed are protected from the outside atmosphere by the resist film 601b.

When performing various functional tests on the IC chip 601 using the semiconductor device test apparatus e9 according to the ninth embodiment, as shown in FIG. 28, each probe needle 511 is attached to the corresponding pad 601a. Make contact. As described above, the pad 601a is provided with the resist film 601b.
Is not formed, the pad 601a and the probe needle 511 are electrically connected.

When performing a function test of the IC chip 601,
Various electric signals and power supply voltages output from a peripheral device (not shown) are input to the circuit board 503, and are routed through a wiring circuit formed on the circuit board 503 to form the electrode 503a.
Reach At this time, as shown in FIG.
“a” is electrically connected to the probe needle 511 by an anisotropic conductive rubber portion 531 a provided on the rubber sheet 531. Therefore, various electric signals and power supply voltages output from the peripheral device are supplied to the IC chip 601 through the probe needle 511, and the IC chip 601 is
Will be electrically driven. Various electric signals output from the IC chip 601 are transmitted to the probe needle 51.
1 and via the anisotropic conductive rubber portion 531a provided on the rubber sheet 531, are taken into the circuit board 503 from the electrode 503a, and are further sent to peripheral devices.

Further, even if, for example, a slight step is formed in each pad due to the laminated structure of the IC chip 601, the step is absorbed by the rubber sheet 531 and the probe sheet 521, so that each probe needle 511 is formed.
Is a pad 601a formed on the IC chip 601.
Will surely come into contact with Further, when manufacturing the semiconductor device test apparatus e9 according to the ninth embodiment, it is possible to allow a margin for the accuracy of the tip alignment of each probe needle 511.

As described above, according to the semiconductor device test apparatus e9 of the ninth embodiment, the probe needle 511 made of tungsten or beryllium copper is provided, and this probe needle 511 is used as a test object. Since it is configured to be in contact, the same contact durability as the conventional probe card 13 can be obtained. Therefore, the semiconductor device test apparatus e9 can be used not only in the function test in the development stage of the semiconductor device but also in the product inspection process.

Moreover, the semiconductor device test apparatus e9
According to the method described above, since the tip of the probe needle 511 is configured to be vertically in contact with the test object, the pad of the test object can be finely pitched (for example, the electrode pitch is 0.5 mm or less). Can also be handled. Further, the probe needle 511 can be brought into contact with all the pads formed on the test object at once. The embedding of the probe needles 511 into the probe sheet 521 can also reduce the manufacturing cost during mass production by automation.

The semiconductor device test apparatus e9 according to the ninth embodiment can be combined with a wafer level test burn-in apparatus. As a result, it is possible to reduce the investment in the tester in the test of the finished product of the semiconductor device, and as a result, the test cost and the device cost are reduced.

As described above, the preferred embodiments of the present invention have been described with reference to the accompanying drawings. However, the present invention is not limited to such embodiments. It is clear that a person skilled in the art can conceive various changes or modifications within the scope of the technical idea described in the claims, and those modifications naturally fall within the technical scope of the present invention. It is understood to belong.

[0121]

As described above, according to the present invention,
It becomes possible to easily and inexpensively test a semiconductor device having fine pitch electrodes. In addition, it is possible to improve the durability of the semiconductor device for the test. Further, a large number of semiconductor devices can be tested at once, and the efficiency of the test can be improved.

[Brief description of the drawings]

FIG. 1 is a perspective view showing a configuration of a semiconductor device test apparatus according to a first embodiment.

FIG. 2 is a sectional view of the semiconductor device test apparatus of FIG.

FIG. 3 is an enlarged view of a cross-sectional view of the semiconductor device test apparatus of FIG. 2;

FIG. 4 is a cross-sectional view illustrating a configuration of a semiconductor device test apparatus according to a second embodiment.

5 is an enlarged cross-sectional view of the semiconductor device test apparatus of FIG.

FIG. 6 is a cross-sectional view illustrating a configuration of a semiconductor device test apparatus according to a third embodiment.

FIG. 7 is a perspective view illustrating a configuration of a semiconductor device test apparatus according to a fourth embodiment.

8 is a sectional view of the semiconductor device test apparatus of FIG.

FIG. 9 is an enlarged view of a cross-sectional view of the semiconductor device test apparatus of FIG.

FIG. 10 is a cross-sectional view illustrating a configuration of a semiconductor device test apparatus according to a fifth embodiment.

FIG. 11 is an enlarged cross-sectional view of the semiconductor device test apparatus of FIG.

FIG. 12 is a sectional view showing a configuration of a semiconductor device test apparatus according to a sixth embodiment.

FIG. 13 is a perspective view illustrating a configuration of a semiconductor device test apparatus according to a seventh embodiment.

FIG. 14 is a plan view showing a wafer to be measured which can be tested by the semiconductor device test apparatus of FIG.

15 is a cross-sectional view of a CSP device obtained from the wafer to be measured in FIG.

16 is a cross-sectional view showing a state immediately before the wafer to be measured of FIG. 14 is incorporated into the semiconductor device test apparatus of FIG. 13;

17 is a cross-sectional view showing a state where the wafer to be measured of FIG. 14 is incorporated in the semiconductor device test apparatus of FIG. 13;

18 is an enlarged cross-sectional view of the semiconductor device test apparatus of FIG.

FIG. 19 is a perspective view showing a configuration of a semiconductor device test apparatus according to an eighth embodiment.

20 is a plan view showing a measured wafer that can be tested by the semiconductor device test apparatus of FIG. 19;

21 is a sectional view of a CSP device obtained from the wafer to be measured in FIG.

FIG. 22 is a sectional view showing a state immediately before the wafer to be measured of FIG. 20 is incorporated into the semiconductor device test apparatus of FIG. 19;

23 is a sectional view showing a state where the wafer to be measured of FIG. 20 is incorporated in the semiconductor device test apparatus of FIG. 19;

24 is an enlarged cross-sectional view of the semiconductor device test apparatus of FIG.

FIG. 25 is a perspective view showing a configuration of a semiconductor device test apparatus according to a ninth embodiment.

26 is an enlarged view of a cross-sectional view of the semiconductor device test apparatus of FIG.

FIG. 27 is a plan view showing an IC chip that can be tested by the semiconductor device test apparatus of FIG. 25.

FIG. 28 is a cross-sectional view showing a state where the IC chip of FIG. 27 is in contact with the semiconductor device test apparatus of FIG. 25;

FIG. 29 is a cross-sectional view showing a conventional connection relationship between a device under test, an IC socket, and a circuit board.

30 is a perspective view of the device under measurement of FIG. 29 as viewed from a surface on which electrodes are formed.

31 is a plan view of the circuit board on which the device under test and the IC socket of FIG. 29 are mounted as viewed from above.

FIG. 32 is a plan view showing a probe card 13 provided with a conventional probe needle.

FIG. 33 is a cross-sectional view showing a state where a wafer is in contact with a probe needle provided in the probe card of FIG. 32;

[Explanation of symbols]

 103: Circuit board 105: Film 107: Positioning plate 109: Holding plate 113: Buffer material 115: Printed circuit board 121: First unit 122: Second unit 131: Rubber sheet 131b: Anisotropic conductive rubber part 201: Device to be measured 303: Circuit board 305: Film 307: Positioning plate 309: Pressing plate 313: Buffer material 331: Rubber sheet 331b: Anisotropic rubber part 401: Wafer to be measured 503: Circuit board 511: Probe needle 521: Probe sheet 531: Rubber Sheet 531a: Anisotropic conductive rubber part e1: Semiconductor device test apparatus

Claims (6)

[Claims] 1. A step of sealing a wafer surface with resin, a step of performing a burn-in test on the resin-sealed wafer, and dividing the wafer into individual chip size packages after performing the burn-in test. A method of manufacturing a semiconductor device. 2. The method according to claim 1, wherein a ball electrode is formed on the resin-sealed wafer before performing the burn-in test. 3. The method according to claim 2, wherein the burn-in test is performed by connecting the ball electrode to a circuit board via an anisotropic conductive rubber. 4. An electrode is formed on the resin-sealed wafer, and the burn-in test is performed by electrically connecting the electrode to a circuit board via a bump formed on a film. The method for manufacturing a semiconductor device according to claim 1, wherein: 5. In performing the burn-in test, the wafer is pressed against a circuit board by a pressing plate having a plurality of through holes, and an even pressure is applied to the wafer. A method for manufacturing a semiconductor device according to claim 1. 6. A method of manufacturing a semiconductor device, comprising: after performing an electrical test on a resin-sealed wafer, obtaining a chip-size package by dividing the resin-sealed wafer. .