JP2001014864A - Associative memory - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable retrievals in an entire range to be realized from a specified retrieval starting address with the operation of one time. SOLUTION: This associative memory 10 has a first priority encoder circuit 5 which inputs retrieval results of the associative memory of a restricted range through a retrieval range specifying circuit 3 masking retrieval result signals whose priority are higher than that of a specified address all and outputs results and a second priority encoder circuit 6 which inputs retrieval results of a RAM cell 1 and the memory is made so as to be able to perform retrievals with the operation of one time by outputting retrievals while selecting the output of the first priority encoder circuit 5 when retrievals coincide with the range specified by the retrieval range specifying circuit 3 and the output of the second priority encoder circuit 6 when retrievals do not coincide with the range.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a content addressable memory,
In particular, it relates to the improvement of the range designation of the priority encoder.

[0002]

2. Description of the Related Art Conventionally, this type of associative memory connects a match search circuit 12 to a RAM cell 11 and inputs a match search result to a search range designating circuit 13, as shown in FIG. The output is output to the address encoder 15. This associative memory is RA
A plurality of storage data each having an address individually assigned to each word of the M cell 11 are stored. This data output is input to a match search circuit 12 which is a data search means. The output is input to a search range designating circuit 13 for searching for a limited range, and this output is input to a priority circuit 14 and further output to an address encoder 15. This (address) output is an output of the associative memory. When a search is performed by specifying a search range in the associative memory in which the search range can be specified as described above, only the search starting address to the lowest priority address of the searched word can be searched. Therefore, in order to search the entire range starting from the specified address, if there is no matching search address in the specified search range, a new search range must be added to confirm the search results outside the search range. The search had to be done without specifying it, requiring two actions.

[0003]

In the above-described conventional associative memory, in order to search the entire range starting from a specified address, if the search matching address does not exist in the specified search range, the search range is not changed. In order to confirm the search result outside, a search must be performed without newly specifying a search range, and there is a disadvantage that two operations are required. An object of the present invention is to configure an encoder that encodes and outputs search results for the number of words in the associative memory with two priority encoders. The first priority encoder inputs a search result of the associative memory in a limited range through a search range designating circuit that masks all search result signals having a higher priority than the designated address,
The search result of the RAM cell is input to the second priority encoder without passing through the search range designating circuit. The output of the first and second priority encoders selects the first priority encoder when a search match exists in the range specified by the search range specifying circuit, and selects the second priority encoder when no search match exists. The output is switched by a switch circuit. With this configuration, it is possible to configure an associative memory that enables a search in which all words are cycled in ascending or descending order, using an arbitrary address as a search start position by search range control.

[0004]

The associative memory of the present invention comprises:
A data storage unit in which addresses are individually assigned to a plurality of storage data; an input unit for receiving an input of a search range corresponding to at least a part of the storage data; and a position for receiving an input of an address for specifying a search start position Input means, range limiting means for limiting a search range to search position input means, first address extracting means for extracting an address in a range limited by the limiting means, and using the extracted address as a search result. First output means for outputting,
A second address extraction unit that extracts an address for all of the data storage units when the address extracted by the address extraction unit does not exist; a second output unit that outputs the extracted address as a search result;
And the first address extracting means and the second address extracting means operate simultaneously. Also,
If the address extracted by the first address extraction means exists, the first output means is selected, and if the address extracted by the first address extraction means does not exist, the second output means is selected. It is characterized by having means for selecting output means.

[0005]

Next, the present invention will be described with reference to the drawings.

FIGS. 1 and 2 are block diagrams showing the configuration of the first embodiment of the present invention. As shown in FIGS. 1 and 2, in this embodiment, the output signal of the RAM cell 1 is connected to the match search 2, and as a result, the output signal is input to the search range designating circuit 3, The output signal is input to the first priority encoder 5 and the OR circuit 4. The output signal of the first priority encoder is output to the output changeover switch 7, and the output signal of the OR circuit 4 is output as the changeover signal of the output changeover switch 7. The output of the match search circuit 2 input to the changeover switch is also output to the second priority encoder 6, and the output signal of the second priority encoder is connected to the output changeover switch 7. Further, the output of the output switch 7 is output as an output result signal of the associative memory 10.
Here, the difference between FIG. 1 and FIG. 2 is that FIG. 1 shows a case where a search match word exists in a search (designation) range, and FIG. 2 shows a case where a search match word does not exist in a search designation range.
The bold wiring in each figure indicates that a match exists or the signal is "1".
, And the small character indicates that there is no match or that it is “0”. Search range designating circuit 3
The hatched portions in the figure indicate an example of a portion that is not designated for search. (Operation of the Embodiment) In the associative memory circuit 10, the match search circuit 2 stores the input search word and the RAM cell 1
Outputs the matching search result with the searched word stored in. This match search signal is sent to the search range specifying circuit 3 and the second priority encoder 6. The search range specifying circuit 3 specifies a search range in which a search start address can be specified by the search range control signal 8. The match search signal within the search range passed through the search range designating circuit 3 is the first
The signal is sent to the priority encoder 5 and the OR circuit 4.
The first priority encoder 5 selects a match search signal with the highest priority from the search range and outputs an encoded value. The second priority encoder circuit 6 selects the highest priority match search signal with the entire range as the search range, and outputs an encoded value. The output of each priority encoder is switched by a switch circuit 7 by an output switching signal 9 from the OR circuit 4. When the output switching signal 9 of the OR circuit 4 is “1”, that is, when the output result of the first priority encoder 5 exists, the output result of the first priority encoder 5 is output. When the value is "0", that is, when the output result of the first priority encoder 5 does not exist, the output result of the second priority encoder 6 is selected, and the searched address is output as the output result of the associative memory circuit 10.
The range of the search can be limited. If no search result exists in the limited range, the search result from the entire range is output from the output switch 7.

As another invention in the associative search apparatus as described above, a method for limiting the range of search to the direction in which the address increases or a method for limiting the range of search by using the range limiter to reduce the address of the search range to the address is used. And output as search results. This is the case where the addresses of the matching search results are given priority in descending order, but similarly, the configuration may be such that the addresses of the matching search results are given priority in ascending order.

[0008]

As described above, in the conventional associative memory, it is not possible to specify a search start address and perform a search over the entire range from the search start address in one search operation. . The associative memory of the present invention employs two priority encoders, a priority encoder that specifies a search range and a priority encoder that covers the entire range. The encoding result of the specified priority encoder is output to the associative memory. By doing, 1
A search in the entire range of the RAM cell can be realized from the search start address specified by the number of operations.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of a first embodiment of the present invention (when a search match word exists in a search range).

FIG. 2 is a block diagram showing a configuration of the first embodiment of the present invention (when a search match word does not exist in a search range).

FIG. 3 is a block diagram according to a conventional embodiment.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1, 11 RAM cell 2, 12 Match search circuit 3, 13 Search range designating circuit 4 OR circuit 5 First priority encoder 6 Second priority encoder 7 Output switch 8 Search range control signal 9 Output switching signal 10 Associative memory 14 Priority circuit 15 Address encoder

Claims (6)

[Claims] 1. A data storage means in which addresses are individually assigned to a plurality of storage data, an input means for receiving an input of a search range corresponding to the storage data, and an input of an address for designating a search start position. Position input means, range restricting means for restricting the search range to the position input means for search, first address extracting means for extracting addresses in a range restricted by the restricting means, extracted by the extracting means A first output unit that outputs an address as a search result, a second address extraction unit that extracts an address for all of the data storage units, and an address extracted by the second extraction unit is output as a search result. A second output means, wherein the first address extraction means and the second address extraction means are operating simultaneously. Virtual memory. 2. The method according to claim 1, wherein the first output means is selected when an address extracted by the first address extraction means exists, and when the address extracted by the first address extraction means does not exist. 2. The associative memory according to claim 1, further comprising means for selecting said second output means. 3. A first output unit which receives as many search results as words in an associative memory within a limited range through a search range designating circuit which masks all search result signals having a higher priority than a specified address, and outputs an encoded result. A priority encoder circuit, a second priority encoder circuit that inputs a search result of the associative memory without passing through the search range designating circuit, and a first priority encoder when a search match exists in the range designated by the search range designating circuit. 3. The associative method according to claim 1, wherein the output of the tee encoder circuit is constituted by a changeover switch for selecting and outputting the output of the second priority encoder circuit when the search match does not exist. memory. 4. A circuit for recognizing the presence or absence of a search result is added to the first priority encoder circuit.
4. The content addressable memory according to claim 1, further comprising: a control circuit configured to control the switch circuit by a search range control signal. 5. The associative memory according to claim 1, wherein the range limiting means limits a search range in a direction of increasing addresses, and outputs the search result as a search result. 6. The associative memory according to claim 1, wherein the range limiting means limits a search range in a direction of decreasing addresses, and outputs the result as a search result.