JPH02201648A - System for controlling memory access - Google Patents

Abstract

PURPOSE:To easily change the contents of a memory by storing the address and data of the memory to be changed in an address conversion table and a replacing data memory. CONSTITUTION:An address conversion table control means 21 retrieves an address conversion table 20 based on the address data on an address bus and outputs a memory output control signal 22. When the control signal 22 indicates the fact that an entry in which the address data are registered is found, a buffer 33 outputs the data after replaced to be read out of a replacing data memory 31 by a replacing data memory control means 32 on a data bus 6. When the control signal 22 indicates the fact that the entry cannot be found, the data outputted from a memory 40 are outputted on the bus 6 by a buffer 41. Thus, the change of the data to plural addresses can be concentrically executed by the replacing data memory 31, and even at the time of changing the contents over plural ROM chips, the necessity to execute a switch to the individual ROM chip is eliminated, and thereby, the switching work can be facilitated.

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to a memory access control method.

(Prior Art) Memory used in information processing devices, etc. generally consists of multiple areas, and each area of the memory stores a program and data necessary to execute this program. There is. Each area in this memory is assigned an address indicating the area for unique identification, and one area is designated for one address.

When using Jh' with such a configuration in a data processing device, when changing multiple areas of the 117 grams or data stored in the memory due to some request (for example, adding a function), it is necessary to change each area of the memory. The contents have been changed individually.

For example, if the memory or ROM 'C'' is configured and the content to be changed spans multiple ROM chips, each individual ROM
Chips are being replaced.

(Problems to be Solved by the Invention) As mentioned above, in the conventional memory access control method, one memory area is specified for one address, and data cannot be stored in multiple areas. When changing the current 10 grams or data, it is necessary to individually change the contents of the area 7. Therefore, when changing the contents across multiple R and OM chips, it is necessary to
Since the chip is being replaced, it is difficult to make changes.

The present invention has been made in view of the circumstances described in 5.--, and its purpose is to provide a memory access control system that allows easy modification of memory contents.

(Means for Solving the Problems) In order to achieve the second object, the memory access control method of the present invention transfers data stored at a memory address specified by address data on an address bus to a data bus. - In a memory address control method that outputs data to a second address, a replacement data memory that stores data after replacement, address data of the memory that stores data to be changed, and an address of the replacement data memory are stored. searching the address translation table based on the address translation table stored in the address data and the address data on the address bus, and outputting a memory output control signal indicating whether or not an entry in which the address data is registered is found; address conversion table control means for extracting the address data of the replacement data memory in the entry when finding an entry in which the address data is registered; and address data of the replacement data memory retrieved by the conversion table control means. replacement data memory control means for reading the replaced data from the replacement data memory according to the replacement data memory; a buffer for outputting data read by the control means onto the data bus, and outputting the data output from the memory onto the data bus when the memory control signal indicates that the entry cannot be found; have

(Function) In the memory access control method of the present invention, the address translation table control means searches the address translation table based on the address data on the address/<space;
It outputs a memory output control signal indicating whether or not an entry in which the address is registered is found, and when an entry in which the address is registered is found, the replacement data memory in the entry is output. After taking out the address, the replacement data memory control means reads the replaced data from the replacement data memory in accordance with the address of the replacement data memory. Then, when the memory control signal outputted by the conversion table control means indicates that the memory control signal has found the entry (-), the buffer converts the data read by the replacement data memory control means to the i -data bus-, and when the memory control signal indicates that the en 1 to ri cannot be found, the data output from the memory is output onto the data bus.

(Example) Next, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of the present invention.6 In the figure, 1 indicates an address conversion section 2 and a replacement data memory section 3.
The memory access replacement data section 4 is an original memory section consisting of a memory 40 that stores programs and data and a buffer 41 that controls whether or not the output data of this memory 40 is output to the data bus 6. be.

The address translation section 2 is composed of an address translation table 20 and an address translation table control means 21, and the replacement data memory section 3 is composed of a replacement data memory 31, a replacement data memory control means 32, and a buffer 33. The address translation table 20 has a plurality of entries, as shown in FIG. It consists of a conversion address that stores the address of the replacement data memory 31.

The address conversion table control means 21 generates an address conversion table 20 based on the address data on the address bus 5.
The conversion source address of each entry is searched to determine whether there is an entry with the same address data set, and the determination result is output to the memory output control line 22. When it is found, the data set in the translation address of that entry is output onto the translation address bus 23. Here, the memory output control line 22 outputs, for example, "1 (High level)" when it finds an entry in which the same address data is set, and outputs "ro (Low level)" when it cannot find it. shall be. The replacement data memory 31 stores the replaced data as shown in FIG. 2(c). The replacement data memory control means 32 reads replacement data from the replacement data memory 31 based on the data on the conversion address bus 23 outputted by the address conversion table control means 21 and outputs it. buffer 33.41
is for outputting either the output data of the memory 40 or the output data of the replacement data memory control means 32 to the data bus 6, and when indicating that the corresponding encoder has been found, the replacement data memory control means 32 is output to the data bus 6, and when the memory output control line 22 indicates that the corresponding entry cannot be found, the output data of the memory 40 is output to the data bus 6.

Address conversion table 2 as shown in Fig. 2(b) and (C)
0 and the replacement data memory 31 are configured to output, for example, "0000" on the address bus 5, as shown in FIG. The operation in this case will be explained. First, the address translation table control means 21
searches the translation source address of each entry in the address translation table 20 based on the value roooOJ on the address bus 5 and finds an entry in which the value "0000" is set. In this case, we found the entry with the value "0OOOJ", so we set the memory output control line 22 to "1".
At the same time, the translation address "04" set in that entry is output to the translation address bus 23.

The replacement data memory control means 32 uses the conversion address bus 2
The value "04" above 3 is taken, and this value "04J" is used as the address of the replacement data memory 31 to output the replacement data "B2" stored at the address "04". At this time, the memory 40 also receives the value "0000" on the address bus, and reads and outputs the data stored at this address, for example "8F". However, the memory output control line 22 is set to "1" as described above, the buffer 42 prohibits outputting the output data of the memory 40 to the data bus 6, and the buffer 33 outputs the output data of the memory 40 to the data bus 6. The output data is output to the data bus 6. Therefore, the replaced data "B2" is output to the data bus 6.

Next, the case where "0001" is output on the address bus 5 will be explained. At this time as well, the address translation table control means 21 searches for an entry in the address translation table 20 based on the value "0001J" on the address bus 6. rO, is output on the line 22. Therefore, the output of the memory 40 is output via the data bus 61\buffer 41, and the output data of the replacement data memory control means 32 is prohibited from being output to the data bus 6. Ru.

In this way, when the value on the address bus is not set in the address conversion table 20, the data stored in the memory 40 is output onto the data bus 6, and when it is set in the address conversion table 20, the data is replaced. The changed data stored in data memory 31 is output onto data bus 6.

Therefore, data changes can be concentrated in the replacement data memory 3.

(Effects of the Invention) As explained above, the memory access control method of the present invention stores the address and data of the memory to be changed in the address conversion table and the replacement data memory. Since data can be managed centrally, data changes to multiple addresses can also be performed centrally in the replacement data memory5. Therefore, the difference in adopting the memory access control force formula of the present invention is
Even when changing the contents across the OM0M circuit, there is no need to replace each ROM chip, making the change process easier.

[Brief explanation of the drawing]

FIG. 1 shows the configuration of an embodiment of the present invention, and FIG. 2 shows an example of the contents of the address conversion table 20 and replacement data memory 31. DESCRIPTION OF SYMBOLS 1...Memory access replacement data part, 2...Address conversion part, 3...Replacement data, newt part, 4...Original memory part, 5...Attribute bus, 6...Data bus , 20... address translation table, 21...
-Address conversion table control means, 31... Replacement data memory, 32... Replacement data memory control means, 33
41...Buffer, 40...Memory.

Claims (1)

[Claims] In a memory address control method that outputs data stored at a memory address specified by address data on an address bus onto a data bus, a replacement data memory stores data after replacement. and searching the address translation table based on the address data on the address bus and an address translation table storing the address data of the memory in which the data to be changed is stored and the address of the replacement data memory. , outputs a memory output control signal indicating whether or not an entry in which the address data is registered is found, and when an entry in which the address is registered is found, the address of the replacement data memory in the entry is output. address conversion table control means for retrieving data; replacement data memory control means for reading replaced data from the replacement data memory according to the address data of the replacement data memory retrieved by the conversion table control means; and the conversion table control means When the memory output control signal outputted by indicates that the entry has been found, the data read by the replacement data memory control means is outputted onto the data bus, and the memory output control signal indicates that the entry has been found. 1. A memory access control method, further comprising a buffer for outputting data output from said memory onto said data bus when the data is not available.