JP2001008112A - Solid-state image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To apply filter processing to a picture signal at a place designated at random in real time and to provide an output of the result by providing the output of a plurality of pixel signals of a plurality of pixel cells in an image block sectioned optionally by a prescribed size in real time in parallel. SOLUTION: When a vertical direction read block selection circuit 202 receives a position (p) in a vertical direction, a row selection line 207 at vertical directional positions p-1, p, p+1 is activated. When a horizontal direction read block selection circuit 203 receives a position (q) in a horizontal direction, a column selection line 208 at horizontal directional positions q-1, q, q+1 is activated. When the row selection line 207 and the column selection line 208 are both active, a pixel cell 201 outputs a pixel signal. Thus, when the vertical directional position (p) and the horizontal direction position (q) are designated, a pixel section 101 outputs the pixel signals at pixel positions (p-1, q-1),..., pixel positions (p+1, q+1) respectively to output lines S1,..., S9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a solid-state imaging device for outputting an incident image light signal or a signal obtained by filtering the signal.

[0002]

2. Description of the Related Art FIG. 10 is a block diagram of a conventional single-chip color imaging apparatus. In the figure, 901 is a CCD
An image sensor 902, an A / D converter (ADC), 90
3 is a memory, 904 is a spatial filter, and 905 is a D / A converter (DAC).

[0003] In the CCD image pickup device 901, a light detection signal obtained by each photoelectric conversion element is transferred by the CCD in the vertical direction and then by the CCD in the horizontal direction. That is, when all the light detection signals of a certain row arrive at the CCDs arranged in the horizontal direction by being transferred by the CCDs arranged in the vertical direction, all the light detection signals are sequentially transferred in the horizontal direction by the CCDs arranged in the horizontal direction. And output from the output terminal. This is performed sequentially for all rows. Accordingly, as shown on the CCD image sensor 901 in FIG. 10, a light detection signal (original pixel) is output from the CCD image sensor 901 in the order of the scanning lines.

The original pixels output from the CCD image sensor 901 are subjected to A / D conversion by the ADC 902,
3 is stored. For example, 3 output from the memory 903
Nine original pixels in the × 3 area are input to the spatial filter 904, and the spatial filter 904 performs a filter process such as LPF and BPF based on these original pixels.
The filtered signal is output. The DAC 905 performs D / A conversion on the signal after the filter processing and outputs an analog image signal.

[0005]

By the way, for example, when the aperture and the focus are adjusted based on the image signal of a specific area, an image signal of only a specific area is required in some cases. Also, the position of the area may move dynamically. Therefore, in these cases, an image signal at an arbitrary location must be read. At that time, it may be necessary to perform spatial filtering.

However, when a CCD image pickup device is used, as described above, the CCD image pickup device outputs image signals in the order of scanning lines in accordance with the television scanning method. Alternatively, in order to perform random reading by applying a spatial filter, it is necessary to use a frame memory as a memory at the subsequent stage of the CCD image sensor, which has been a factor of cost increase. Also, CC
After detecting a signal in each pixel D, an output signal is output from the spatial filter after a delay time. The delay time includes a delay time due to transfer inside the CCD image pickup device and a delay time in the frame memory.

In addition, when detecting a motion vector of an image based on an image signal obtained from an image sensor, for example, a band-pass type spatial filter process may have to be performed as a pre-process in some cases. Conventionally, as described above, this spatial filter processing is performed by another IC connected after the image sensor.
This IC and the like cause a cost increase and hinder miniaturization.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a solid-state imaging device capable of filtering and outputting an image signal at a location designated at random in real time.

[0009]

A solid-state imaging device according to the present invention is a solid-state imaging device that includes a plurality of pixel cells in a pixel portion and generates an image signal from incident video light. Output means for outputting a plurality of pixel signals of a plurality of pixel cells in a given image block in parallel in real time.

In the solid-state imaging device according to the present invention, the output means may include a row selection means for generating a row selection signal for selecting a predetermined number of rows including a specified row, and a predetermined number of columns including a specified column. Column selection means for generating a column selection signal for selecting
A means provided in each of the plurality of pixel cells, for outputting the pixel signal when the row selection line and the column selection line are active, and an output row for the plurality of pixel signals of the plurality of pixel cells. A plurality of row selection switches to select, a plurality of column selection switches to select output columns of the plurality of pixel signals of the plurality of pixel cells, and a row selection to control the row selection switches according to the designated row A switch control unit and a column selection switch control unit that controls the column selection switch according to the designated column are provided.

Further, in the solid-state imaging device according to the present invention, in the solid-state imaging device described above, each of a plurality of pixel signals output from the output means is directly input to a multiplier of each tap.
It is characterized by having an IR type spatial filter.

Furthermore, a solid-state imaging device according to the present invention is characterized in that in the solid-state imaging device described above, the spatial filter includes an IIR filter element.

Further, in the solid-state imaging device according to the present invention, in the solid-state imaging device described above, the pixel unit, the output unit, and the spatial filter are formed on the same chip.

Further, a solid-state imaging device according to the present invention is characterized in that the solid-state imaging device further includes a binarization circuit for binarizing the output of the spatial filter.

Further, in the solid-state imaging device according to the present invention, in the above-described solid-state imaging device, the pixel unit, the output unit, the spatial filter, and the binarization circuit are formed on the same chip. .

[0016]

FIG. 1 is a block diagram showing a configuration of a motion vector detection system including a solid-state imaging device according to an embodiment of the present invention. Referring to FIG. 1, a system according to an embodiment of the present invention includes a pixel unit 101 and a pixel unit 101.
A spatial filter 102 that performs spatial filter processing on the image signal read from the image signal and outputs the image signal, a binarization circuit 103 that binarizes the output of the spatial filter 102, and performs a correlation operation based on the output of the binarization circuit 103. It comprises a correlation calculator 104 for outputting a motion vector.

From the pixel unit 101, pixel signals in the image block are output in parallel at the same time.
02 is input.

Since the spatial filter 102 and the binarization circuit 103 can be manufactured by the same process as the pixel section 101, they can be formed on the same semiconductor substrate to form a one-chip solid-state imaging device. it can.

Next, an embodiment of each section shown in FIG. 1 will be described.

[First Embodiment] FIG. 2 is a block diagram showing a configuration of a pixel unit 101 according to a first embodiment.

In this embodiment, as an example, the image block size is 3 rows × 3 columns.

Referring to FIG. 2, reference numeral 201 denotes a pixel cell formed by a photoelectric conversion element and peripheral transistors;
Is a vertical readout block selection circuit that selects vertical readout pixels, 203 is a horizontal readout block selection circuit that selects horizontal readout pixel blocks,
Reference numeral 204 denotes a switch, 205 denotes a vertical switch control signal generation circuit, 206 denotes a horizontal switch control signal generation circuit, 207 denotes a row selection line, and 208 denotes a column selection line.

The switch 204 has a configuration as shown in FIG. There are six types of switches 204 corresponding to the control signals a to f.

The output signals S1, S2,..., S9 have a spatial arrangement as shown in FIG.

Next, the operation of reading pixel signals from the pixel unit 101 according to the first embodiment will be described.

The image block to be read is externally designated by a vertical position p and a horizontal position q. It may be specified by another circuit in the solid-state imaging device, or may be specified by the solid-state imaging device.

The vertical readout block selection circuit 202
When the vertical position p is input, the vertical position p−
The row selection lines 207 of 1, p, and p + 1 are activated.
When receiving the horizontal position q, the horizontal read block selecting circuit 203 receives the horizontal positions q-1, q, q + 1.
Activate the column selection line for

The pixel cell 201 outputs a pixel signal when both the row selection line 207 and the column selection line 208 are activated.

Vertical switch control signal generation circuit 205
Is given by inputting the vertical position p, mod (p, 3) =
If 0, a of the vertical direction switch control signals a, b, c
Only mod, (mod (p, 3) = 1) activates only b of the vertical switch control signals, and mod (p, 3) = 2 activates only c of the vertical switch control signals. I do. When the vertical position q is input, the horizontal switch control signal generation circuit 206 activates only d of the horizontal switch control signals d, e, and f if mod (q, 3) = 0, and
If d (q, 3) = 1, only e of the vertical switch control signals is activated, and if mod (q, 3) = 2, only f of the vertical switch control signals is activated.

Therefore, the vertical position p and the horizontal position q
Is specified, the pixel unit 101 sets the pixel position (p-1, q-1), the pixel position (p-1, q), the pixel position (p-1, q + 1), and the pixel position (p , Q−1), pixel position (p, q), pixel position (p, q + 1), pixel position (p + 1, q−1), pixel position (p + 1, q), pixel position (p + 1, q + 1) Is the output line S
, S2,..., S9.

[Second Embodiment] FIG. 5 is a block diagram showing a configuration of a spatial filter 102 according to a second embodiment.

In this embodiment, as an example, the image block size is 3 rows × 3 columns.

In the figure, 301 is a multiplier, and 203 is an adder. The coefficient of each multiplier 301 takes a value as shown in FIG. 6, for example. This is the case for a high-pass filter.

The output y of the spatial filter according to the present embodiment
_{i, j} are

[0035]

(Equation 1) Becomes

The image block size may be 5 rows × 5 columns, and the coefficient of each multiplier 301 may be, for example, a value as shown in FIG. This is the case for bandpass filters.

Although the above spatial filter is an FIR filter, an IIR filter element shown in FIG. 8 may be added to the output stage. 8, reference numeral 401 denotes an adder, 402 denotes a multiplier, and 403 denotes a delay element.

[Third Embodiment] FIG. 9 is a block diagram showing a configuration of a binarization circuit 103 according to a third embodiment.

In FIG. 9, 501 and 502 are comparators,
503 is an OR circuit. The output is the input signal yi, j
Becomes a high level when the absolute value of exceeds a predetermined value ΔV.

[0040]

As described above, according to the present invention, the output means of the pixel block signal does not require a delay element such as a memory, and the output of the pixel block signal also requires a method such as serial reading. In addition, since the filter has no delay element such as a delay element, an image signal obtained by performing a filtering process based on a pixel signal of an arbitrary image block can be output in real time. Therefore, it can be used for applications that require real-time reading.

Further, according to the present invention, random reading of the image signal after the filtering process can be performed.

Further, according to the present invention, since no frame memory is required, the cost can be reduced.

Further, according to the present invention, a spatial filter can be formed on the solid-state imaging device by the same process, so that a one-chip solid-state imaging device that outputs a signal after the spatial filtering is obtained, and the device itself or The size of an apparatus using this can be reduced.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration example of a system using a solid-state imaging device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of a solid-state imaging device according to a first embodiment of the present invention.

FIG. 3 is a diagram illustrating a configuration of a switch illustrated in FIG. 2;

FIG. 4 is a diagram showing an array of output pixels shown in FIG. 2;

FIG. 5 is a block diagram showing a configuration of a spatial filter according to Embodiment 2 of the present invention.

FIG. 6 is a diagram illustrating an example of coefficients of a spatial filter according to Embodiment 2 of the present invention.

FIG. 7 is a diagram illustrating an example of coefficients of another spatial filter in FIG. 6;

FIG. 8 is a diagram showing a configuration of an IIR filter element.

FIG. 9 is a diagram illustrating a configuration of a binarization circuit according to a third embodiment of the present invention.

FIG. 10 is a block diagram illustrating a configuration of a solid-state imaging device according to a conventional example.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 101 Pixel part 102 Spatial filter 103 Binarization circuit 105 Solid-state imaging device 201 Pixel cell 202 Vertical read block selection circuit 203 Horizontal read block selection circuit 204 Switch 205 Vertical switch control signal generation circuit 206 Horizontal switch control signal generation circuit 207 Row selection line 208 Column selection line

Claims (7)

[Claims] 1. A solid-state imaging device that includes a plurality of pixel cells in a pixel portion and generates an image signal from incident video light, wherein a plurality of pixel cells in an image block arbitrarily divided by a predetermined size are provided. A solid-state imaging device comprising output means for outputting pixel signals in parallel in real time. 2. The apparatus according to claim 1, wherein said output means generates a row selection signal for selecting a predetermined number of rows including a specified row, and a column selection signal for selecting a predetermined number of columns including a specified column. A column selection unit that generates the pixel signal when the row selection line and the column selection line are active in each of the plurality of pixel cells; and A plurality of row selection switches for selecting output rows of a plurality of pixel signals; a plurality of column selection switches for selecting output columns of the plurality of pixel signals of the plurality of pixel cells; and A solid-state imaging device comprising: a row selection switch control unit that controls a row selection switch; and a column selection switch control unit that controls the column selection switch according to the designated column. 3. The solid-state imaging device according to claim 1, further comprising: an FIR spatial filter that directly inputs each of the plurality of pixel signals output from the output unit to a multiplier of each tap. . 4. The solid-state imaging device according to claim 3, wherein said spatial filter further comprises an IIR filter element. 5. The solid-state imaging device according to claim 3, wherein the pixel unit, the output unit, and the spatial filter are formed on the same chip. 6. The solid-state imaging device according to claim 3, further comprising a binarizing circuit for binarizing an output of the spatial filter. 7. The solid-state imaging device according to claim 6, wherein said pixel portion, said output means, said spatial filter, and said binarization circuit are formed on the same chip.