JP2000353864A - Method and body for mounting electronic component - Google Patents

Method and body for mounting electronic component

Info

Publication number
JP2000353864A
JP2000353864A JP11166806A JP16680699A JP2000353864A JP 2000353864 A JP2000353864 A JP 2000353864A JP 11166806 A JP11166806 A JP 11166806A JP 16680699 A JP16680699 A JP 16680699A JP 2000353864 A JP2000353864 A JP 2000353864A
Authority
JP
Japan
Prior art keywords
conductive adhesive
mounting
electronic component
adhesive layer
connection portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11166806A
Other languages
Japanese (ja)
Other versions
JP3427347B2 (en
Inventor
Yutaka Kumano
豊 熊野
Tsukasa Shiraishi
司 白石
Yoshihiro Bessho
芳宏 別所
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP16680699A priority Critical patent/JP3427347B2/en
Publication of JP2000353864A publication Critical patent/JP2000353864A/en
Application granted granted Critical
Publication of JP3427347B2 publication Critical patent/JP3427347B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/921Connecting a surface with connectors of different types
    • H01L2224/9212Sequential connecting processes
    • H01L2224/92122Sequential connecting processes the first connecting process involving a bump connector
    • H01L2224/92125Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To improve the productivity and reliability of electronic components. SOLUTION: Quantities of conductive connecting layers are increased, and the self-alignment of the connecting layers is performed by mounting electronic components 1 on a mounting member 4, by aligning conductive adhesive layers 7c and 7d with each other so that the layers 7c and 7d are faced to each other, after the layers 7c and 7d are respectively provided on the outside connecting sections 2 of electronic components 1 and the mounting and connecting sections 5 of a mounting member 4, on which the parts 1 are mounted. Moreover when bump electrodes 3 and 6 are respectively provided on the outside connecting sections 2 and mounting and connecting sections 5, this effect can be obtained with further convenience.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子等の電
子部品の実装方法および電子部品の実装体に関し、特に
フェースダウンで半導体素子を実装する実装方法や実装
体に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for mounting an electronic component such as a semiconductor element and a mounting body for an electronic component, and more particularly to a mounting method and a mounting body for mounting a semiconductor element face down.

【0002】[0002]

【従来の技術】ベアチップ状態の半導体素子を回路基板
上に直接実装する方法として、近年接続部に導電性接着
剤を設けて実装することがしばしば行われている。すな
わち、あらかじめ半導体装置の外部接続部である電極パ
ッド上に突起電極を形成したうえで、この突起電極に導
電性接着剤を転写する。そして、導電性接着剤を転写し
た突起電極を、回路基板の実装接続部である端子電極に
位置合わせを行ったうえで、半導体装置を回路基板に搭
載する。続いて硬化炉で導電性接着剤を硬化させ、半導
体装置と回路基板との間の間隙に封止樹脂を注入し、さ
らにその封止樹脂を硬化炉にて硬化させることにより実
装体を完成させていた。
2. Description of the Related Art In recent years, as a method of directly mounting a semiconductor element in a bare chip state on a circuit board, a conductive adhesive is often provided at a connection portion and mounted. That is, after a protruding electrode is formed on an electrode pad, which is an external connection portion of a semiconductor device, a conductive adhesive is transferred to the protruding electrode. Then, the semiconductor device is mounted on the circuit board after aligning the projecting electrodes to which the conductive adhesive has been transferred with the terminal electrodes, which are the mounting connection portions of the circuit board. Subsequently, the conductive adhesive is cured in a curing furnace, a sealing resin is injected into a gap between the semiconductor device and the circuit board, and the sealing resin is further cured in a curing furnace to complete a mounted body. I was

【0003】以下、従来の半導体装置の実装方法とその
実装体を、図5を参照して説明する。
Hereinafter, a conventional method of mounting a semiconductor device and a mounting body thereof will be described with reference to FIG.

【0004】図5において、1は半導体素子、2は半導
体素子1の電極パッド、3は突起電極、4は回路基板、
5は回路基板4の端子電極、7aは硬化前の導電性接着
剤層、7bは硬化した導電性接着剤層、8は封止樹脂、
9は転写皿である。
In FIG. 5, 1 is a semiconductor element, 2 is an electrode pad of the semiconductor element 1, 3 is a protruding electrode, 4 is a circuit board,
5 is a terminal electrode of the circuit board 4, 7a is a conductive adhesive layer before curing, 7b is a cured conductive adhesive layer, 8 is a sealing resin,
9 is a transfer dish.

【0005】まず図5(a)に示すにように、半導体素
子1の電極パッド2上に形成された突起電極3を、転写
皿9上に均一な厚さに制御された導電性接着剤の液状体
7a’に浸積させることで、突起電極3に導電性接着剤
を転写して、導電性接着剤層7aを形成する。次に、図
5(b)に示すように、端子電極5の所定の位置に電極
パッド2が相対するように、回路基板4に対して半導体
素子1を位置合わせした後、フェースダウンにして半導
体素子1を回路基板4に搭載する。ついで、120℃、
2時間ほど硬化炉で加熱することにより、導電性接着剤
層7aを硬化させ、次に半導体素子1と回路基板4との
間隙に液状の封止樹脂8を注入し、硬化炉で150℃、
2時間ほど加熱処理することで、封止樹脂8を硬化させ
る。これにより、図5(c)示す半導体素子の実装体が
できあがる。
[0005] First, as shown in FIG. 5 (a), a projecting electrode 3 formed on an electrode pad 2 of a semiconductor element 1 is placed on a transfer plate 9 by a conductive adhesive controlled to a uniform thickness. The conductive adhesive is transferred to the protruding electrode 3 by being immersed in the liquid material 7a 'to form the conductive adhesive layer 7a. Next, as shown in FIG. 5B, the semiconductor element 1 is positioned with respect to the circuit board 4 so that the electrode pad 2 faces a predetermined position of the terminal electrode 5, and then the semiconductor element 1 is placed face down. The element 1 is mounted on the circuit board 4. Then, at 120 ° C,
The conductive adhesive layer 7a is hardened by heating in a hardening furnace for about 2 hours, and then a liquid sealing resin 8 is injected into the gap between the semiconductor element 1 and the circuit board 4;
By performing the heat treatment for about 2 hours, the sealing resin 8 is cured. As a result, a semiconductor device package shown in FIG. 5C is completed.

【0006】[0006]

【発明が解決しようとする課題】しかしながら上記従来
の実装方法においては、次のような課題があった。すな
わち、導電性接着剤の転写量は、導電性接着剤層7aを
転写する領域(具体的には突起電極3)の大きさに左右
される。これに対して、実装体の小型化に伴って電極間
ピッチが狭くなると、導電性接着剤を転写して導電性接
着剤層7aを形成する領域(突起電極3)が小さくなる
のは避けられない。そのため、実装体を小型化するため
に電極間ピッチを狭くすると、導電性接着剤の転写量が
減少してしまって、電極パッド2と突起電極3との接続
に必要な導電性接着剤層7aを設けることができなくな
ってしまう。そのため、実装体の小型化を図ると、導電
性接着剤層7aの量の低下を招き、その結果として、ロ
スの増大により生産性を悪化させたり、たとえ初期性能
が良かったとしても、経時変化により信頼性が著しく劣
化してしまう、という問題が生じていた。
However, the above conventional mounting method has the following problems. That is, the transfer amount of the conductive adhesive depends on the size of the region (specifically, the bump electrode 3) to which the conductive adhesive layer 7a is transferred. On the other hand, when the pitch between the electrodes becomes narrower with the miniaturization of the mounting body, it is possible to avoid that the area (projecting electrode 3) where the conductive adhesive is transferred to form the conductive adhesive layer 7a becomes small. Absent. Therefore, when the pitch between the electrodes is reduced to reduce the size of the mounting body, the amount of the conductive adhesive transferred decreases, and the conductive adhesive layer 7a necessary for connecting the electrode pad 2 and the protruding electrode 3 is reduced. Cannot be provided. Therefore, when the size of the mounting body is reduced, the amount of the conductive adhesive layer 7a is reduced, and as a result, the productivity is deteriorated due to an increase in the loss, and even if the initial performance is good, there is a change over time. Has caused a problem that the reliability is significantly deteriorated.

【0007】[0007]

【課題を解決するための手段】本発明においては上記課
題を解決すべく、電子部品の外部接続部、およびこの電
子部品を実装する実装部材の実装接続部に、それぞれ未
硬化状態の導電性接着剤層を設ける工程と、両導電性接
着剤層が互いに相対するように電子部品を位置合わせし
て実装部材に搭載する工程と、両導電性接着剤層を硬化
させる工程とを含んで電子部品の実装方法を構成する。
According to the present invention, in order to solve the above-mentioned problems, an uncured conductive adhesive is applied to an external connection portion of an electronic component and a mounting connection portion of a mounting member for mounting the electronic component. An electronic component including a step of providing an agent layer, a step of aligning the electronic component such that the two conductive adhesive layers face each other and mounting the electronic component on a mounting member, and a step of curing the two conductive adhesive layers. Configure the implementation method of.

【0008】[0008]

【発明の実施の形態】本発明の請求項1に記載の発明に
よれば、電子部品の外部接続部、およびこの電子部品を
実装する実装部材の実装接続部に、それぞれ未硬化状態
の導電性接着剤層を設ける工程と、両導電性接着剤層が
互いに相対するように電子部品を位置合わせして実装部
材に搭載する工程と、両導電性接着剤層を硬化させる工
程とを含んで電子部品の実装方法を構成することに特徴
を有しており、これにより次のような作用を有する。す
なわち、電子部品の外部接続部および実装部材の実装接
続部との両方に、未硬化状態の導電性接着剤層を設ける
ので、実装体の小型化等により外部接続部や実装接続部
の大きさが小さくなって、片方の接続部に設けることが
できる導電性接着剤の量が少なくなっても、両方の導電
性接着剤層の和によって十分なる導電性接着剤の量を得
ることができるようになる。
According to the first aspect of the present invention, an uncured conductive material is applied to an external connection portion of an electronic component and a mounting connection portion of a mounting member for mounting the electronic component. A step of providing an adhesive layer, a step of positioning electronic components such that both conductive adhesive layers are opposed to each other and mounting the electronic component on a mounting member, and a step of curing both conductive adhesive layers. It is characterized by configuring a component mounting method, and thereby has the following operation. That is, since the uncured conductive adhesive layer is provided on both the external connection portion of the electronic component and the mounting connection portion of the mounting member, the size of the external connection portion or the mounting connection portion is reduced due to downsizing of the mounting body. Is smaller, and even if the amount of the conductive adhesive that can be provided on one connection portion is reduced, the amount of the conductive adhesive sufficient by the sum of the two conductive adhesive layers can be obtained. become.

【0009】また、外部接続部と実装接続部との両方
に、未硬化状態の導電性接着剤層を設けるために、導電
性接着剤層どうしのなじみ(親和性)がよくなり、導電
性接着剤層によって外部接続部と実装接続部とを確実に
接着することができるようになる。
Further, since the uncured conductive adhesive layer is provided on both the external connection portion and the mounting connection portion, the compatibility (affinity) between the conductive adhesive layers is improved, and the conductive adhesive layer is provided. The external connection portion and the mounting connection portion can be securely bonded by the agent layer.

【0010】本発明の請求項2に記載の発明によれば、
請求項1に係る電子部品の実装方法であって、前記導電
性接着剤層を設ける工程において、前記外部接続部、お
よび前記実装接続部に、液状の導電性接着剤層を形成す
ることに特徴を有しており、これにより次のような作用
を有する。すなわち、液状の導電性接着剤層どうしを接
触させると、その表面張力により互いに引き寄せ合った
うえで、ひとつの球体になろうとする。そのため、この
引き寄せ会う力を利用して電子部品をセルフアライメン
トすることができ、これにより、電子部品を実装部材に
対して精度高く位置決め配置することができる。
According to the invention described in claim 2 of the present invention,
2. The method for mounting an electronic component according to claim 1, wherein in the step of providing the conductive adhesive layer, a liquid conductive adhesive layer is formed on the external connection portion and the mounting connection portion. Which has the following effect. That is, when the liquid conductive adhesive layers are brought into contact with each other, they tend to be attracted to each other by their surface tension and then become one sphere. Therefore, the electronic component can be self-aligned by utilizing the attracting force, so that the electronic component can be accurately positioned and arranged with respect to the mounting member.

【0011】本発明の請求項3に記載の発明は、請求項
2に係る電子部品の実装方法であって、前記接着剤層を
形成する前処理工程として、電子部品の外部接続部、お
よびこの電子部品を実装する実装部材の実装接続部に、
それぞれ突起電極を形成する工程をさらに含むことに特
徴を有しており、これにより次のような作用を有する。
すなわち、突起電極を設けることで、外部接続部および
実装接続部の表面積が大きくなる結果、これら外部接続
部と実装接続部とに付着する導電性接着剤層の量が増大
する。しかも、導電性接着剤層は突起電極に付着するこ
とで、その横方向に広がることなく、上方(縦)方向に
延び出た形状となる。このように、本発明によれば、形
成される導電性接着剤層は横方向に広がることなくその
量を増大させることができるので、電子部品の小型化に
伴って外部接続部の形成ピッチが小さくなったとして
も、短絡を起こすことなく確実に電子部品を実装部材に
接続することができる。さらには、導電性接着剤層を、
上方(縦)方向に延び出た状態にしてその接着剤量を増
大させることにより、増量させてその表面張力が大きく
なった導電性接着剤層どうしを接触面積を増大させるこ
となく(これは横方向に広がらないことに起因してい
る)、当接させることができるようになり、そのため、
セルフアライメントの精度が向上して、電子部品の位置
決め精度が高まる。
According to a third aspect of the present invention, there is provided the electronic component mounting method according to the second aspect, wherein the external connection portion of the electronic component and the external connection portion are formed as a pretreatment step of forming the adhesive layer. In the mounting connection part of the mounting member to mount the electronic component,
Each of them is characterized in that it further includes a step of forming a protruding electrode, thereby having the following effects.
That is, by providing the protruding electrodes, the surface area of the external connection portion and the mounting connection portion increases, and as a result, the amount of the conductive adhesive layer attached to the external connection portion and the mounting connection portion increases. In addition, the conductive adhesive layer adheres to the protruding electrodes, so that the conductive adhesive layer extends upward (vertically) without spreading in the horizontal direction. As described above, according to the present invention, the amount of the conductive adhesive layer to be formed can be increased without spreading in the lateral direction. Even if it becomes smaller, the electronic component can be reliably connected to the mounting member without causing a short circuit. Furthermore, the conductive adhesive layer,
By increasing the amount of the adhesive while extending in the upward (longitudinal) direction, the conductive adhesive layers having the increased surface tension due to the increased amount can be used without increasing the contact area between the conductive adhesive layers. Direction), but can be abutted,
The accuracy of self-alignment is improved, and the positioning accuracy of electronic components is improved.

【0012】なお、請求項1ないし3のいずれか記載の
電子部品の実装方法は、請求項4に記載したように、半
導体素子を回路基板に実装する構造において特に有効で
ある。
The electronic component mounting method according to any one of claims 1 to 3 is particularly effective in a structure in which a semiconductor element is mounted on a circuit board, as described in claim 4.

【0013】さらには、本発明の請求項1ないし4のい
ずれか記載の電子部品の実装方法によれば、請求項5に
記載したごとく、互いに相対して配置された電子部品の
外部接続部と実装部材の実装接続部とにそれぞれ設けら
れた突起電極と、前記突起電極それぞれの間に設けられ
て、前記外部接続部と前記実装接続部とを互いに電気的
に接続する導電性接着剤層とを有する電子部品の実装体
が得られる。このような電子部品の実装体は、例えば、
請求項6に記載したように、電子部品を回路基板に実装
した実装体がある。
Furthermore, according to the electronic component mounting method according to any one of the first to fourth aspects of the present invention, as described in the fifth aspect, the external connection portion of the electronic component disposed opposite to each other can be provided. A projecting electrode provided on each of the mounting connection portions of the mounting member, and a conductive adhesive layer provided between each of the protruding electrodes and electrically connecting the external connection portion and the mounting connection portion to each other. Is obtained. For example, a mounting body of such an electronic component is, for example,
As described in claim 6, there is a mounted body in which electronic components are mounted on a circuit board.

【0014】以下、本発明を実施の形態を参照してさら
に具体的に説明する。以下に説明する各実施の形態で
は、電子部品の一例である半導体素子を実装部材の一例
である回路基板に実装する構造において本発明を実施し
ているが、これは本発明の実施の形態の一例にすぎず、
他の電子部品(コンデンサ、抵抗等)を、他の実装部材
(多層基板やハイブリットIC等)に実装する際にも同
様に実施できるのはいうまでもない。
Hereinafter, the present invention will be described more specifically with reference to embodiments. In each of the embodiments described below, the present invention is implemented in a structure in which a semiconductor element, which is an example of an electronic component, is mounted on a circuit board, which is an example of a mounting member. This is just one example,
Needless to say, the present invention can be similarly carried out when other electronic components (capacitors, resistors, etc.) are mounted on other mounting members (multilayer substrate, hybrid IC, etc.).

【0015】(実施の形態1)図1は、本発明の実施の
形態1に関する実装方法の工程図である。ここで、1は
半導体素子、2は半導体素子1の外部接続部である電極
パッド、3は電極パッド2に形成された突起電極、4
は、半導体素子1の実装部材である回路基板、5は回路
基板4の実装接続部である端子電極、6は端子電極5に
形成された突起電極、7cは硬化前の第1の導電性接着
剤層、7dは硬化前の第2の導電性接着剤層、7eは硬
化後の第1の導電性接着剤層、7fは硬化後の第2の導
電性接着剤層、8は封止樹脂、9A、9Bは転写皿を、
それぞれ示している。
(First Embodiment) FIG. 1 is a process chart of a mounting method according to a first embodiment of the present invention. Here, 1 is a semiconductor element, 2 is an electrode pad which is an external connection part of the semiconductor element 1, 3 is a protruding electrode formed on the electrode pad 2, 4
Is a circuit board which is a mounting member of the semiconductor element 1, 5 is a terminal electrode which is a mounting connection portion of the circuit board 4, 6 is a protruding electrode formed on the terminal electrode 5, and 7c is a first conductive adhesive before curing. 7d, a second conductive adhesive layer before curing, 7e, a first conductive adhesive layer after curing, 7f, a second conductive adhesive layer after curing, 8: a sealing resin , 9A and 9B are transfer dishes,
Each is shown.

【0016】まず、図1(a)、(b)に示すように、
半導体素子1の電極パッド2および回路基板4の端子電
極5にそれぞれ突起電極3、6を形成する。突起電極
3、6は、電極パッド2上および端子電極5上にあっ
て、これら電極パッド2および端子電極5と同等もしく
は若干小さい大きさに形成されており、電極パッド2お
よび端子電極5の上方に突出した形状に形成される。な
お、図では、これら突起電極3、6は、上方に1段だけ
突出した形状にしているが、2段以上の複数段で上方に
突出する形状としてもよいのはいうまでもない。
First, as shown in FIGS. 1A and 1B,
Protruding electrodes 3 and 6 are formed on the electrode pad 2 of the semiconductor element 1 and the terminal electrode 5 of the circuit board 4, respectively. The protruding electrodes 3 and 6 are located on the electrode pad 2 and the terminal electrode 5 and are formed to have a size equal to or slightly smaller than the electrode pad 2 and the terminal electrode 5. It is formed in a shape protruding from In the drawing, the protruding electrodes 3 and 6 have a shape that protrudes upward by one step, but it is needless to say that the protruding electrodes 3 and 6 may have a shape that protrudes upward in two or more steps.

【0017】次に、図1(c)に示すように、第1の導
電性接着剤の液状体7c’を均一な厚さにして第1の転
写皿9Aに貯留する。そして、このような状態で第1の
転写皿9Aに貯留された第1の導電性接着剤の液状体7
c’内に半導体素子1の突起電極3を浸漬させ、突起電
極3に第1の導電性接着剤を転写することで、第1の導
電性接着剤層7cを形成する。
Next, as shown in FIG. 1C, the liquid 7c 'of the first conductive adhesive is stored in the first transfer tray 9A in a uniform thickness. The liquid 7 of the first conductive adhesive stored in the first transfer dish 9A in such a state.
The first conductive adhesive layer 7c is formed by immersing the projecting electrode 3 of the semiconductor element 1 in c ′ and transferring the first conductive adhesive to the projecting electrode 3.

【0018】同様に、図1(d)に示すように、第2の
導電性接着剤の液状体7d’を均一な厚さにして第2の
転写皿9Bに貯留する。そして、このように状態で第2
の転写皿9Bに貯留された第2の導電性接着剤の液状体
7d’内に回路基板4の突起電極6を浸漬させ、突起電
極6に第2の導電性接着を転写することで、第2の導電
性接着剤層7dを形成する。
Similarly, as shown in FIG. 1 (d), the liquid material 7d 'of the second conductive adhesive is stored in the second transfer plate 9B in a uniform thickness. And in this state the second
The projection electrode 6 of the circuit board 4 is immersed in the liquid material 7d 'of the second conductive adhesive stored in the transfer dish 9B, and the second conductive adhesive is transferred to the projection electrode 6. The second conductive adhesive layer 7d is formed.

【0019】次に、図1(e)に示すように、第2の導
電性接着剤層7dが形成された回路基板4の所定の位置
に、第1の導電性接着剤層7cが形成された半導体素子
1を、正確に搭載されるように位置合わせを行った後、
図1(f)に示すように、半導体素子1を回路基板4に
搭載する。位置合わせは、相対応する電極パッド2と端
子電極5どうしを互いに精度よく相対させることにより
行う。
Next, as shown in FIG. 1E, a first conductive adhesive layer 7c is formed at a predetermined position on the circuit board 4 on which the second conductive adhesive layer 7d is formed. After the semiconductor element 1 is aligned so as to be mounted accurately,
As shown in FIG. 1F, the semiconductor element 1 is mounted on a circuit board 4. Positioning is performed by accurately matching the corresponding electrode pads 2 and terminal electrodes 5 to each other.

【0020】このとき、電極パッド2の形成ピッチが狭
ピッチでは正確な位置合わせを施すのは困難となるが、
第1、第2の導電性接着剤層7c、7dが液状であるた
めに、その表面張力で導電性接着剤層7c、7dどうし
が丸くなろうという性質により、セルフアライメントさ
れるため、半導体素子1が回路基板4に対して少々の位
置ずれした状態で配置されたしても、精度高く位置合わ
せされることになる。
At this time, if the pitch of the electrode pads 2 is small, it is difficult to perform accurate positioning.
Since the first and second conductive adhesive layers 7c and 7d are in a liquid state, the conductive adhesive layers 7c and 7d are likely to be rounded due to their surface tension and are self-aligned. Even if 1 is placed with a slight displacement with respect to the circuit board 4, it will be accurately positioned.

【0021】また、電極パッド2と端子電極5とにそれ
ぞれ突起電極3、6を設けることで、電極パッド2と端
子電極5の表面積(突起電極3、6の表面積を含む)が
大きくなる結果、電極パッド2や端子電極5に付着する
導電性接着剤の量が増大する。しかも、第1、第2の導
電性接着剤層7c、7dは突起電極3、6に付着するこ
とで、その横方向に広がることなく、上方(縦)方向に
延び出た形状となる。そのため、第1、第2の導電性接
着剤層7c、7dを、上方(縦)方向に延び出た状態に
してその接着剤量を増大させることができるうえ、増量
させてその表面張力が大きくなった第1、第2の導電性
接着剤層7c、7dどうしをあまり接触面積を増大させ
ることなく(これは、第1、第2の導電性接着剤層7
c、7dが横方向に広がらないことに起因している)、
当接させることができる。このような理由により、セル
フアライメントの精度が向上して、半導体素子1の位置
決め精度がさらに高まる。
By providing the protruding electrodes 3 and 6 on the electrode pad 2 and the terminal electrode 5, respectively, the surface area of the electrode pad 2 and the terminal electrode 5 (including the protruding electrodes 3 and 6) is increased. The amount of the conductive adhesive attached to the electrode pads 2 and the terminal electrodes 5 increases. Moreover, the first and second conductive adhesive layers 7c and 7d adhere to the protruding electrodes 3 and 6, and thus have a shape extending upward (vertically) without spreading in the horizontal direction. Therefore, the first and second conductive adhesive layers 7c and 7d can be extended in the upward (longitudinal) direction to increase the amount of the adhesive and increase the surface tension to increase the amount of the adhesive. The first and second conductive adhesive layers 7c and 7d are not greatly increased in contact area (this is because the first and second conductive adhesive layers
c, 7d do not spread in the horizontal direction),
Can be abutted. For these reasons, the accuracy of the self-alignment is improved, and the positioning accuracy of the semiconductor element 1 is further increased.

【0022】また、半導体素子1の電極パッド2および
回路基板4の端子電極5との両方に、未硬化状態の第
1、第2の導電性接着剤層7c、7dを設けるので、半
導体素子1や回路基板4の小型化等により電極パッド2
や端子電極5の大きさが小さくなって、第1、第2の導
電性接着剤層7c、7dに設けることができる導電性接
着剤の量が少なくなっても、両方の導電性接着剤層7
c、7dの和によって十分なる導電性接着剤の量を得る
ことができるようになり、接続不良は未然に防止でき
る。
The uncured first and second conductive adhesive layers 7c and 7d are provided on both the electrode pads 2 of the semiconductor element 1 and the terminal electrodes 5 of the circuit board 4. Pad 2 due to the size of the circuit board 4
Even if the size of the terminal electrode 5 becomes smaller and the amount of the conductive adhesive that can be provided on the first and second conductive adhesive layers 7c and 7d decreases, both the conductive adhesive layers 7
By the sum of c and 7d, a sufficient amount of the conductive adhesive can be obtained, and a connection failure can be prevented.

【0023】さらには、突起電極3、6を設けることに
より、第1、第2の導電性接着剤層7c、7dは、横方
向に広がることなくその量を増大させることができるの
で、半導体素子1の小型化に伴って電極パッド2の形成
ピッチが小さくなったとしても、短絡を起こすことなく
確実に半導体素子1を回路基板4に実装することができ
る。
Furthermore, by providing the protruding electrodes 3 and 6, the amount of the first and second conductive adhesive layers 7c and 7d can be increased without spreading in the lateral direction. Even if the pitch at which the electrode pads 2 are formed becomes smaller with the miniaturization of the semiconductor device 1, the semiconductor element 1 can be reliably mounted on the circuit board 4 without causing a short circuit.

【0024】しかも、電極パッド2と端子電極5との両
方に、未硬化状態の第1、第2の導電性接着剤層7c、
7dを設けるために、第1、第2の導電性接着剤層7
c、7dどうしのなじみ(親和性)がよくなり、これら
第1、第2の導電性接着剤層7c、7dが一体化しやす
くなる。その結果、電極パッド2と端子電極5との間の
電気的接続がさらに確実になっている。
In addition, the uncured first and second conductive adhesive layers 7c are applied to both the electrode pads 2 and the terminal electrodes 5.
7d, the first and second conductive adhesive layers 7
The compatibility (affinity) between c and 7d is improved, and the first and second conductive adhesive layers 7c and 7d are easily integrated. As a result, the electrical connection between the electrode pad 2 and the terminal electrode 5 is further ensured.

【0025】以上のようにして、電極パッド2と端子電
極5との間に第1、第2の導電性接着剤層7c、7dを
配置した状態で、半導体素子1を回路基板4に搭載した
のち、この構造体(半導体素子1と回路基板4)を図示
しない硬化炉に搬送して、120℃、2時間の条件で熱
処理することで、第1、第2の導電性接着剤7c、7d
を硬化させる。
As described above, the semiconductor element 1 is mounted on the circuit board 4 with the first and second conductive adhesive layers 7c and 7d arranged between the electrode pad 2 and the terminal electrode 5. Thereafter, the structure (semiconductor element 1 and circuit board 4) is transported to a curing furnace (not shown) and heat-treated at 120 ° C. for 2 hours, so that first and second conductive adhesives 7c and 7d are formed.
To cure.

【0026】第1、第2の導電性接着剤層7c、7dの
硬化に引き続いて、半導体素子1と回路基板4との間の
間隙に、毛細管現象を利用して封止樹脂8を注入し、続
いて図示しない硬化炉に搬送して、150℃、2時間程
度の条件で熱処理することで封止樹脂8を硬化させる。
図1(g)はの実施の形態1の方法で作製した実装体の
断面図である。
Following the curing of the first and second conductive adhesive layers 7c and 7d, the sealing resin 8 is injected into the gap between the semiconductor element 1 and the circuit board 4 by utilizing the capillary phenomenon. Then, the sealing resin 8 is conveyed to a curing furnace (not shown) and heat-treated at 150 ° C. for about 2 hours to cure the sealing resin 8.
FIG. 1G is a cross-sectional view of the mounted body manufactured by the method of the first embodiment.

【0027】(実施の形態2)図2は、実施の形態2に
関する実装方法の工程図である。この図において、各符
号は基本的には実施の形態1と同様に付している。すな
わち、1は半導体素子、2は半導体素子1の電極パッ
ド、3は電極パッド2に形成された突起電極、4は回路
基板、5は回路基板4の端子電極、7cは硬化前の第1
の導電性接着剤層、7gは硬化前の第2の導電性接着剤
層、7eは硬化した第1の導電性接着剤層、7hは硬化
した第2の導電性接着剤層、8は封止樹脂を、それぞれ
示している。
(Embodiment 2) FIG. 2 is a process chart of a mounting method according to Embodiment 2. In this figure, each reference numeral is basically assigned in the same manner as in the first embodiment. That is, 1 is a semiconductor element, 2 is an electrode pad of the semiconductor element 1, 3 is a protruding electrode formed on the electrode pad 2, 4 is a circuit board, 5 is a terminal electrode of the circuit board 4, and 7c is a first electrode before curing.
7g is a cured second conductive adhesive layer, 7g is a cured first conductive adhesive layer, 7h is a cured second conductive adhesive layer, and 8 is a sealed. Stop resins are shown respectively.

【0028】まず、図2(a)に示すように、半導体素
子1の電極パッド2に突起電極3を形成する。突起電極
3は、電極パッド2上にあって、電極パッド2と同等も
しくは若干小さい大きさに形成されており、電極パッド
2の上方に突出した形状に形成される。なお、図では、
突起電極3は、上方に1段だけ突出した形状としている
が、2段以上の複数段で上方に突出する形状としてもよ
いのはいうまでもない。本実施の形態では、半導体素子
1に突起電極3を形成するものの、回路基板4には突起
電極を形成しない。
First, as shown in FIG. 2A, the protruding electrodes 3 are formed on the electrode pads 2 of the semiconductor element 1. The projecting electrode 3 is formed on the electrode pad 2 and has a size equal to or slightly smaller than the electrode pad 2, and is formed in a shape protruding above the electrode pad 2. In the figure,
The protruding electrode 3 has a shape protruding upward by one step, but needless to say, a shape protruding upward in two or more steps. In the present embodiment, the projecting electrodes 3 are formed on the semiconductor element 1, but no projecting electrodes are formed on the circuit board 4.

【0029】次に、図2(b)に示すように、第1の導
電性接着剤の液状体7c’を均一な厚さにして転写皿9
Cに貯留する。そして、このように状態で転写皿9Cに
貯留された第1の導電性接着剤の液状体7c’内に半導
体素子1の突起電極3を浸漬させ、突起電極3に第1の
導電性接着剤を転写することで、第1の導電性接着剤層
7cを形成する。
Next, as shown in FIG. 2 (b), the liquid 7c 'of the first conductive adhesive is made uniform in thickness and the transfer dish 9 is formed.
Store in C. Then, the projection electrode 3 of the semiconductor element 1 is immersed in the liquid 7c ′ of the first conductive adhesive stored in the transfer plate 9C in this state, and the first conductive adhesive is Is transferred to form the first conductive adhesive layer 7c.

【0030】一方、図2(c)に示すように、回路基板
4の端子電極5には、プリコート手法もしくは塗布手法
により、第2の導電性接着剤を厚膜状に形成すること
で、第2の導電性接着剤層7gを形成する。プリコート
手法としては、例えば、蒸着処理や噴霧処理を実施する
ことができる。また、塗布手法としては、例えば、マス
クを用いたスクリーン印刷を実施することができる。
On the other hand, as shown in FIG. 2C, a second conductive adhesive is formed on the terminal electrodes 5 of the circuit board 4 by a pre-coating method or a coating method to form a thick film. A second conductive adhesive layer 7g is formed. As the precoating method, for example, a vapor deposition process or a spray process can be performed. As an application method, for example, screen printing using a mask can be performed.

【0031】次に、図2(d)に示すように、第2の導
電性接着剤層7gが形成された回路基板4の所定の位置
に、第1の導電性接着剤層7cが形成された半導体素子
1を、正確に搭載されるように位置合わせを行った後、
図2(e)に示すように、半導体素子1を回路基板4に
搭載する。
Next, as shown in FIG. 2D, a first conductive adhesive layer 7c is formed at a predetermined position on the circuit board 4 on which the second conductive adhesive layer 7g is formed. After the semiconductor element 1 is aligned so as to be mounted accurately,
As shown in FIG. 2E, the semiconductor element 1 is mounted on the circuit board 4.

【0032】このとき、半導体素子1の電極パッド2お
よび回路基板4の端子電極5との両方に、未硬化状態の
第1、第2の導電性接着剤層7c、7gを設けるので、
半導体素子1や回路基板4の小型化等により電極パッド
2や端子電極5の大きさが小さくなって、第1、第2の
導電性接着剤層7c、7gに設けることができる導電性
接着剤の量が少なくなっても、両方の導電性接着剤層7
c、7gの和によって十分なる導電性接着剤の量を得る
ことができるようになり、接続不良は防止できる。
At this time, the uncured first and second conductive adhesive layers 7c and 7g are provided on both the electrode pads 2 of the semiconductor element 1 and the terminal electrodes 5 of the circuit board 4.
The size of the electrode pad 2 and the terminal electrode 5 is reduced due to the miniaturization of the semiconductor element 1 and the circuit board 4, and the conductive adhesive that can be provided on the first and second conductive adhesive layers 7c and 7g. Of the conductive adhesive layers 7 even if the amount of
By the sum of c and 7 g, a sufficient amount of the conductive adhesive can be obtained, and poor connection can be prevented.

【0033】また、電極パッド2と端子電極5との両方
に、未硬化状態の第1、第2の導電性接着剤層7c、7
gを設けるために、第1、第2の導電性接着剤層7c、
7gどうしのなじみ(親和性)がよくなり、これら第
1、第2の導電性接着剤層7c、7gが一体化しやすく
なる。その結果、電極パッド2と端子電極5との間の電
気的接続がさらに確実になっている。
The uncured first and second conductive adhesive layers 7c and 7c are applied to both the electrode pad 2 and the terminal electrode 5.
g, the first and second conductive adhesive layers 7c,
The compatibility (affinity) of the 7 g is improved, and the first and second conductive adhesive layers 7 c and 7 g are easily integrated. As a result, the electrical connection between the electrode pad 2 and the terminal electrode 5 is further ensured.

【0034】以上のようにして、電極パッド2と端子電
極5との間に第1、第2の導電性接着剤層7c、7gを
配置した状態で、半導体素子1を回路基板4に搭載した
のち、この構造体(半導体素子1と回路基板4)を図示
しない硬化炉に搬送して、120℃、2時間の条件で熱
処理することで、第1、第2の導電性接着剤7c、7g
を硬化させる。
As described above, the semiconductor element 1 is mounted on the circuit board 4 with the first and second conductive adhesive layers 7c and 7g disposed between the electrode pad 2 and the terminal electrode 5. After that, the structure (semiconductor element 1 and circuit board 4) is transferred to a curing furnace (not shown) and heat-treated at 120 ° C. for 2 hours, thereby forming first and second conductive adhesives 7c and 7g.
To cure.

【0035】導電性接着剤硬化に引き続いて、半導体素
子1と回路基板4との間隙に、毛細管現象を利用して封
止樹脂8を注入し、続いて硬化炉に搬送して、150
℃、2時間程度で硬化させる。図2(f)は本実施の形
態の方法で作製した実装体の断面図である。
Subsequent to the curing of the conductive adhesive, the sealing resin 8 is injected into the gap between the semiconductor element 1 and the circuit board 4 by utilizing the capillary phenomenon.
Cured at about 2 hours. FIG. 2F is a cross-sectional view of the mounted body manufactured by the method of the present embodiment.

【0036】(実施の形態3)図3は、本発明の実施の
形態3に関する実装方法の工程図である。この図におい
て、各符号は基本的には実施の形態1と同様に付してい
る。すなわち、1は半導体素子、2は半導体素子1の電
極パッド、4は回路基板、5は回路基板4の端子電極、
6は端子電極5に形成された突起電極、7iは硬化前の
第1の導電性接着剤層、7dは硬化前の第2の導電性接
着剤層、7jは硬化した第1の導電性接着剤層、7fは
硬化した第2の導電性接着剤層、8は封止樹脂を、それ
ぞれ示している。
(Embodiment 3) FIG. 3 is a process chart of a mounting method according to Embodiment 3 of the present invention. In this figure, each reference numeral is basically assigned in the same manner as in the first embodiment. That is, 1 is a semiconductor element, 2 is an electrode pad of the semiconductor element 1, 4 is a circuit board, 5 is a terminal electrode of the circuit board 4,
Reference numeral 6 denotes a protruding electrode formed on the terminal electrode 5, 7i denotes a first conductive adhesive layer before curing, 7d denotes a second conductive adhesive layer before curing, and 7j denotes a cured first conductive adhesive. An agent layer, 7f indicates a cured second conductive adhesive layer, and 8 indicates a sealing resin.

【0037】まず、図3(a)に示すように、回路基板
4の端子電極5に突起電極6を形成する。突起電極6
は、端子電極5上にあって、端子電極6より若干小さい
大きさに形成されており、端子電極6の上方に突出した
形状に形成される。なお、図では、突起電極6は、上方
に1段だけ突出した形状としているが、2段以上の複数
段で上方に突出する形状としてもよいのはいうまでもな
い。本実施の形態では、回路基板4に突起電極6を形成
するものの、半導体素子1には突起電極を形成しない。
First, as shown in FIG. 3A, the protruding electrodes 6 are formed on the terminal electrodes 5 of the circuit board 4. Protruding electrode 6
Is formed on the terminal electrode 5 and has a slightly smaller size than the terminal electrode 6, and is formed in a shape protruding above the terminal electrode 6. In the drawing, the protruding electrode 6 has a shape protruding upward by one step, but it is needless to say that the protruding electrode 6 may have a shape protruding upward in two or more steps. In the present embodiment, the bump electrodes 6 are formed on the circuit board 4, but no bump electrodes are formed on the semiconductor element 1.

【0038】次に、図3(b)に示すように、第2の導
電性接着剤の液状体7d’を均一な厚さにして転写皿9
Dに貯留する。そして、このように状態で転写皿9Dに
貯留された第2の導電性接着剤の液状体7d’内に回路
基板4の突起電極6を浸漬させ、突起電極6に第2の導
電性接着剤を転写することで、第2の導電性接着剤層7
dを形成する。
Next, as shown in FIG. 3 (b), the liquid 7d 'of the second conductive adhesive is made to have a uniform thickness,
Store in D. Then, the projection electrode 6 of the circuit board 4 is immersed in the liquid material 7d ′ of the second conductive adhesive stored in the transfer dish 9D in this state, and the second conductive adhesive is Is transferred to form the second conductive adhesive layer 7
forming d.

【0039】一方、図3(c)に示すように、半導体素
子1の電極パッド2には、プリコート手法もしくは塗布
手法により、第1の導電性接着剤を厚膜状に形成するこ
とで、第1の導電性接着剤層7iを形成する。プリコー
ト手法としては、例えば、蒸着処理や噴霧処理を実施す
ることができる。また、塗布手法としては、マスクを用
いたスクリーン印刷を実施することができる。
On the other hand, as shown in FIG. 3C, the first conductive adhesive is formed in a thick film on the electrode pads 2 of the semiconductor element 1 by a precoating method or a coating method. One conductive adhesive layer 7i is formed. As the precoating method, for example, a vapor deposition process or a spray process can be performed. In addition, as an application method, screen printing using a mask can be performed.

【0040】次に、図3(d)に示すように、第2の導
電性接着剤層7dが形成された回路基板4の所定の位置
に、第1の導電性接着剤層7iが形成された半導体素子
1を、正確に搭載されるように位置合わせを行った後、
図2(e)に示すように、半導体素子1を回路基板4に
搭載する。
Next, as shown in FIG. 3D, a first conductive adhesive layer 7i is formed at a predetermined position on the circuit board 4 on which the second conductive adhesive layer 7d is formed. After the semiconductor element 1 is aligned so as to be mounted accurately,
As shown in FIG. 2E, the semiconductor element 1 is mounted on the circuit board 4.

【0041】このとき、半導体素子1の電極パッド2お
よび回路基板4の端子電極5との両方に、未硬化状態の
第1、第2の導電性接着剤層7i、7dを設けるので、
半導体素子1や回路基板4の小型化等により電極パッド
2や端子電極5の大きさが小さくなって、第1、第2の
導電性接着剤層7i、7dに設けることができる導電性
接着剤の量が少なくなっても、両方の導電性接着剤層7
i、7dの和によって十分なる導電性接着剤の量を得る
ことができるようになり、接続不良はに防止できる。
At this time, the uncured first and second conductive adhesive layers 7i and 7d are provided on both the electrode pads 2 of the semiconductor element 1 and the terminal electrodes 5 of the circuit board 4.
The size of the electrode pad 2 and the terminal electrode 5 is reduced due to the miniaturization of the semiconductor element 1 and the circuit board 4, and the conductive adhesive that can be provided on the first and second conductive adhesive layers 7i and 7d. Of the conductive adhesive layers 7 even if the amount of
By the sum of i and 7d, a sufficient amount of the conductive adhesive can be obtained, and poor connection can be prevented.

【0042】また、電極パッド2と端子電極5との両方
に、未硬化状態の第1、第2の導電性接着剤層7i、7
dを設けるために、第1、第2の導電性接着剤層7i、
7dどうしのなじみ(親和性)がよくなり、これら第
1、第2の導電性接着剤層7i、7hが一体化しやすく
なる。その結果、電極パッド2と端子電極5との間の電
気的接続がさらに確実になっている。
The uncured first and second conductive adhesive layers 7i, 7 are applied to both the electrode pad 2 and the terminal electrode 5.
d, the first and second conductive adhesive layers 7i,
The compatibility (affinity) of 7d is improved, and the first and second conductive adhesive layers 7i and 7h are easily integrated. As a result, the electrical connection between the electrode pad 2 and the terminal electrode 5 is further ensured.

【0043】以上のようにして、電極パッド2と端子電
極5との間に第1、第2の導電性接着剤層7i、7dを
配置した状態で、半導体素子1を回路基板4に搭載した
のち、この構造体(半導体素子1と回路基板4)を図示
しない硬化炉に搬送して、120℃、2時間の条件で熱
処理することで、第1、第2の導電性接着剤層7i、7
dを硬化させる導電性接着剤硬化に引き続いて、半導体
素子1と回路基板4との間隙に、毛細管現象を利用して
封止樹脂8を注入し、続いて硬化炉に搬送して、150
℃、2時間程度で硬化させる。図3(f)は本実施の形
態の方法で作製した実装体の断面図である。
As described above, the semiconductor element 1 was mounted on the circuit board 4 with the first and second conductive adhesive layers 7i and 7d being disposed between the electrode pad 2 and the terminal electrode 5. After that, the structure (semiconductor element 1 and circuit board 4) is transferred to a curing furnace (not shown) and heat-treated at 120 ° C. for 2 hours to form first and second conductive adhesive layers 7i, 7
Subsequent to the curing of the conductive adhesive for curing d, the sealing resin 8 is injected into the gap between the semiconductor element 1 and the circuit board 4 by utilizing the capillary phenomenon, and subsequently, is conveyed to a curing furnace to be cured.
Cured at about 2 hours. FIG. 3F is a cross-sectional view of the mounted body manufactured by the method of the present embodiment.

【0044】(実施の形態4)図4は、本発明の実施の
形態4に関する実装方法の工程図である。この図におい
て、各符号は基本的には実施の形態1と同様に付してい
る。すなわち、1は半導体素子、2は半導体素子1の電
極パッド、4は回路基板、5は回路基板4の端子電極、
7kは硬化前の第1の導電性接着剤層、7lは硬化前の
第2の導電性接着剤層、7mは第1の導電性接着剤の硬
化物、7nは第2の導電性接着剤層の硬化物、8は封止
樹脂を示している。
(Fourth Embodiment) FIG. 4 is a process chart of a mounting method according to a fourth embodiment of the present invention. In this figure, each reference numeral is basically assigned in the same manner as in the first embodiment. That is, 1 is a semiconductor element, 2 is an electrode pad of the semiconductor element 1, 4 is a circuit board, 5 is a terminal electrode of the circuit board 4,
7k is a first conductive adhesive layer before curing, 7l is a second conductive adhesive layer before curing, 7m is a cured product of the first conductive adhesive, 7n is a second conductive adhesive The cured product of the layer, 8 indicates a sealing resin.

【0045】まず、図4(a)に示すように、半導体素
子1の電極パッド2上に第1の導電性接着剤層7kをプ
リコートもしくは塗布しておく。同様に、図4(b)に
示すように、回路基板4の端子電極5上に第2の導電性
接着剤層7lをプリコートもしくは塗布しておく。プリ
コート法や塗布法の例は、実施の形態2、3で説明した
のと同様である。
First, as shown in FIG. 4A, a first conductive adhesive layer 7k is pre-coated or applied on the electrode pads 2 of the semiconductor element 1. Similarly, as shown in FIG. 4B, a second conductive adhesive layer 7l is pre-coated or applied on the terminal electrodes 5 of the circuit board 4. Examples of the precoating method and the coating method are the same as those described in the second and third embodiments.

【0046】次に、図4(c)に示すように、第1の導
電性接着剤層7kが形成された回路基板4の所定の位置
に、第2の導電性接着剤層7lが形成された半導体素子
1を、正確に搭載されるように位置合わせを行った後、
搭載する。
Next, as shown in FIG. 4C, a second conductive adhesive layer 7l is formed at a predetermined position on the circuit board 4 on which the first conductive adhesive layer 7k is formed. After the semiconductor element 1 is aligned so as to be mounted accurately,
Mount.

【0047】続いて、図4(d)に示すように、図示し
ない硬化炉に搬送して、120℃、2時間ほどの条件で
加熱処理を行うことで、第1の導電性接着剤7kおよび
第2の導電性接着剤7lを硬化させる。
Subsequently, as shown in FIG. 4D, the first conductive adhesive 7k and the first conductive adhesive 7k are conveyed to a curing furnace (not shown) and subjected to a heat treatment at 120 ° C. for about 2 hours. The second conductive adhesive 7l is cured.

【0048】第1、第2の導電性接着剤層7k,7lの
加熱硬化処理に引き続いて、半導体素子1と回路基板4
との間隙に、毛細管現象を利用して封止樹脂8を注入
し、続いて図示しない硬化炉に搬送して、150℃、2
時間程度で条件で加熱処理することで硬化させる。図7
(e)は本実施の形態で作製した実装体の断面図であ
る。
Following the heat curing treatment of the first and second conductive adhesive layers 7k and 7l, the semiconductor element 1 and the circuit board 4
The sealing resin 8 is injected into the gap with the use of the capillary phenomenon, and then transported to a curing furnace (not shown) at 150 ° C.
It is cured by heat treatment under conditions for about an hour. FIG.
(E) is a cross-sectional view of the mounted body manufactured in the present embodiment.

【0049】なお、上述した各実施の形態における第
1、導電性接着剤層と第2の導電性接着剤層との組み合
わせは、(第1の導電性接着剤層の樹脂成分、第2の導
電性接着剤層の樹脂成分)=(熱可塑性、熱可塑性)、
(熱可塑性、熱硬化性)、(熱硬化性、熱可塑性)、
(熱硬化性、熱硬化性)のどの組み合わせでもあっても
よい。
The combination of the first conductive adhesive layer and the second conductive adhesive layer in each of the above-described embodiments is (the resin component of the first conductive adhesive layer, the second conductive adhesive layer, Resin component of conductive adhesive layer) = (thermoplastic, thermoplastic),
(Thermoplastic, thermosetting), (thermosetting, thermoplastic),
(Thermosetting, thermosetting).

【0050】また、第1の導電性接着剤層と第2の導電
性接着剤層とを全く同じ導電性接着剤とする場合は、ひ
とつの転写皿に貯留した同一の導電性接着剤を、半導体
素子1と回路基板4とに転写してもよいのはいうまでも
ない。
When the first conductive adhesive layer and the second conductive adhesive layer are completely the same conductive adhesive, the same conductive adhesive stored in one transfer dish may be used. It goes without saying that the image may be transferred to the semiconductor element 1 and the circuit board 4.

【0051】次に、本発明における第1、第2の導電性
接着剤層の樹脂組成の組み合わせそれぞれの特徴につい
て説明する。
Next, the characteristics of each combination of the resin compositions of the first and second conductive adhesive layers in the present invention will be described.

【0052】(第1の導電性接着剤層の樹脂成分、第2
の導電性接着剤層の樹脂成分)=(熱可塑性、熱可塑
性)の組み合わせを用いた場合 この場合には、発生する熱応力に対し、長期に渡って安
定な構造を得ることができる。すなわち熱可塑性樹脂
は、応力に対してバルク破壊を生じることなく、伸縮・
せん断変形することができるため、長期に渡り、熱応力
に対して安定な構造体となる。また熱可塑性樹脂は、ア
セトン等の有機溶剤に溶解するため、導電性接着剤硬化
後に不具合が生じた時でも、リペアーすることができ
る。しかし一方で、接着強度・バルク強度が弱いという
問題も持ち合わせている。
(Resin component of first conductive adhesive layer, second conductive adhesive layer
Resin component of conductive adhesive layer) = (thermoplastic, thermoplastic
In this case, a stable structure can be obtained over a long period against the generated thermal stress. In other words, thermoplastic resin can expand and contract without stress causing bulk fracture.
Since it can be sheared, the structure becomes stable against thermal stress over a long period of time. Further, since the thermoplastic resin is dissolved in an organic solvent such as acetone, it can be repaired even when a problem occurs after the conductive adhesive is cured. On the other hand, however, there is also a problem that adhesive strength and bulk strength are weak.

【0053】(第1の導電性接着剤層の樹脂成分、第2
の導電性接着剤層の樹脂成分)=(熱硬化性、熱硬化
性)の組み合わせを用いた場合 この場合には、量産性に優れた実装体を得ることができ
る。すなわち、熱硬化性樹脂は、高速で反応を終了させ
ることが可能であり、より量産性を向上させることがで
きる。また熱硬化性樹脂は接着強度が強いため、電極パ
ッド2との界面や、端子電極5との界面において、導電
性接着剤層の剥離が生じにくくなる。
(The resin component of the first conductive adhesive layer, the second
= Resin component of conductive adhesive layer) = (thermosetting, thermosetting)
In this case, a package excellent in mass productivity can be obtained. That is, the thermosetting resin can terminate the reaction at a high speed, and can further improve mass productivity. In addition, since the thermosetting resin has a high adhesive strength, the conductive adhesive layer hardly peels off at the interface with the electrode pad 2 or at the interface with the terminal electrode 5.

【0054】(第1の導電性接着剤層の樹脂成分、第2
の導電性接着剤層の樹脂成分)=(熱可塑性、熱硬化
性)もしくは(熱硬化性、熱可塑性)の組み合わせを用
いた場合 この場合には、熱硬化性樹脂と熱可塑性樹脂の利点とを
持ち合わせた接合層を形成することができる。その利点
としてまず、リペアーが可能なことがあげられる。ここ
で、半導体素子1を再利用したい場合は、半導体素子1
側を熱可塑性樹脂の導電性接着剤とし、回路基板4側を
熱硬化性の導電性接着剤とすればよい。回路基板4を再
利用したい場合は、その逆とすればよい。さらには、熱
可塑性樹脂の導電性接着剤層が応力を緩和するために、
熱応力に対して安定となる。
(The resin component of the first conductive adhesive layer, the second
Resin component of the conductive adhesive layer) = (thermoplastic, thermosetting)
) Or (thermosetting, thermoplastic) combination
In this case, a bonding layer having the advantages of a thermosetting resin and a thermoplastic resin can be formed. The first advantage is that repair is possible. Here, when the semiconductor element 1 is to be reused, the semiconductor element 1
The side may be a conductive adhesive of a thermoplastic resin, and the circuit board 4 side may be a thermosetting conductive adhesive. If the circuit board 4 is to be reused, the reverse is necessary. Furthermore, because the conductive adhesive layer of thermoplastic resin relieves stress,
It becomes stable against thermal stress.

【0055】[0055]

【発明の効果】以上説明したように、本発明によれば、
半導体素子の外部接続部と、実装部材の実装接続部にそ
れぞれ導電性接着剤層を設けることにより、片方の導電
性接着剤量は少なくても、両者を合わせることにより、
十分な導電性接着剤量を得ることができ、ひいては信頼
性の高い実装体を得ることができる。このような効果
は、電子部品の外部接続部の形成ピッチが狭くなるにつ
れて、十分な導電性接着剤層が得られなくなり、その結
果として生産性や信頼性が劣化する場合に特に有効であ
る。
As described above, according to the present invention,
By providing a conductive adhesive layer on each of the external connection portion of the semiconductor element and the mounting connection portion of the mounting member, even if the amount of one conductive adhesive is small, by combining the two,
A sufficient amount of the conductive adhesive can be obtained, and a highly reliable mounting body can be obtained. Such an effect is particularly effective in a case where a sufficient conductive adhesive layer cannot be obtained as the formation pitch of the external connection portion of the electronic component becomes narrower, and as a result, productivity and reliability deteriorate.

【0056】また、外部接続部の形成ピッチが狭くなる
につれて、電子部品と実装部材とを位置合わせをするの
が非常に困難になるが、電子部品の外部接続部に設けた
導電性接着剤層、および実装部材の実装接続部に設けた
導電性接着剤層を液状にすることで、その表面張力で液
体が丸くなろうとする性質により精度の高いセルフアラ
イメントが可能となり、少々の位置ずれを問題とするこ
となく、精度の高い位置合わせを行うことが可能とな
る。
Further, as the pitch of forming the external connection portion becomes narrower, it becomes very difficult to align the electronic component and the mounting member. However, the conductive adhesive layer provided on the external connection portion of the electronic component becomes difficult. By making the conductive adhesive layer provided on the mounting connection part of the mounting member liquid, the liquid tends to round due to its surface tension, which enables high-precision self-alignment. , It is possible to perform highly accurate positioning.

【0057】また、外部接続部と実装接続部との両方
に、未硬化状態の導電性接着剤層を設けることにより、
導電性接着剤層どうしのなじみ(親和性)がよくなり、
導電性接着剤層によって外部接続部と実装接続部とを確
実に接着することができるようになる。また、接着強度
が増大するため信頼性の高い実装体を得ることができ
る。
By providing an uncured conductive adhesive layer on both the external connection portion and the mounting connection portion,
The familiarity (affinity) between the conductive adhesive layers is improved,
The external connection portion and the mounting connection portion can be securely bonded by the conductive adhesive layer. Further, since the bonding strength is increased, a highly reliable mounting body can be obtained.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 本発明の実施の形態1における実装方法の工
程をそれぞれ示す断面図である。
FIG. 1 is a cross-sectional view showing each step of a mounting method according to a first embodiment of the present invention.

【図2】 本発明の実施の形態2における実装方法の工
程をそれぞれ示す断面図である。
FIG. 2 is a cross-sectional view showing each step of a mounting method according to a second embodiment of the present invention.

【図3】 本発明の実施の形態3における実装方法の工
程をそれぞれ示す断面図である。
FIG. 3 is a cross-sectional view showing each step of a mounting method according to a third embodiment of the present invention.

【図4】 本発明の実施の形態における実装方法の工程
をそれぞれ示す断面図である。
FIG. 4 is a cross-sectional view showing each step of the mounting method according to the embodiment of the present invention.

【図5】従来例における実装方法の工程をそれぞれ示す
断面図である。
FIG. 5 is a cross-sectional view showing steps of a mounting method in a conventional example.

【符号の説明】[Explanation of symbols]

1 半導体素子 2 電極パッド 3 突起電極 4 回路基板 5 端子電極 6 突起電極 7c,7i,7k 第1の導電性接着剤層 7d,7g 7l 第2の導電性接着剤層 8 封止樹脂 DESCRIPTION OF SYMBOLS 1 Semiconductor element 2 Electrode pad 3 Projection electrode 4 Circuit board 5 Terminal electrode 6 Projection electrode 7c, 7i, 7k First conductive adhesive layer 7d, 7g 7l Second conductive adhesive layer 8 Sealing resin

───────────────────────────────────────────────────── フロントページの続き (72)発明者 別所 芳宏 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 Fターム(参考) 5E319 AA03 AB05 AB10 AC01 BB11 CD04 5E336 AA04 BB01 BC28 CC44 CC58 EE07 GG09 5F044 KK01 KK16 LL07 QQ01 QQ06 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Yoshihiro Bessho 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. F term (reference) 5E319 AA03 AB05 AB10 AC01 BB11 CD04 5E336 AA04 BB01 BC28 CC44 CC58 EE07 GG09 5F044 KK01 KK16 LL07 QQ01 QQ06

Claims (6)

【特許請求の範囲】[Claims] 【請求項1】 電子部品の外部接続部、およびこの電子
部品を実装する実装部材の実装接続部に、それぞれ未硬
化状態の導電性接着剤層を設ける工程と、 両導電性接着剤層が互いに相対するように電子部品を位
置合わせして実装部材に搭載する工程と、 両導電性接着剤層を硬化させる工程と、 を含むことを特徴とする電子部品の実装方法。
A step of providing an uncured conductive adhesive layer in each of an external connection portion of an electronic component and a mounting connection portion of a mounting member for mounting the electronic component; A method for mounting an electronic component, comprising: positioning an electronic component so as to face each other, and mounting the electronic component on a mounting member; and curing the two conductive adhesive layers.
【請求項2】 請求項1記載の電子部品の実装方法であ
って、 前記導電性接着剤層を設ける工程において、前記外部接
続部、および前記実装接続部に、液状の導電性接着剤層
を形成することを特徴とする電子部品の実装方法。
2. The method for mounting an electronic component according to claim 1, wherein in the step of providing the conductive adhesive layer, a liquid conductive adhesive layer is provided on the external connection portion and the mounting connection portion. A method for mounting an electronic component, comprising: forming an electronic component;
【請求項3】 請求項2記載の電子部品の実装方法であ
って、 前記接着剤層を形成する工程の前処理工程として、電子
部品の外部接続部、およびこの電子部品を実装する実装
部材の実装接続部に、それぞれ突起電極を形成する工程
をさらに含むことを特徴とする電子部品の実装方法。
3. The method for mounting an electronic component according to claim 2, wherein, as a preprocessing step of the step of forming the adhesive layer, an external connection portion of the electronic component and a mounting member for mounting the electronic component are mounted. A method for mounting an electronic component, further comprising a step of forming a projecting electrode in each of the mounting connection portions.
【請求項4】 請求項1ないし3のいずれか記載の電子
部品の実装方法であって、 前記電子部品は半導体素子であり、前記実装部材は、半
導体装置を実装する回路基板であることを特徴とする電
子部品の実装方法。
4. The method of mounting an electronic component according to claim 1, wherein the electronic component is a semiconductor element, and the mounting member is a circuit board on which a semiconductor device is mounted. Electronic component mounting method.
【請求項5】 互いに相対して配置された電子部品の外
部接続部と実装部材の実装接続部とにそれぞれ形成され
た突起電極と、 前記突起電極それぞれの間に設けられて、前記外部接続
部と前記実装接続部とを互いに電気的に接続する導電性
接着剤層と、 を有することを特徴とする電子部品の実装体。
5. A protruding electrode formed on an external connection portion of an electronic component and a mounting connection portion of a mounting member, which are disposed opposite to each other, and the external connection portion is provided between the protruding electrodes. And a conductive adhesive layer for electrically connecting the mounting connection part to each other.
【請求項6】 請求項5記載の電子部品の実装体であっ
て、 前記電子部品は半導体素子であり、前記実装部材は回路
基板であることを特徴とする電子部品の実装体。
6. The electronic component package according to claim 5, wherein the electronic component is a semiconductor element, and the mounting member is a circuit board.
JP16680699A 1999-06-14 1999-06-14 Electronic component mounting method Expired - Fee Related JP3427347B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
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Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16680699A JP3427347B2 (en) 1999-06-14 1999-06-14 Electronic component mounting method

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2003059473A Division JP2003297877A (en) 2003-03-06 2003-03-06 Mounting body for electronic component

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JP2000353864A true JP2000353864A (en) 2000-12-19
JP3427347B2 JP3427347B2 (en) 2003-07-14

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ID=15838036

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Application Number Title Priority Date Filing Date
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Country Link
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002228886A (en) * 2001-01-31 2002-08-14 Kansai Tlo Kk Self alignment structure
JP2011258981A (en) * 2011-08-29 2011-12-22 Panasonic Electric Works Co Ltd Self alignment structure and self alignment method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002228886A (en) * 2001-01-31 2002-08-14 Kansai Tlo Kk Self alignment structure
JP2011258981A (en) * 2011-08-29 2011-12-22 Panasonic Electric Works Co Ltd Self alignment structure and self alignment method

Also Published As

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