JP2000340761A - Method of manufacturing semiconductor device and ferroelectric capacitor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To maximize remanen of a ferroelectrics film, while minimizing a voltage required for writing for to a semiconductor device having a ferroelectrics capacitor. SOLUTION: When only a thermal process in an oxidizing atmosphere is performed with a film which is formed by sputtering a ferroelectrics film, the magnetic field applied to a target is set to 270 Gausses or higher, and when thermal process in an inert atmosphere and that in the oxidizing atmosphere are performed with the formed film, the magnetic field applied to the target is set to 349 Gausses or lower.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a semiconductor device, and more particularly to a method of manufacturing a semiconductor memory device using a ferroelectric thin film. Semiconductor storage devices such as so-called DRAM or SRAM are widely used as high-speed main storage devices in information processing devices such as computers.
These are volatile storage devices, and stored information is lost when the power is turned off. On the other hand, a nonvolatile magnetic disk device has conventionally been used as a large-capacity auxiliary storage device for storing programs and data.

However, magnetic disk drives have the disadvantages of being large and mechanically fragile, consuming large amounts of power, and having low access speeds when reading and writing information. On the other hand, recently, as a nonvolatile auxiliary storage device, an EEPP which stores information in the form of electric charges in a floating gate electrode has been developed.
ROMs or flash memories are often used. In particular, since a flash memory has a cell configuration similar to that of a DRAM, it can be easily formed at a large integration density, and is expected as a large-capacity storage device comparable to a magnetic disk device.

On the other hand, in an EEPROM or a flash memory, information is written by injecting hot electrons into a floating gate electrode through a tunnel insulating film.
Further, there has been a problem that the tunnel insulating film is deteriorated when information is repeatedly written and erased. If the tunnel insulating film is deteriorated, the writing or erasing operation becomes unstable.

On the other hand, there has been proposed a ferroelectric memory device (hereinafter referred to as FeRAM) for storing information in the form of spontaneous polarization of a ferroelectric film. In such an FeRAM, each memory cell transistor is formed of a single MOSFET as in the case of a DRAM, and the dielectric film in the memory cell capacitor is formed of PZT (Pb (Zr, Ti) O ₃ ) or PL.
It has a configuration in which it is replaced with a ferroelectric such as ZT (Pb (Zr, Ti, La) O ₃ ), and can be integrated at a high integration density. In addition, since FeRAM controls spontaneous polarization of a ferroelectric capacitor by applying an electric field, an EEPROM is used to perform writing by injecting hot electrons.
Write speed is 1000 times or more faster than that of flash memory and flash memory, and power consumption is about 1/10
It has the advantageous feature of being reduced to Furthermore, since it is not necessary to use a tunnel oxide film, the lifetime is long, and it is considered that 100,000 times the number of rewrites of the flash memory can be secured.

Although many of the currently realized FeRAMs are designed with relatively loose design rules of about 1 μm, they can be mixed with recent high-speed CMOS logic circuits down to submicron on integrated circuits. Like,
There is research into further miniaturization of FeRAM.

[0006]

2. Description of the Related Art FIG. 1 shows a configuration of a conventional FeRAM 10. Referring to FIG. 1, a FeRAM 10 is formed on a p-type Si substrate 11, and an active region is defined on a surface of the Si substrate 11 by a field oxide film 12. A gate electrode 13 of a memory cell transistor is formed in the active region via a gate oxide film (not shown) corresponding to a word line of FeRAM. ⁺ Type diffusion regions 11A _, 11
B is formed as a source region and a drain region of the memory cell transistor, respectively. Further, the substrate 1
In 1, a channel region is formed between the diffusion regions 11A and 11B.

The gate electrode 13 is covered with a CVD oxide film 14 covering the surface of the Si substrate 11 in the active region, and the CVD oxide film 14 is covered with a planarizing interlayer insulating film 15. A contact hole 15A exposing the diffusion region 11B is formed in the interlayer insulating film 15, and the contact hole 15A is filled with a plug 16 made of polysilicon or WSi.

Further, an adhesion film 17 having a Ti / TiN structure is formed on the interlayer insulation film 15 so as to cover the exposed portion of the plug 16, and a lower electrode 18 made of Pt or the like is formed on the adhesion film 17. It is formed. Further, a ferroelectric film 19 made of PZT or PLZT is formed on the lower electrode 18, and an upper electrode 20 made of Pt or the like is formed on the ferroelectric film 19.

The side wall surface of the ferroelectric capacitor composed of the lower electrode 18, the ferroelectric film 19 and the upper electrode 20 is C
The ferroelectric capacitor is entirely covered with an interlayer insulating film 22. A contact hole 22A that exposes the diffusion region 22A is formed in the interlayer insulating film 22, and a bit line made of Al or an Al alloy that contacts the diffusion region 22A in the contact hole 22A on the interlayer insulating film 22. A pattern 23 is formed.

FIG. 2 shows spontaneous polarization characteristics of PLZT used as the ferroelectric film 19 in the FeRAM 10 of FIG. Referring to FIG. 2, by applying a predetermined write voltage between the lower electrode 18 and the upper electrode 20 in the FeRAM 10 of FIG.
, The spontaneous polarization in the PLZT film is inverted, and desired binary information is written in the ferroelectric film 19. Also,
In order to read the binary information written in the FeRAM 10 of FIG. 1, the word line, that is, the gate electrode 13 is activated, and the voltage appearing on the bit line electrode 23 through the channel region is detected. In the hysteresis loop of FIG. 2, the larger the width 2Pr when the electric field intensity is zero, that is, the larger the value of the remanent polarization, the more securely the FeRAM 10 holds the information. In addition, the value of the electric field required for writing tends to decrease, and as a result, the FeRAM 10 can be driven with low power. In other words, the FeRAM1 of FIG.
At 0, it is desirable to maximize the value of the remanent polarization 2Pr of the ferroelectric film 19.

The semiconductor device shown in FIG.
It is also possible to use it as M. In this case, since the ferroelectric film 19 has a very large dielectric constant, a sufficient capacitor capacity can be ensured even if the capacitor is not specially shaped.
D using such a ferroelectric film as a capacitor dielectric film
In the RAM, even if the semiconductor device is miniaturized, no problem occurs in retaining information.

[0012]

By the way, in a semiconductor device having such a ferroelectric capacitor, in order to maximize the remanent polarization of the ferroelectric film 19 constituting the ferroelectric capacitor, it is necessary to use the ferroelectric capacitor. The deposition step and the crystallization step of the body film 19 become very important. For this reason, studies or proposals have already been made on the pretreatment of the lower electrode 18 prior to the deposition of the ferroelectric film 19 and the temperature and atmosphere in the crystallization step.

In the research on which the present invention is based, the inventor of the present invention has found that when a ferroelectric film is formed by sputtering, the magnitude of the magnetic field applied to the film is greatly affected by the characteristics of the ferroelectric film. And found that the optimal heat treatment conditions vary with the magnitude of the magnetic field applied during the formation of the ferroelectric film. That is, if the combination of the magnitude of the magnetic field applied to the film and the heat treatment conditions is optimal during the formation of the ferroelectric film, the remanent polarization of the film is maximized, and the magnitude of the electric field required to reverse the polarization is maximized. In contrast, if it is inappropriate, a ferroelectric film having desired characteristics cannot be obtained.

Therefore, the present invention has solved the above-mentioned problems.
It is a general object to provide a new and useful method for manufacturing a semiconductor device and a method for manufacturing a ferroelectric capacitor.
A more specific object of the present invention is to provide a method of manufacturing a ferroelectric capacitor in which the characteristics of a ferroelectric film are optimized in view of the above findings by the inventor of the present invention, and a semiconductor device having such a ferroelectric capacitor It is to provide a manufacturing method of.

[0015]

The present invention solves the above problems,
As described in claim 1, in a method of manufacturing a semiconductor device having a ferroelectric capacitor, a step of forming a lower electrode on a substrate; and a step of depositing a ferroelectric film on the lower electrode. Heat-treating the ferroelectric film by a single rapid heat-treating step in an oxidizing atmosphere, and crystallizing;
Forming an upper electrode on the ferroelectric film,
In the step of depositing the ferroelectric film, the strength of the magnetic field at the center of the target is reduced to about 270 Ga by sputtering.
The problem is solved by a method of manufacturing a semiconductor device, characterized in that the method is executed with the setting being at least uss.

In the method of manufacturing a semiconductor device according to the first aspect, as in the second aspect, the step of crystallizing the ferroelectric film includes reducing the intensity of the magnetic field to about 349 Gauss.
It is preferable to execute the above setting. According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device having a ferroelectric capacitor, comprising: forming a lower electrode on a substrate; Depositing a dielectric film, heat treating the ferroelectric film by a first rapid heat treatment step in an inert atmosphere, and a second rapid heat treatment step in an oxidizing atmosphere, and crystallizing the ferroelectric film; Forming an upper electrode on the ferroelectric film, the step of depositing the ferroelectric film is performed by setting the strength of the magnetic field at the center of the target to 100 Gauss or more and 349 Gauss or less by sputtering. And a method for manufacturing a semiconductor device.

In this case, in the method of manufacturing a semiconductor device according to the third aspect, it is preferable that the sputtering step is performed by setting the intensity of the magnetic field to 323 Gauss or less. Further, in the method of manufacturing a semiconductor device according to the third aspect, it is preferable that the sputtering step is performed with the intensity of the magnetic field set to 296 Gauss or less.

Furthermore, in the method of manufacturing a semiconductor device according to claim 3, it is preferable that the sputtering step is performed with the intensity of the magnetic field set to 270 Gauss or less. The present invention also provides a step of forming a lower electrode on a substrate, a step of depositing a ferroelectric film on the lower electrode, and a step of subjecting the ferroelectric film to a single rapid heat treatment in an oxidizing atmosphere. And a step of forming an upper electrode on the ferroelectric film, wherein the step of depositing the ferroelectric film comprises the step of reducing the intensity of a magnetic field at the center of the target by about 270 Gauss by sputtering.
A method for manufacturing a ferroelectric capacitor characterized by being set and executed as described above is provided.

In this case, it is preferable that the step of crystallizing the ferroelectric film is performed by setting the intensity of the magnetic field to about 349 Gauss or more. Furthermore, the present invention relates to claim 4
Forming a lower electrode on the substrate, depositing a ferroelectric film on the lower electrode, and forming the ferroelectric film in a first rapid atmosphere in an inert atmosphere. Depositing the ferroelectric film, including a heat treatment step, a heat treatment and a crystallization step by a second rapid heat treatment step in an oxidizing atmosphere, and a step of forming an upper electrode on the ferroelectric film. In the step, by sputtering, the intensity of the magnetic field at the center of the target is set to 100 Gauss or more,
The above-mentioned problem is solved by a method of manufacturing a ferroelectric capacitor, wherein the method is performed with the temperature set to 349 Gauss or less.

In the method of manufacturing a ferroelectric capacitor according to a fourth aspect of the present invention, it is preferable that the sputtering step is performed with the intensity of the magnetic field set to 323 Gauss or less. Further, in the method of manufacturing a ferroelectric capacitor according to claim 4, it is preferable that the sputtering step is performed with the intensity of the magnetic field set to 296 Gauss or less.

Further, in the method of manufacturing a ferroelectric capacitor according to claim 4, it is preferable that the sputtering step is performed with the intensity of the magnetic field set to 270 Gauss or less. According to the present invention, when depositing the ferroelectric film by sputtering, by optimizing the strength of the magnetic field applied to the sputter target, and according to the strength of the applied magnetic field, By optimizing the film crystallization process, the remanent polarization of the formed ferroelectric film can be maximized. In addition, in the ferroelectric film formed under such optimized conditions, the magnitude of the electric field required for reversing the polarization is reduced.
In a semiconductor device using such a ferroelectric film, it becomes possible to substantially reduce the write voltage.

[0022]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS [First Embodiment] FIG. 3 is a diagram showing a configuration of a sputtering apparatus 1 used in the present invention. Referring to FIG. 3, the sputtering apparatus 1 includes a deposition chamber 2 which is evacuated by an exhaust port 2A and into which a sputter gas is introduced by an introduction port 2B. A substrate holder 3 for holding a substrate 4 on which a film is deposited by sputtering, and a target holder 5 for holding a sputter target 6 so as to face the substrate 4; A terminal 7 extending to the outside of the chamber 2 is formed. Further, a magnet M for applying a magnetic field to the target 6 is formed near the target 6 in the deposition chamber 2.

In operation, the deposition chamber 2 is evacuated through the exhaust port 2A, a sputter gas such as Ar is introduced from the introduction port 2B, and high-frequency power is supplied to the terminal 7 through an appropriate impedance matching circuit. Is done. With the supply of the high-frequency power, a discharge occurs in the introduced sputtering gas in the deposition chamber 2, and the excited Ar atoms collide with the target 6, thereby depositing the target 6 on the substrate 4. The atoms that make up the desired film are knocked out. The atoms released from the target 6 reach the substrate 4 and cause the deposition of a desired film.

In the present invention, as will be described in detail later,
When a ferroelectric film is deposited by such a sputtering process, the state of discharge of the sputtering gas is optimized by the magnet M. FIGS. 4A and 4B show a manufacturing process of the ferroelectric capacitor 30 according to the first embodiment of the present invention.

Referring to FIG. 4A, an SiO ₂ film 32 having a thickness of, for example, 200 nm is formed on a Si substrate 31 by a thermal oxidation process. Medium, mounted on the substrate 4
On the O ₂ film 32, an adhesion film 33A made of Ti and a lower electrode film 33 made of Pt are further formed by DC sputtering at room temperature. More specifically, the Ti
As shown in Table 1 below, the adhesion film 33A
At a pressure of 0 mTorr, the lower electrode film 33 is formed to have a thickness of 20 nm, while the lower electrode film 33 is formed to have a thickness of 100 nm. The deposition of the Ti film 33A and the lower electrode film 33 is performed by setting the DC plasma power to 1 kW,
Run for 10 seconds and 20 seconds respectively.

[0026]

[Table 1]

Further, after the lower electrode film 33 is formed, as shown in Table 2, the PLZT film 34 is typically subjected to high-frequency sputtering performed at room temperature in an Ar atmosphere under a pressure of 10 mTorr, thereby performing the following. It is formed to a thickness of about 240 nm. Referring to Table 2, the high frequency sputtering was performed for about 10 minutes at a high frequency plasma power of 1.5 kW.

[0028]

[Table 2]

At this time, as will be described later, in this embodiment, the magnitude of the magnetic field applied to the formed PLZT film 34 is controlled to 500 Gauss or less. Next, the structure thus obtained is heat-treated, and the PLZT film 34 is crystallized, and at the same time, oxygen is supplied into the PLZT film 34. PLZ in such an oxidizing atmosphere
Due to the heat treatment of the T film 34, oxygen defects in the film 34 disappear. Further, an upper electrode film 35 of Pt is formed on the PLZT film 34 by DC sputtering at room temperature to a thickness of about 100 nm as shown in Table 3. Table 3
, The upper electrode film 35 is formed by setting the DC plasma power to about 0.3 kW in Ar plasma. In the example of Table 3, the partial pressure of Ar is 5 m.
Set to Torr, sputtering continues for about 200 seconds.

[0030]

[Table 3]

Further, in the step of FIG. 4B, a desired ferroelectric capacitor 30 is formed by performing plasma etching on the upper electrode film 35 and the PLZT film 34 under the conditions shown in Table 4, respectively. You.

[0032]

[Table 4]

In such a ferroelectric capacitor 30,
When the inventor of the present invention forms the PLZT film 34 by sputtering in the sputtering apparatus of FIG.
It has been found that the magnetic field applied to the target substantially affects the characteristics of the PLZT film 34 obtained as a result of sputtering, in particular, the value of the remanent polarization 2Pr and the magnitude of the electric field required to reverse the polarization of the film. Was. Furthermore, the inventor of the present invention has found that the value of the magnetic field for optimizing the characteristics of the PLZT film 34 changes by the heat treatment applied to the PLZT film 34.

Table 5 shows that when the PLZT film 34 is deposited by sputtering, the magnetic field strength at the center of the target is set to 349 Gauss and 270 Gauss, and the obtained PLZT film 34 is further placed in an oxidizing atmosphere.
The value of remanent polarization 2Pr, 2P when heat-treated at about 750 ° C. for 60 seconds by a rapid heat treatment process (RTA).
Voltage value V (90), + 5V that saturates the value of r by 90%
And the value of the leakage current when a voltage of -5 V is applied,
The composition of the PLZT film 34 is Pb _x (Zr, Ti, L
a) The value of the ratio x of Pb in the film 34 immediately after the deposition, expressed as O _3, and the Pb after the PLZT film 34 was subjected to a rapid heat treatment at 750 ° C. in an oxidizing atmosphere.
Of the (111) plane orientation in the PLZT film 34, obtained by X-ray diffraction.
The ratio of LZT crystal is shown. However, the ratio x of Pb is I
CP method (inductively coupled plasma spectroscopy)
It was obtained by:

[0035]

[Table 5] Referring to Table 5, when the magnitude of the magnetic field at the time of the sputtering is set to 349 Gauss, compared to the case where the magnitude of the magnetic field is set to 270 Gauss,
It can be seen that the value of the remanent polarization 2Pr is about twice as large, the value of V (90) is reduced to 70% or less, and the value of the leak current is reduced by two digits. Although the reason for this is not fully understood, the PLZT film 3 accompanying the heat treatment in an oxidizing atmosphere is not described.
4, the amount of Pb released from the film 34 was 349 G
270Ga when performed under the magnetic field of auss
This is considered to be related to the fact that it is smaller than the case where it is performed under the magnetic field of uss, and that the proportion of the PLZT crystal having the (111) plane orientation in the PLZT film 34 is increasing.

Table 5 shows the relationship between the PL immediately after the deposition.
This indicates that the composition of the ZT film 34 greatly changes depending on the magnitude of the magnetic field applied to the target during the sputtering process. In particular, as the magnitude of the magnetic field decreases, the composition is taken into the deposited PLZT film 34. It shows a tendency that the amount of Pb decreases. The Pb atoms incorporated in the film 34 are converted into PbO in the PLZT film 34,
4 is considered to form a crystal nucleus of a crystal grain having a (111) orientation.
In the deposition step of the film 34, 270 Ga
usS and 349 Gauss, approximately 300 Ga
uss or more, more preferably about 349 Gauss
It is concluded that it is desirable to apply the above magnetic field.
Here, the rapid heat treatment step in the oxidizing atmosphere includes the following steps.
It can be performed at a temperature in the range of 00 to 900 ° C.
The composition of the PLZT film 34 is controlled to a desired composition by adjusting the composition of the target in consideration of the amount of Pb released.

On the other hand, Table 6 shows that the PLZT film 34
When depositing by sputtering, the intensity of the magnetic field at the center of the target was set to 349 Gau as in the case of Table 5.
ss and 270 Gauss, the resulting PLZ
When the T film 34 is first heat-treated in an Ar atmosphere at about 625 ° C. for about 10 seconds and then in an oxidizing atmosphere at about 750 ° C. for 60 seconds, the value of the residual polarization 2Pr and the value of the 2Pr are saturated by 90%. Voltage values V (90), + 5V and-
The value of the leakage current when a voltage of 5 V is applied,
When the composition of the ZT film 34 is expressed as Pb _x (Zr, Ti, La) O ₃ , Pb in the film 34 immediately after the deposition
Of the PLZT film 34 in an Ar atmosphere at 6
The amount of decrease in the ratio x of Pb after rapid heat treatment at 25 ° C., and the amount of decrease in the ratio x of Pb after rapid heat treatment at 750 ° C. in an oxidizing atmosphere. The calculated PLZT film 34
The ratio of the PLZT crystal having the (111) plane orientation in the inside is shown.

[0038]

[Table 6] As shown in Table 6, when the heat treatment of the PLZT film 34 is sequentially performed in the Ar atmosphere and the oxidizing atmosphere, the magnitude of the magnetic field at the center of the target during the sputtering is set to 270 Gauss. In this case, a better result can be obtained than when 349 Gauss is set. More specifically, the magnitude of the magnetic field is set to 270
By setting to Gauss, the absolute value of the remanent polarization 2Pr increases to 34.3 μC / cm ² , and V (90)
Can be seen to decrease to about 3.9 V, and the value of the leakage current further decreases to about 10 ^-6 to 10 ^-7 A / cm ² . Although the reason for this has not been fully elucidated, the amount of Pb released from the PLZT film 34 due to the heat treatment in an Ar atmosphere is more likely to be 349 Gauss when the film 34 is deposited under a magnetic field of 270 Gauss. And that the PZT film has a (111) plane orientation in the PLZT film 34.
This is considered to be related to the fact that the ratio of LZT crystals was extremely increased to 96.4%.

FIGS. 5A and 5B are diagrams corresponding to FIGS.
In the manufacturing process of the ferroelectric capacitor 30 shown in FIG.
The intensity of the magnetic field when depositing the PLZT film 34 by sputtering is set to 270 Ga at the center of the target.
uss, 296 Gauss, 323 Gauss and 3
The heat treatment of the PLZT film 34 was first performed in an Ar atmosphere at 62 Gauss.
The value of the remanent polarization 2Pr of the film 34 and the V (90) of the ferroelectric capacitor 30 using the PLZT film 34 when the film is formed at 5 ° C. for 10 seconds and then at 750 ° C. for 60 seconds in an oxidizing atmosphere. Are shown respectively.

As can be seen from FIG. 5A, the PLZT film
The value of the remanent polarization 2Pr at the time of forming the film 34 is indicated by the mark.
Approximately 10 μC /
cm ^TwoFrom about 35μC / cm^TwoGreatly change. As well
In addition, as can be seen from FIG.
The V (90) value of the capacitor 30 is also about 300 Gauss.
The value suddenly decreases from about 6 V to about 4 V at the value of the applied magnetic field.

From the results of FIGS. 5A and 5B, in the manufacturing process of the ferroelectric capacitor 30, the PLZT
When the heat treatment of the film 34 is performed twice in total in an Ar atmosphere and an oxidizing atmosphere, the PLZT film 3
It is concluded that it is desirable to set the value of the applied magnetic field at the time of deposition to 350 Gauss or less, preferably 325 Gauss or less, more preferably 300 Gauss or less at the center of the target. The heat treatment in the Ar atmosphere and the heat treatment in the oxidizing atmosphere can be performed at a temperature of 400 to 900 ° C.

On the other hand, the PLZT
When a ferroelectric film such as a film is deposited on the substrate 4, the magnitude of the magnetic field applied to the target 6 is desirably maintained at 100 Gauss or more in order to sufficiently reduce the plasma. When a ferroelectric film is deposited by the sputtering apparatus shown in FIG. 3, it is desirable that the magnitude of the magnetic field applied to the target 6 be kept at about 500 Gauss or less for reasons of deposition rate control and film orientation.

In this embodiment, the lower electrode 33 and the upper electrode 35 are not limited to Pt.
IrO ₂ or a composite film thereof may be used. Further, the ferroelectric film 24 is not limited to PZT or PLZT, but may be made of BaTiO ₃ , SrTiO ₃ ,
LiNbO ₃ or a solid solution thereof may be used.

[Second Embodiment] FIGS. 6A to 8I are views showing a manufacturing process of an FeRAM according to a second embodiment of the present invention. Referring to FIG. 6A, a p-type Si substrate 51 is formed.
A memory cell region is formed thereon by a field oxide film 52. Further, a gate insulating film 53 is formed on the Si substrate 51 so as to cover the memory cell region, and a gate electrode 54 is formed on the gate insulating film 53 by a normal MO.
It is formed similarly to the S transistor. Gate electrode 54 forms a part of a word line crossing the memory cell region.
Further, in the substrate 51, n-type diffusion regions 55 and 56 are formed on both sides of the gate electrode 54 using the gate electrode 54 as a self-alignment mask.

After the MOS transistor is formed in this manner, an SiO ₂ film 57 is formed on the substrate 51 so as to cover the gate electrode 54, and the SiO ₂ film 57 is formed in the SiO ₂ film 57 by a well-known photolithography method. Then, a contact hole exposing the diffusion region 55 is formed. Further, after the formation of the contact hole, a WSi film is deposited on the SiO ₂ film 57 so as to include the contact hole. As a result, the WSi film contacts the diffusion region 55 in the contact hole. By patterning this WSi film, a bit line electrode 58 shown in FIG. 6A is formed.

Next, in the step of FIG. 6B, an interlayer insulating film 59 typically made of SiO ₂ is deposited on the structure of FIG. 6A, for example, by using a CMP (chemical mechanical polishing) method. After the planarization, the diffusion region 56 is formed in the interlayer insulating film 59.
Is formed by high-resolution photolithography. Next, FIG.
In the step, P ^{+ is} added to the structure of FIG.
A polysilicon film 61 doped with a mold is deposited by a CVD method so that the polysilicon Si film 61 fills the contact hole 60. Further, in the step of FIG. By etching back until the surface of the interlayer insulating film 59 is exposed by etching, a structure in which the contact holes are filled with the polysilicon plugs 62 is obtained.

In the step of FIG. 7D, a Ti film (not shown) is further formed on the interlayer insulating film 59 so as to cover the polysilicon plug 62, and Pt,
The conductor film 63 containing Ir or IrO ₂ is formed by sputtering, for example, under the conditions shown in Table 1. In the present embodiment, in the step of FIG.
But typically at 650 ° C. in an Ar atmosphere
Rapid heat treatment for 1 to 60 seconds.
Ti diffuses from the i-adhesion film into the conductor film 63, and TiO _{x serving as a} growth nucleus is formed on the surface of the conductor film 63.

Next, in the step of FIG.
Ferroelectric film 64 made of PZT or PLZT on top
Are formed by sputtering under the conditions shown in Table 2 so that the intensity of the magnetic field at the center of the target is set to 270 Gauss or more, preferably 349 Gauss or more. The deposited ferroelectric film 64 is oxidized at about 7
Oxygen defects which are crystallized by rapid heating at 50 ° C. and easily formed in the ferroelectric film 64 are eliminated.

Alternatively, in the step of FIG. 7E, the sputtering of the ferroelectric film 64 is performed by setting the magnetic field intensity at the center of the target to 349 Gauss or less, preferably 3 Gauss.
23 Gauss or less, more preferably 296 Gauss
Hereinafter, it may be set and executed most preferably to be 270 Gauss or less. In this case, the heat treatment of the ferroelectric film 64 is first performed at 625 ° C. in an Ar atmosphere.
For about 10 seconds, followed by about 6 seconds at 750 ° C. in an oxidizing atmosphere.
Run for 0 seconds.

Next, in the step of FIG.
The ZT film 64 and the conductor film 63 thereunder are patterned into a desired pattern by performing plasma etching under the conditions shown in Table 4, so that the lower electrode 65 and the capacitor insulating film 66 constituting the ferroelectric capacitor are formed. It is formed. Next, in the step of FIG. 8 (G), SiO 2 is formed on the structure of FIG.
₂ film 67 is deposited by a CVD method,
A contact hole 68 exposing the capacitor insulating film 66 is formed in the _second film 67. Further, in the step of FIG. 8H, a Pt pattern 69 is formed so as to cover the capacitor insulating film 66 exposed on the SiO ₂ film 67 as shown in Table 3.
8 is formed as an upper electrode of a ferroelectric capacitor by performing sputtering under the conditions shown in FIG.
In the step (I), an interlayer insulating film 70 is formed on the SiO ₂ film 67 so as to cover the upper electrode 69.
A wiring pattern 71 is formed on the interlayer insulating film 70.

In the semiconductor device manufactured as described above, the magnitude of the magnetic field applied to the target when the ferroelectric film 66 is deposited by sputtering is optimized in combination with the heat treatment that the film 66 undergoes after the deposition. Therefore, the value of the remanent polarization 2Pr in the ferroelectric film 66 is maximized, and at the same time, the voltage V (90) required for writing to the capacitor is minimized.

Although the present invention has been described with reference to the preferred embodiments, the present invention is not limited to such specific embodiments, and various modifications and changes may be made within the scope of the appended claims. is there.

[0053]

According to the present invention, when the ferroelectric film is deposited by sputtering, the strength of the magnetic field applied to the sputter target is optimized, and the strength of the applied magnetic field is reduced. By optimizing the crystallization process of the ferroelectric film accordingly, the remanent polarization of the formed ferroelectric film can be maximized. In addition, in the ferroelectric film formed under such optimized conditions, the magnitude of the electric field required for reversing the polarization is reduced, and accordingly, a semiconductor device using such a ferroelectric film is used. In this case, the writing voltage can be substantially reduced.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a conventional semiconductor memory device having a ferroelectric capacitor.

FIG. 2 is a diagram showing spontaneous polarization characteristics of a ferroelectric film used in the ferroelectric capacitor of FIG.

FIG. 3 is a diagram showing a configuration of a sputtering apparatus used for depositing a ferroelectric film in the present invention.

FIGS. 4A and 4B are diagrams showing a manufacturing process of the ferroelectric capacitor according to the first embodiment of the present invention.

FIGS. 5A and 5B show the characteristics of a ferroelectric film sputtered in various magnetic fields after a rapid heat treatment step in an Ar atmosphere and a rapid heat treatment step in an oxidizing atmosphere; It is a figure showing the result of examination.

FIGS. 6A to 6C are diagrams illustrating a manufacturing process of a ferroelectric memory device according to a second embodiment of the present invention (part 1).

FIGS. 7 (D) to 7 (F) are views (No. 2) showing the steps of manufacturing the ferroelectric memory device according to the second embodiment of the present invention.

FIGS. 8G to 8I are diagrams (No. 3) showing the steps of manufacturing the ferroelectric memory device according to the second embodiment of the present invention.

[Explanation of symbols]

Reference Signs List 1 sputtering apparatus 2 deposition chamber 2A exhaust port 2B introduction port 3 substrate holder 4 substrate 5 target holder 6 target 7 high-frequency power terminal 11, 31, 51 substrate 30 ferroelectric capacitor 32 SiO ₂ film 33A Ti adhesion film 33 lower electrode film 34 ferroelectric film 35 upper electrode film 52 field oxide film 53 gate insulating film 54 gate electrode 55, 56 diffusion region 57 CVD insulating film 58 bit line electrode 59, 70 interlayer insulating film 60 contact hole 61 polysilicon film 62 polysilicon plug 63 Pt / Ti film 64 PLZT film 65 Lower electrode 66 Ferroelectric film 67 Insulating film 68 Contact hole 69 Upper electrode 71 Wiring pattern

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification code FI Theme coat ゛ (Reference) H01L 21/203 H01L 21/203 S 5G303 21/316 21/316 Y 27/04 27/04 C 21/822 27/10 621Z 27/108 651 21/8242 29/78 371 21/8247 29/788 29/792 F term (reference) 5F001 AA17 AD12 AD62 AG01 AG30 5F038 AC05 AC09 AC15 DF05 EZ14 EZ17 5F058 BA11 BC01 BC03 BF11 BF12 BH01 BH02 BH03 5F083 AD21 FR01 FR02 GA05 JA13 JA15 JA35 JA38 JA39 JA43 MA06 MA17 PR22 PR33 PR34 5F103 AA08 BB14 BB22 DD27 GG02 HH03 LL14 PP03 5G303 AA10 AB20 BA03 CA01 CB15 CB25 CB35 CB39 DA01

Claims (4)

[Claims] 1. A method for manufacturing a semiconductor device having a ferroelectric capacitor, comprising: forming a lower electrode on a substrate; depositing a ferroelectric film on the lower electrode; Heat-treating the film by a single rapid heat-treating step in an oxidizing atmosphere, crystallizing; and forming an upper electrode on the ferroelectric film, and depositing the ferroelectric film, The strength of the magnetic field at the center of the target is reduced to about 270 Ga by sputtering.
A method for manufacturing a semiconductor device, wherein the method is performed by setting the value to at least uss. 2. The method according to claim 1, wherein the step of crystallizing the ferroelectric film is performed by setting the intensity of the magnetic field to about 349 Gauss or more. 3. A method for manufacturing a semiconductor device having a ferroelectric capacitor, comprising: forming a lower electrode on a substrate; depositing a ferroelectric film on the lower electrode; Heat-treating and crystallizing the film by a first rapid heat treatment step in an inert atmosphere and a second rapid heat treatment step in an oxidizing atmosphere; and forming an upper electrode on the ferroelectric film. Wherein the step of depositing the ferroelectric film comprises:
A method for manufacturing a semiconductor device, wherein the method is performed by setting the value to at least uss and at most 349 Gauss. 4. A step of forming a lower electrode on a substrate; a step of depositing a ferroelectric film on the lower electrode; and a first rapid heat treatment step of subjecting the ferroelectric film to an oxidizing atmosphere. Heat treating and crystallizing by a second rapid heat treatment step in an inert atmosphere; and forming an upper electrode on the ferroelectric film, and depositing the ferroelectric film. Is to reduce the intensity of the magnetic field at the center of the target by sputtering to 100 Ga
A method for manufacturing a ferroelectric capacitor, wherein the method is performed by setting the value to at least uss and at most 349 Gauss.