JP2000331970A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To manufacture a high-performance, reliable semiconductor device by forming a film or a layer and then polishing the film or layer at an unwanted region by the CMP method, and removing the surface machined deformed layer on the film or the layer by the sputter etching method. SOLUTION: An insulating film or an insulation layer 8 is formed on a semiconductor substrate 1. Then, the insulation layer 8 at an unwanted region is polished by the CMP method for removal. After that, cleaning is done, after the CMP method was used. In this case, a surface machining deterioration film 8a with a contamination film that is a contamination film and the roughness of a surface roughness state (a state with recessed and projecting surfaces) is formed on the surface of the insulation layer 8, that is made of, for example, a silicon oxide film by the process for polishing the insulation layer 8 at the unwanted region by using the CMP method. Then, a process for removing the surface machining deterioration film 8a of the insulation film 8 is made by the sputter etching method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device by using a CMP (chemical mech
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device manufacturing method capable of manufacturing a high-performance and high-reliability semiconductor device by removing a surface-processed deteriorated film after a polishing step using a hanical polishing (chemical mechanical polishing) method.

[0002]

2. Description of the Related Art The present inventors have studied a CMP processing technique used in a method of manufacturing a semiconductor device. The following is a technique studied by the present inventors, and the outline is as follows.

That is, LSI (Large Scale Integrat)
As a method of manufacturing a semiconductor device such as an ed circuit, a process of polishing an insulating film or the like by using a CMP method is performed.

In this case, as a manufacturing process of a semiconductor device using the CMP method, an insulating film made of a silicon oxide film or the like is deposited on a semiconductor substrate, and then the CMP method is used.
2. Description of the Related Art A step of polishing an insulating film in an unnecessary region to form a flattened insulating film pattern is performed. Note that in this specification, a film such as an insulating film may be referred to as a layer such as an insulating layer, and a layer such as an insulating layer may be referred to as a film such as an insulating film.

In a semiconductor device manufacturing process using the CMP method, a wiring layer in a wiring structure of the semiconductor device is deposited, and an unnecessary region of the wiring layer is polished and planarized using the CMP method. And forming a wiring layer pattern.

As a document describing a CMP processing technology and a CMP apparatus, for example, “Electronic Materials May 1996” issued by the Industrial Research Council on May 1, 1996.
There are those described on pages 28 to 32.

[0007]

However, the above-mentioned C
In the manufacturing process of a semiconductor device using the MP method, an insulating film is caused by a surface-processed deteriorated film formed by CMP, causing a decrease in adhesion at an interface with a wiring layer, and a peeling phenomenon at the interface. However, there is a problem that reliability is reduced.

In the process of manufacturing a semiconductor device using the above-mentioned CMP method, the roughness of the insulating film (surface roughness) is significantly increased by CMP and post-CMP cleaning. The present inventors have clarified that a problem that a contamination film (surface contamination layer) is formed has occurred.

An object of the present invention is to provide a semiconductor device capable of manufacturing a high-performance and highly-reliable semiconductor device by removing a surface-processed deteriorated film after a step of polishing an insulating film or the like by using a CMP method. It is to provide a manufacturing method.

The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings.

[0011]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

That is, according to the method of manufacturing a semiconductor device of the present invention, after a film or a layer is formed,
After the step of polishing the film or the layer in the unnecessary region, the method further includes a step of removing the surface-processed film of the film or the layer by using a sputter etching method.

[0013]

Embodiments of the present invention will be described below in detail with reference to the drawings. In all the drawings for describing the embodiments, components having the same function are denoted by the same reference numerals, and redundant description will be omitted.

FIGS. 1 to 12 are schematic sectional views showing steps of manufacturing a semiconductor device according to an embodiment of the present invention. The feature of the method for manufacturing a semiconductor device of this embodiment is that, after forming a film or a layer, using a CMP method, and polishing a film or a layer in an unnecessary region using a sputter etching method. And a step of removing a surface-processed film of a film or a layer. Various other embodiments can be applied to other aspects of the semiconductor device and the method of manufacturing the semiconductor device. The method for manufacturing the semiconductor device of the present embodiment will be specifically described with reference to FIG.

First, as shown in FIG. 1, a p-type semiconductor substrate (substrate) 1 made of, for example, single crystal silicon is prepared.
Various techniques, such as the prior art, are used to form MOSFETs.

That is, a semiconductor substrate 1 made of, for example, p-type single crystal silicon is prepared, and an isolation insulating film 2 made of a silicon oxide film or the like is formed in a selective region on the surface of the semiconductor substrate 1.

Next, after a gate insulating film 3 made of, for example, a silicon oxide film or the like is formed on the surface of the semiconductor substrate 1, a polycrystal containing, for example, phosphorus (P) as an impurity as a gate electrode 4 thereon is formed. After a silicon film is deposited and an insulating film 5 made of, for example, a silicon oxide film is formed thereon, a pattern of the insulating film 5, the gate electrode 4, and the gate insulating film 3 is formed by using a lithography technique and a selective etching technique. To form

After that, the CVD (Ch
After a silicon oxide film is formed by using an emical vapor deposition method, a sidewall spacer 6 is formed on the side wall of the gate electrode 4 by using a lithography technique and a selective etching technique.

Thereafter, an n-type impurity such as phosphorus is ion-implanted (ion-implanted) into the semiconductor substrate 1 by ion implantation using the gate region including the gate electrode 4 as a mask, and then subjected to a thermal diffusion process. Go to MO
An n-type semiconductor region 7 serving as a source and a drain of the SFET is formed.

Next, a manufacturing process which is a feature of the method of manufacturing a semiconductor device according to the present embodiment will be described with reference to FIGS.

First, an operation of forming an insulating film (film or layer) 8 on the semiconductor substrate 1 is performed (FIG. 2).

In this case, the insulating film 8 is made of silicon oxide (S
An iO ₂ ) film is formed on the semiconductor substrate 1 by using a CVD method or a sputtering method with a large thickness.

Thereafter, the insulating film 8 in the unnecessary area is polished by using the CMP method to remove the insulating film 8 in the unnecessary area. Next, a post-CMP cleaning step is performed (FIG. 3). In addition, according to the design specification, a mode in which post-CMP cleaning is not performed can be adopted.

In this case, as shown in FIG. 3, the surface of the insulating film 8 made of, for example, a silicon oxide film is removed by polishing the insulating film 8 in an unnecessary region by using a CMP method.
Surface-processed deteriorated film 8a having a contamination film as a contamination film and a roughness in a surface roughness state (a state having an uneven surface).
Is formed.

Next, using the sputter etching method,
A step of removing the surface processing deteriorated film 8a of the insulating film 8 is performed (FIG. 4).

In this case, as a result of the study of the present inventors, the sputter etching method is a sputter etching method using a gas containing argon (Ar) or helium (He). Further, as another mode of the sputter etching method, a sputter etching method using a gas including an inert gas or a rare gas can be applied.

Further, the step of removing the surface processed deteriorated film 8a of the insulating film 8 is a step of etching 15 to 20 nm.

Next, through holes (connection holes) are formed in the insulating film 8 by using a lithography technique and a selective etching technique.
9 is performed (FIG. 5).

Next, an operation of forming a conductive layer (film or layer) 10 for forming a plug on the semiconductor substrate 1 is performed (FIG. 6).

In this case, the conductive layer 10 is, for example, a tungsten (W) layer.
A step of forming a film having a large film thickness by using a sputtering method or a sputtering method is performed.

Thereafter, the conductive layer 10 in the unnecessary area is polished by using the CMP method to remove the conductive layer 10 in the unnecessary area. Next, a post-CMP cleaning step is performed (FIG. 7). In addition, according to the design specification, a mode in which post-CMP cleaning is not performed can be adopted.

In this case, as shown in FIG. 7, the surface of the conductive layer 10 made of, for example, a tungsten layer is polished by a step of polishing the conductive layer 10 in an unnecessary region using a CMP method. The surface-processed deteriorated film 10a having the film and the roughness in the surface roughness state is formed.

Next, using a sputter etching method,
A step of removing the surface processed deteriorated film 10a of the conductive layer 10 is performed, and an operation of forming a plug made of the conductive layer 10 embedded in the through hole 9 is performed (FIG. 8).

In this case, as a result of the study of the present inventors, the sputter etching method is a sputter etching method using a gas containing argon or helium.
Further, as another mode of the sputter etching method, a sputter etching method using a gas including an inert gas or a rare gas can be applied.

Further, the surface-processed deteriorated film 10 of the conductive layer 10 is formed.
The step of removing a is a step of etching 15 to 20 nm.

Next, an operation of forming a wiring layer (film or layer) 11 on the semiconductor substrate 1 is performed (FIG. 9).

In this case, the wiring layer 11 is, for example, an aluminum (Al) layer, and a CV
A process of forming a film having a large thickness is performed by using the D method or the sputtering method.

Thereafter, the wiring layer 11 in the unnecessary area is polished by using the CMP method to remove the wiring layer 11 in the unnecessary area. Next, a post-CMP cleaning step is performed (FIG. 10). In addition, according to the design specification, a mode in which post-CMP cleaning is not performed can be adopted.

In this case, as shown in FIG. 10, the surface of the wiring layer 11 made of, for example, an aluminum layer is removed by polishing the wiring layer 11 in an unnecessary region by using the CMP method. The surface-processed deteriorated film 11a having the film and the roughness in the surface roughness state is formed.

Next, using the sputter etching method,
A step of removing the surface processed deteriorated film 11a of the wiring layer 11 is performed (FIG. 11).

In this case, as a result of a study by the present inventors, the sputter etching method is a sputter etching method using a gas containing argon or helium.
Further, as another mode of the sputter etching method, a sputter etching method using a gas including an inert gas or a rare gas can be applied.

Further, the surface-processed deteriorated film 11 of the wiring layer 11
The step of removing a is a step of etching 15 to 20 nm.

Thereafter, a step of forming a pattern of the wiring layer 11 is performed using a lithography technique and a selective etching technique (FIG. 12).

Next, a multilayer wiring layer is formed as necessary by repeatedly using the above-described manufacturing steps (the manufacturing steps described with reference to FIGS. 2 to 12), and a passivation film is formed. The manufacturing process of the semiconductor device according to the embodiment is ended.

According to the above-described method for manufacturing a semiconductor device of the present embodiment, the surface of the insulating film 8 made of, for example, a silicon oxide film is formed by polishing the insulating film 8 in an unnecessary region by using the CMP method. In addition, a contaminated film as a contaminant film and a surface-processed deteriorated film 8a having a roughness in a surface roughness state (a state having an uneven surface) are formed. Surface modified film 8
a, the insulating film 8 is removed.
Can prevent the separation phenomenon at the interface of the semiconductor device and improve the adhesion between the insulating films, so that the plug and the wiring layer can be installed well, and a high-performance and high-reliability semiconductor device can be manufactured with a high manufacturing yield. .

According to the method of manufacturing a semiconductor device of the present embodiment, the conductive layer (conductive layer for forming a plug) 10 in an unnecessary region is polished by CMP, for example, to form a tungsten layer. Formed on the surface of the conductive layer 10 made of a contaminant film and a roughness in a surface roughness state, the surface processing of the conductive layer 10 is performed using a sputter etching method. By performing the step of removing the deteriorated film 10a, the conductive layer 1 as a plug remaining on the surface of the insulating film 8 is formed.
Since 0 can be eliminated and the electrical connection with the wiring layer can be improved, a semiconductor device with high performance and high reliability can be manufactured with a high manufacturing yield.

According to the method of manufacturing a semiconductor device of this embodiment, the surface of the wiring layer 11 made of, for example, an aluminum layer is contaminated by the step of polishing the wiring layer 11 in an unnecessary region by using the CMP method. Since the surface modified film 11a having the contamination film and the roughness of the surface roughness state is formed, a step of removing the surface modified film 11a of the wiring layer 11 using a sputter etching method is performed. Thereby, the peeling phenomenon at the interface of the wiring layer 11 can be prevented, and the electrical connection with the conductive layer 10 as a plug can be improved, so that a semiconductor device with high performance and high reliability can be manufactured with high manufacturing yield. be able to.

Although the invention made by the inventor has been specifically described based on the embodiments of the present invention, the present invention is not limited to the above embodiments, and various modifications may be made without departing from the gist of the invention. Needless to say, it can be changed.

For example, in the method of manufacturing a semiconductor device of the present invention, copper (C)
A metal layer for wiring such as a u) layer and a gold (Au) layer can be applied.

In the method of manufacturing a semiconductor device according to the present invention, the substrate may be an SOI (Silico) substrate other than the semiconductor substrate.
n on Insulator) A substrate such as a substrate can be used.

The present invention also relates to a MOSFET, a CMOS,
A method for manufacturing a semiconductor integrated circuit device in which various semiconductor elements such as an FET and a bipolar transistor are combined can be provided.

Further, the present invention relates to a MOSFET, a CMO
Logic system or DR with SFET etc. as components
AM (Dynamic Random Access Memory), SRAM (St
The present invention can be applied to a method of manufacturing various semiconductor integrated circuit devices having a memory system such as an aticRandom Access Memory).

[0053]

Advantageous effects obtained by typical ones of the inventions disclosed in the present application will be briefly described.
It is as follows.

(1). According to the method of manufacturing a semiconductor device of the present invention, the step of polishing the insulating film (film or layer) in an unnecessary region by using the CMP method allows the contamination film to be formed on the surface of the insulating film made of, for example, a silicon oxide film. A deteriorated surface processing film having a contaminated film and a roughness in a surface roughness state (a state having an uneven surface) is formed, and the deteriorated surface processing film of the insulating film is removed by using a sputter etching method. By performing the process, the peeling phenomenon at the interface between the insulating films can be prevented, and the adhesion between the insulating films can be improved, so that the plug and the wiring layer can be installed well, and a high-performance and high-reliability semiconductor device. Can be manufactured with a high manufacturing yield.

(2). According to the method for manufacturing a semiconductor device of the present invention, a step of polishing a conductive layer (a conductive layer, a film, or a layer for forming a plug) in an unnecessary region by using a CMP method, for example, comprises a tungsten layer. On the surface of the conductive layer, a contaminated film that is a contaminant film and a surface processed deteriorated film having a roughness in a surface roughness state are formed. By doing so, the conductive layer as a plug remaining on the surface of the insulating film can be removed, and the electrical connection with the wiring layer can be improved, so that a semiconductor device with high performance and high reliability can be realized. It can be manufactured with a high manufacturing yield.

(3). According to the method of manufacturing a semiconductor device of the present invention, a step of polishing a wiring layer (film or layer) in an unnecessary area by using a CMP method is performed to remove a contaminant film on a surface of a wiring layer made of, for example, an aluminum layer. Since a surface-processed deteriorated film having a certain contamination film and a roughness of a surface roughness state is formed, the step of removing the surface processed deteriorated film of the wiring layer by using a sputter etching method is performed. Separation phenomenon at the interface of
In addition, since the electrical connection with the conductive layer as a plug can be improved, a semiconductor device with high performance and high reliability can be manufactured with a high manufacturing yield.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing a manufacturing process of a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a schematic cross-sectional view showing a manufacturing process of the semiconductor device according to one embodiment of the present invention;

FIG. 3 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 4 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 5 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 6 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 7 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 8 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 9 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 10 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 11 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

FIG. 12 is a schematic cross-sectional view showing a manufacturing step of the semiconductor device according to one embodiment of the present invention;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Semiconductor substrate (substrate) 2 Element isolation insulating film 3 Gate insulating film 4 Gate electrode 5 Insulating film 6 Sidewall spacer 7 Semiconductor region 8 Insulating film (film or layer) 8a Surface altered film 9 Through hole 10 Conductive layer (Film) Or layer) 10a surface-processed deteriorated film 11 wiring layer (film or layer) 11a surface-processed deteriorated film

Continued on the front page (72) Inventor Yoji Ashihara 3F, 6-16 Shinmachi, Ome-shi, Tokyo F-term in the Device Development Center, Hitachi, Ltd. 5F004 AA14 BD07 DA22 DA23 DB03 DB09 DB10 DB16 EB02 EB03 FA08 5F033 GG03 HH08 HH11 HH13 JJ19 KK01 PP06 PP15 QQ08 QQ09 QQ14 QQ37 QQ48 RR04 SS08 SS11 XX01 XX09 XX12 XX13 5F040 DA15 DB01 DC01 EC07 EH02 EH05 EJ03 FA05 FA16 FC10

Claims (8)

[Claims] After forming a film or a layer, after polishing the film or the layer in an unnecessary area using a CMP method, the film or the layer is removed using a sputter etching method. A method for manufacturing a semiconductor device, comprising a step of removing a surface-processed deteriorated film. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the step of removing the surface-processed deteriorated film is performed by a CMP method.
A method for manufacturing a semiconductor device, wherein the method is performed after a post-cleaning step. 3. The method for manufacturing a semiconductor device according to claim 1, wherein said film is an insulating film. 4. The method for manufacturing a semiconductor device according to claim 1, wherein said layer is a conductive layer for forming a plug. 5. The method for manufacturing a semiconductor device according to claim 1, wherein said layer is a wiring layer. 6. The method for manufacturing a semiconductor device according to claim 1, wherein said sputter etching method is a sputter etching method using a gas comprising argon or helium. Manufacturing method. 7. The method of manufacturing a semiconductor device according to claim 1, wherein the sputter etching method is a sputter etching method using a gas including an inert gas or a rare gas. Semiconductor device manufacturing method. 8. The method for manufacturing a semiconductor device according to claim 1, wherein the step of removing the film or a surface-processed deteriorated film of the layer is a step of etching 15 to 20 nm. A method for manufacturing a semiconductor device, comprising: