JP2000323729A - Variable capacity circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a variable capacity circuit which is free of deterioration in phase noise characteristic and has good response even when mounted on a semiconductor integrated circuit. SOLUTION: A mechanism which injects many carriers of a heavily doped diffusion region 31 of a 1st conductivity type in a lightly doped diffusion region 9 of a 2nd conductivity type of a 1st electrode as a small number of carriers of the lightly doped diffusion area 9 instead of the generation of a small number of carriers slow in response rate is actualized by the heavily doped diffusion area 31 to make the variable capacity circuit fast, thereby preventing phase noise characteristics from becoming worse.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable capacitance circuit mounted on a semiconductor integrated circuit.

[0002]

2. Description of the Related Art A variable capacitance circuit is connected to a crystal oscillation circuit,
A circuit having a variable oscillation frequency is referred to as a voltage-controlled crystal oscillation circuit.

A device equipped with such a voltage-controlled crystal oscillation circuit and using a temperature compensation signal for canceling the temperature characteristic of the crystal resonator as a control voltage for a variable capacitance circuit is a temperature compensation type crystal of an indirect compensation system. Called an oscillator.

A device using an external input voltage as a control voltage for a variable capacitance circuit is called a voltage-controlled crystal oscillator.

[0005] A variable capacitance circuit for such an application is configured using at least one variable capacitance element, and FIG. 4 shows an example of a conventional configuration.

As shown in FIG. 4, a fixed capacitor 1 for blocking a DC signal and a variable capacitor 3 are connected in series, and the other terminal of the variable capacitor 3 is connected to an arbitrary potential such as a power supply.

Then, an input resistor 5 is connected to a connection point between the fixed capacitance 1 and the variable capacitance 3. The control signal for the variable capacitor 3 is applied via the input resistor 5.

The input resistor 5 serves to cut off the AC signal. If the output impedance of the circuit for generating the control signal is sufficiently high, the input resistor 5 may be omitted.

The connection destination of the variable capacitor 3 may be the other terminal of the fixed capacitor having one terminal connected to a power supply.

By the way, there has been a remarkable progress in miniaturization and weight reduction of portable communication devices such as portable telephones in recent years.
Demands for miniaturization and weight reduction of components mounted thereon have become extremely large. Temperature-compensated crystal oscillators and the like are large in size among components mounted on mobile phones, and their requirements are particularly severe.

In order to reduce the size and weight of a temperature-compensated crystal oscillator and the like, attempts have been made to mount circuit components other than the crystal oscillator on a one-chip semiconductor integrated circuit.

When a variable capacitance circuit as shown in FIG. 4 is mounted on a semiconductor integrated circuit, the variable capacitance 3 is composed of a variable capacitance diode or a MOS type capacitor, and the fixed capacitance 1 is a two-layer polycrystalline silicon film or the like. In general, it is composed of

Among these, the variable capacitance diode must not bias the pn junction in the forward direction, so that the potential relationship between the two electrodes can be restricted, which is disadvantageous in terms of the rate of capacitance change as compared with the MOS type capacitor. Therefore, it is advantageous to mount a MOS capacitor having a wide frequency variable width and capable of expanding the temperature compensation range.

The variable capacitance circuit 1 constructed as described above
One example is shown in FIG.

FIG. 5 is a sectional view of a semiconductor integrated circuit on which a variable capacitance circuit is mounted. However, in FIG. 5, illustration of a metal wiring film, a protective film, and the like is omitted.

As shown in FIG. 5, on the surface of the semiconductor substrate 7 of the first conductivity type, a low concentration diffusion region 9 of the second conductivity type of the first electrode and the second conductivity type of the first electrode are provided. A MOS capacitor including the high-concentration diffusion region 11, the gate insulating film 13, and the second electrode 15 is configured as the variable capacitor 3 shown in FIG.

Further, on the field oxide film 17,
Fourth electrode 19, interlayer insulating film 21, and third electrode 23
Are formed as the fixed capacitance 1 shown in FIG.

Further, on the field oxide film 17, an input resistor 5 made of a polycrystalline silicon film containing an appropriate concentration of impurities is formed.

The second electrode 15, the fourth electrode 19, and the input resistor 5 are connected by a metal wiring film or the like. However, in order to avoid complication, the connection is shown as an electric circuit in FIG. ing.

The second electrode 15, the fourth electrode 19, and the input resistor 5 can be formed by using the same polycrystalline silicon film as a starting material and changing only the type and concentration of impurities. is there. Alternatively, the third electrode 23 and the input resistor 5 may be formed from the same polycrystalline silicon film.

Alternatively, the second electrode 15 and the fourth electrode 19 may be formed of a refractory metal polycide film or the like.

In any case, it is not difficult to mount the variable capacitance circuit shown in FIG. 4 together with an oscillation circuit and the like on a one-chip semiconductor integrated circuit.

[0023]

However, a temperature-compensated crystal oscillator constructed using a variable capacitance circuit mounted on a one-chip semiconductor integrated circuit has a problem that the phase noise characteristic is poor.

Further, a voltage-controlled crystal oscillator constituted by using a variable capacitance circuit mounted on a one-chip semiconductor integrated circuit has a problem that response of a frequency change to a signal is poor.

[Object of the Invention] An object of the present invention is to provide a variable capacitance circuit which does not deteriorate phase noise characteristics and has good responsiveness even when mounted on a semiconductor integrated circuit.

[0026]

To achieve the above object, the configuration of a variable capacitance circuit according to the present invention is as follows.

That is, the configuration of the variable capacitance circuit according to the present invention comprises a low-concentration diffusion region of the second conductivity type on the surface of the semiconductor substrate of the first conductivity type and a high-concentration diffusion region of the second conductivity type in the diffusion region. A first electrode comprising a first region and a second electrode comprising a metal film or a semiconductor film containing a high concentration of impurities opposed to a low concentration portion of the first electrode with an insulating film interposed therebetween.
The OS-type capacitor is a variable capacitance element, and has a high-concentration diffusion region of the first conductivity type in a low-concentration diffusion region of the second conductivity type of the first electrode.

In this variable capacitance circuit, the second
The high-concentration diffusion region of the first conductivity type in the low-concentration diffusion region of the conductivity type is separated from the high-concentration diffusion region of the second conductivity type.

Further, in this variable capacitance circuit,
The high-concentration diffusion region of the first conductivity type in the low-concentration diffusion region of the second conductivity type is near the center of the surface of the low-concentration diffusion region of the second conductivity type.

[Operation] In order for the capacitance value of the MOS capacitor to be variable, the width of the depletion layer on the surface of the first electrode on the semiconductor substrate side must be changed by the electric field from the second electrode. In addition, the impurity concentration other than the connection portion with the metal wiring must be low. Therefore, most of the first electrodes have a high resistance.

Since an arbitrary signal such as an external frequency control signal is sometimes applied to the first electrode, it is necessary to electrically separate the first electrode from a surrounding semiconductor substrate which is a power supply potential. Is employed.
Therefore, a junction capacitance exists between the first electrode and the surrounding semiconductor substrate.

Considering such junction capacitance and electrode resistance, a practical circuit diagram of the conventional variable capacitance circuit shown in FIG. 5 is as shown in FIG.

As shown in FIG. 6, an electrode resistor 29 is connected between the variable capacitor 3 and an arbitrary potential, and a junction capacitor 27 is connected between the variable capacitor 3 and a power supply.

The power supply to which the junction capacitor 27 is connected is pulsating under the influence of the crystal oscillation circuit, and fluctuations in its potential are transmitted to the first electrode of the variable capacitor 3 through the junction capacitor 27. Because of the electrode resistance 29, the fluctuation of the potential cannot be suppressed, and the potential of the first electrode also pulsates.

If the pulsation of the potential of the first electrode is synchronized with the pulsation of the power supply, there is no frequency component other than the crystal oscillation frequency, so that no modulation is applied to the crystal oscillation frequency.

However, in the conventional variable capacitor 3, since the pulsation of the potential of the first electrode cannot follow the crystal oscillation frequency, the fluctuation of the frequency component different from the crystal oscillation frequency is superimposed on the first electrode. I will.

Since the capacitance value of the MOS capacitor is determined by the potential difference between the first electrode and the second electrode, the fluctuation of this potential causes fluctuation of the capacitance value of a frequency component different from the crystal oscillation frequency. Modulates the crystal oscillation frequency. This modulation is observed as deterioration of the phase noise characteristic.

Therefore, in order to prevent the phase noise characteristic from deteriorating, a structure in which the junction capacitance 27 and the electrode resistance 29 do not exist, or the junction capacitance 27 and the electrode resistance 2
The idea is to provide a device that has no effect even if 9 exists. Since the former method is physically difficult, the present invention employs the latter method.

The most important feature of the present invention is that the second electrode of the first electrode
A high-concentration diffusion region of the first conductivity type is provided in a low-concentration diffusion region of the conductivity type.

From another viewpoint, the fluctuation of the potential of the first electrode is an operation of alternately promoting the generation of majority carriers and the generation of minority carriers.

Since majority carriers exist literally in large numbers, the response to disturbance is fast. For this reason, it is possible to respond instantaneously to a disturbance that encourages the generation of majority carriers.

On the other hand, the speed of generation of minority carriers depends on the crystal defect density and the like, but is much slower than that of majority carriers, and usually cannot respond to signals of 1 kHz or more. For this reason, it is impossible to follow the disturbance of the crystal oscillation frequency in the 10 MHz band, and a slow frequency component is superimposed on the fluctuation of the potential of the first electrode.

Therefore, a minority carrier storage is provided in advance, and when a disturbance occurs, minority carriers are injected from this storage.

By such a mechanism, the generation of minority carriers can be substantially increased at a high speed, and it is possible to follow the disturbance. What corresponds to this storage is a high-concentration diffusion region of the first conductivity type.

In the high-concentration diffusion region of the first conductivity type, there are many majority carriers of the first conductivity type, which are injected as minority carriers into the low-concentration diffusion region of the second conductivity type of the first electrode. You.

This injection mechanism is exactly the same as the operation of the MOS transistor, and is much faster than the disturbance in the 10 MHz band. Therefore, the fluctuation frequency of the potential of the first electrode matches the crystal oscillation frequency. For this reason, other frequency components do not exist, and deterioration of phase noise can be prevented.

The high-concentration diffusion region of the first conductivity type not only prevents the deterioration of the phase noise but also increases the response speed to the signal whose capacitance value is to be changed.

The structure of the semiconductor substrate, the low concentration diffusion region of the first electrode, and the high concentration diffusion region of the opposite conductivity type are the same as those of the junction type bipolar transistor. Therefore, in order to prevent the operation as a variable capacitor from being hindered, they must be prevented from operating as a bipolar transistor.

There are various methods for preventing the device from operating as a bipolar transistor. The simplest method is to float a high-concentration diffusion region of the opposite conductivity type serving as an emitter, or to use a high-concentration diffusion region of the opposite conductivity type. A thick diffusion region is provided near the center of the low-concentration diffusion region of the first electrode to increase the base thickness, or a combination of both.

[0050]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The preferred embodiments of the variable capacitance circuit according to the present invention will be described below with reference to the drawings. First, a first embodiment of the present invention will be described.

FIG. 1 is a sectional view of a semiconductor integrated circuit showing a configuration of a variable capacitance circuit according to the first embodiment of the present invention. However, in this cross-sectional view, a metal wiring film, a protective film, and the like are not shown in order to avoid complication.

[Explanation of the First Embodiment: FIG. 1] As shown in the cross-sectional view of FIG. 1, a low concentration of a first electrode of the second conductivity type is formed on the surface of a semiconductor substrate 7 of the first conductivity type. A diffusion region 9 of
A second conductive type high-concentration diffusion region 11 of the first electrode; a first conductive type high-concentration diffusion region 31;
And the second electrode 15 to form a MOS capacitor. This MOS type capacitor is the variable capacitor 3 shown in FIG.

On the field oxide film 17, a fourth
, An interlayer insulating film 21 and a third electrode 23 constitute a capacitor. This capacitor is shown in FIG.
Is a fixed capacity 1 shown in FIG.

Further, on the field oxide film 17, an input resistor 1 made of a polycrystalline silicon film containing an appropriate impurity is formed.
1.

The second electrode 15, the fourth electrode 19, and the input resistor 11 are connected by a metal wiring film or the like, but are shown in FIG. 1 as connections in an electric circuit. Also, descriptions of a protective film and the like are omitted.

As shown in FIG. 1, since the first electrode is of the second conductivity type, a junction capacitance exists between the first electrode and the semiconductor substrate 7 of the first conductivity type.

The semiconductor substrate 7 of the first conductivity type is connected to a power supply and is originally kept at a constant potential.

However, the crystal oscillation circuit in the 10 MHz band has a large pulsation of current, and the metal wiring of the semiconductor integrated circuit does not have enough power to suppress the fluctuation of the potential due to the pulsation. I will.

Therefore, the potential of the semiconductor substrate 7 of the first conductivity type is constantly pulsating during the operation of the crystal oscillation circuit.

The pulsation of the potential of the semiconductor substrate 7 of the first conductivity type is transmitted to the first electrode via the junction capacitance.

Most of the first electrode is a low-concentration diffusion region 9 of the second conductivity type, so that it has a high resistance and has no force to suppress transmitted pulsation. Therefore, the potential of the low-concentration diffusion region 9 of the second conductivity type of the first electrode also pulsates.

Looking at this potential pulsation from another viewpoint, it is an operation of alternately promoting the generation and recombination of majority carriers and minority carriers.

Since there are literally many majority carriers, the majority carrier responds instantaneously to a disturbance that prompts generation.

On the other hand, if the crystal defect density is at a level at which the semiconductor integrated circuit operates normally, the generation of minority carriers in the low-concentration diffusion region 9 of the second conductivity type is slow, and is usually 1k.
It cannot follow disturbances with a speed higher than Hz.

Therefore, if this state is left as it is, a delay occurs in the fluctuation of the potential of the first electrode, and fluctuation of a frequency component different from the crystal oscillation frequency is superimposed. The deterioration of the phase noise in the prior art is due to this.

Therefore, in the present invention, as shown in FIG. 1, a high-concentration diffusion region 31 of the first conductivity type is provided in a low-concentration diffusion region 9 of the second conductivity type.

In the high-concentration diffusion region 31 of the first conductivity type, there are many majority carriers of the first conductivity type, and a disturbance which promotes the generation of minority carriers in the low-concentration diffusion region 9 of the second conductivity type. Comes, the majority carriers of the first conductivity type are injected as minority carriers from the high concentration diffusion region 31 of the first conductivity type into the low concentration diffusion region 9 of the second conductivity type.

This injection mechanism is the same as the operation for forming the channel of the MOS transistor, and is very fast. Therefore, since disturbance in the 10 MHz band can be easily followed, there is no delay in fluctuation of the potential of the first electrode.

For this reason, since the fluctuation of the potential of the first electrode is synchronized with the fluctuation of the power supply, there is no frequency component different from the crystal oscillation frequency.

Accordingly, by providing the high-concentration diffusion region 31 of the first conductivity type in the low-concentration diffusion region 9 of the second conductivity type as in the present invention, deterioration of phase noise can be prevented. .

In addition, the response to the signal for changing the capacitance value of the variable capacitance is also increased.

The high-concentration diffusion region 31 of the first conductivity type is in contact with the low-concentration diffusion region 9 of the second conductivity type, and the low-concentration diffusion region 9 of the second conductivity type is a semiconductor substrate of the first conductivity type. 7
, These have a junction type bipolar transistor structure.

If this structure electrically operates as a bipolar transistor, it cannot operate as a variable capacitor. Therefore, it is necessary to prevent the structure from operating as a bipolar transistor.

The first measure is to prevent the first
This is a method of floating the high-concentration diffusion region 31 of the conductivity type.

In order to operate a bipolar transistor, it is necessary to bias the emitter and the base so that they are forward. However, if the emitter is floating, it becomes impossible to bias in the forward direction. It cannot operate as a transistor.

Then, the high concentration diffusion region 3 of the first conductivity type
In the case of 1, as long as the majority carriers corresponding to the fluctuation of the potential of the first electrode need only be stored, floating is sufficient if there is a certain volume. Therefore, the operation as the bipolar transistor can be prevented without impairing the original function of the high-concentration diffusion region 31 of the first conductivity type.

The high-concentration diffusion region 31 of the first conductivity type is used as the high-concentration diffusion region 1 of the second conductivity type of the first electrode.
When it comes into contact with 1, it becomes a pn junction between high concentrations,
The reverse breakdown voltage becomes low.

In this case, the high concentration diffusion region 31 of the first conductivity type and the high concentration diffusion region 1 of the second conductivity type of the first electrode are provided.
1 is almost in a short-circuit state, so that the high-concentration diffusion region 31 of the first conductivity type is not in a floating state.

Therefore, the first conductive type high concentration diffusion region 3
1 is a high concentration diffusion region 11 of the second conductivity type of the first electrode.
It must be formed separately from. This is the second aspect of the present invention.
It is a feature of.

The second measure for preventing the operation of the bipolar transistor is to make the base thickness as large as possible.

The base thickness is a distance between the high-concentration diffusion region 31 of the first conductivity type and the semiconductor substrate 7 of the first conductivity type.

For this purpose, the high-concentration diffusion region 31 of the first conductivity type is arranged near the center of the surface of the low-concentration diffusion region 9 of the second conductivity type. This is the third feature of the present invention.

Next, a second embodiment of the present invention will be described. FIG. 2 is a sectional view showing the configuration of the variable capacitance circuit according to the second embodiment of the present invention. However, in this cross-sectional view, a metal wiring film, a protective film, and the like are not shown to avoid complication.

[Explanation of the Second Embodiment: FIG. 2] As shown in the sectional view of FIG. 2, the surface of the semiconductor substrate 7 of the first conductivity type has a low concentration of the first electrode of the second conductivity type. A diffusion region 9 of
A second conductive type high-concentration diffusion region 11 of the first electrode; a first conductive type high-concentration diffusion region 31;
And the second electrode 15 to form a MOS capacitor. This MOS type capacitor is the variable capacitor 3 shown in FIG.

On the field oxide film 17, a fourth
, An interlayer insulating film 21 and a third electrode 23 constitute a capacitor. This capacitor is shown in FIG.
Is a fixed capacity 1 shown in FIG.

Further, on the field oxide film 17, an input resistor 1 made of a polycrystalline silicon film containing appropriate impurities is formed.
1.

The second electrode 15, the fourth electrode 19, and the input resistor 11 are connected by a metal wiring film or the like, but are shown in FIG. 2 as connections in an electric circuit. Also, descriptions of a protective film and the like are omitted.

The difference between the second embodiment shown in FIG. 2 and the first embodiment shown in FIG. 1 is that the second electrode 15 is provided above the high-concentration diffusion region 31 of the first conductivity type. Is present or not.

Although both the electric operation and the effect are the same, both have different manufacturing methods.

In the method of manufacturing a semiconductor integrated circuit, a high-concentration diffusion region such as a second-conductivity-type high-concentration diffusion region 11 of the first electrode is formed simultaneously with the formation of the source / drain of the MOS transistor. Generally, after the second electrode 15 is formed, it is formed by ion implantation and heat treatment.

Therefore, as shown in FIG.
If the vicinity of the center of 5 is removed, the high-concentration diffusion region 31 of the first conductivity type can also be formed after the formation of the second electrode 15.

That is, in the second embodiment shown in FIG. 2, the high-concentration diffusion region 31 of the first conductivity type can be formed without changing the usual method of manufacturing a semiconductor integrated circuit. An increase in manufacturing cost can be prevented.

In the second embodiment shown in FIG.
The high-concentration diffusion region 31 of the first conductivity type is disposed near the center of the surface of the low-concentration diffusion region 9 of the second conductivity type, and is disposed separately from the high-concentration diffusion region 11 of the second conductivity type. This is necessary to prevent operation as a bipolar transistor.

Next, a third embodiment of the present invention will be described. FIG. 3 is a sectional view showing the configuration of the variable capacitance circuit according to the third embodiment of the present invention. However, in this cross-sectional view, a metal wiring film, a protective film, and the like are not shown to avoid complication.

[Explanation of Third Embodiment: FIG. 3] As shown in the block diagram of FIG. 3, a low concentration of the first electrode of the second conductivity type is formed on the surface of the semiconductor substrate 7 of the first conductivity type. Diffusion area 9
And a high concentration diffusion region 11 of the second conductivity type of the first electrode
, A MOS type capacitor including the high-concentration diffusion region 31 of the first conductivity type, the gate insulating film 13, and the second electrode 15. This MOS type capacitor is the variable capacitor 3 shown in FIG.

Further, on the second electrode 15, a capacitor composed of the interlayer insulating film 21 and the third electrode 23 is formed. This capacitor is the fixed capacitance 1 shown in FIG.

Further, on the field oxide film 17, an input resistor 1 made of a polycrystalline silicon film containing an appropriate impurity is formed.
1.

Although the second electrode 15 and the input resistor 11 are connected by a metal wiring film or the like, FIG. 3 shows the connection as an electric circuit. Also, descriptions of a protective film and the like are omitted.

In the third embodiment shown in FIG. 3, when the fixed capacitor 1 is formed on the field oxide film 17 as shown in FIG. 1 or FIG. In order to prevent the capacitance change rate from lowering due to the parasitic capacitance between the second electrodes 1
The fixed capacitance 1 is formed on the upper surface 5.

Even in the case of such a stack structure, the first
There is no change in the effect of tuning the fluctuation of the potential of the first electrode to the fluctuation of the power supply due to the injection of minority carriers from the high concentration diffusion region 31 of the conductivity type to the low concentration diffusion region 9 of the second conductivity type.

As described above, the present invention has been specifically described based on the embodiments. However, the present invention is not limited to the above embodiments, and various changes can be made without departing from the gist of the present invention. It is.

For example, in the third embodiment shown in FIG. 3, the second electrode 15 and the third electrode 23 exist above the high-concentration diffusion region 31 of the first conductivity type. 2
These electrodes may be removed from above the high-concentration diffusion region 31 of the first conductivity type, as in the second embodiment shown in FIG.

[0103]

As described above, the pulsation of the potential of this electrode is synchronized with the pulsation of the power supply by providing the diffusion region of the opposite conductivity type serving as a storage for minority carriers in the electrode on the semiconductor substrate side of the variable capacitance. As a result, it is possible to eliminate frequency components other than the crystal oscillation frequency and prevent the phase noise characteristic from deteriorating.

Further, it is possible to realize a high-speed response to a signal whose capacitance value is to be changed.

Therefore, the size of the temperature-compensated crystal oscillator and the voltage-controlled crystal oscillator can be reduced by the semiconductor integrated circuit without deteriorating the characteristics, and the effect is very large.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a configuration of a variable capacitance circuit according to a first embodiment of the present invention.

FIG. 2 is a cross-sectional view illustrating a configuration of a variable capacitance circuit according to a second embodiment of the present invention.

FIG. 3 is a cross-sectional view illustrating a configuration of a variable capacitance circuit according to a third embodiment of the present invention.

FIG. 4 is a circuit diagram showing a configuration of a variable capacitance circuit according to the related art.

FIG. 5 is a cross-sectional view illustrating a configuration of a variable capacitance circuit according to the related art.

FIG. 6 is a practical circuit diagram of a variable capacitance circuit according to the related art.

[Explanation of symbols]

 7: First conductivity type semiconductor substrate 9: Low concentration diffusion region of second conductivity type of first electrode 11: High concentration diffusion region of second conductivity type of first electrode 13: Gate insulating film 15: Second electrode 31: high-concentration diffusion region of the first conductivity type

Claims (3)

[Claims] A first electrode formed of a low-concentration diffusion region of a second conductivity type on a surface of a semiconductor substrate of the first conductivity type and a high-concentration diffusion region of a second conductivity type in the diffusion region; A MOS capacitor including a second electrode made of a metal film or a semiconductor film containing a high concentration of impurities is opposed to a low-concentration portion of the first electrode with an insulating film interposed therebetween. In the low concentration diffusion region of the second conductivity type,
A variable capacitance circuit having a high-concentration diffusion region of a conductivity type. 2. A first electrode comprising a low-concentration diffusion region of the second conductivity type on the surface of the semiconductor substrate of the first conductivity type and a high-concentration diffusion region of the second conductivity type in the diffusion region. A MOS capacitor including a second electrode made of a metal film or a semiconductor film containing a high concentration of impurities is opposed to a low-concentration portion of the first electrode with an insulating film interposed therebetween. In the low concentration diffusion region of the second conductivity type,
A high-concentration diffusion region of the first conductivity type in the low-concentration diffusion region of the second conductivity type, wherein the high-concentration diffusion region of the second conductivity type is separated from the high-concentration diffusion region of the second conductivity type; A variable capacitance circuit, characterized in that: 3. The variable capacitance circuit according to claim 1, wherein the high-concentration diffusion region of the first conductivity type in the low-concentration diffusion region of the second conductivity type is a low-concentration diffusion region of the second conductivity type. A variable capacitance circuit located near the center of the surface.