JP2000323566A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress crosstalks between elements of a semiconductor device by providing the semiconductor device with an opening formed by removing a semiconductor substrate at a portion corresponding to a device isolation insulating film for electrically isolating one element from another. SOLUTION: A portion corresponding to a device isolation insulating film 2 of a P-type MOS transistor 10, i.e., a silicon substrate 1 at a device isolation region is removed to provide an opening 1a. By providing the substrate 1 with the opening 1a, even when operating signals of the respective MOS transistors 10 and 20 leak into the substrate 1 such as shown by arrows 81 and 82, the propagation paths generating crosstalks are blocked, whereby the crosstalks between the transistors 10 and 20 through the substrate 1 can be reduced. As a result, the S/N ratio of the transistors 10 and 20 can be improved, and the mixture of unnecessary signals into the transistors 10 and 20 can be suppressed, and hence malfunction of the semiconductor device can be suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a plurality of elements formed thereon and a method of manufacturing the same, and more particularly, to a semiconductor device capable of suppressing crosstalk between elements and between circuit elements formed by the elements. It relates to the manufacturing method.

[0002]

2. Description of the Related Art In an LSI fabricated on a silicon substrate, an operation signal of a semiconductor element constituting the LSI propagates to the silicon substrate when the silicon substrate acts as a dielectric or a semiconductor, and this signal is transmitted through the silicon substrate. It is known that the propagation of the noise affects another semiconductor element in the same LSI and generates noise (noise) due to mutual interference (crosstalk). The crosstalk between semiconductor elements includes bipolar transistors and MOs.
There are crosstalk between active elements such as S transistors, crosstalk between passive elements such as inductor elements and resistance elements, and crosstalk between active elements and passive elements.

[0003] Regarding crosstalk between active elements, see, for example, "JPRaskin et al.," Substrate Crosstalk Red.
uction Using SOI Techno1ogy ", IEEE Trans.Electron D
evices, vo1.44, pp. 2252-2260, 1997. " The two MOS transistors 110 shown in FIG.
A conventional method for suppressing crosstalk between active elements will be described with reference to FIG. The silicon substrate 101 is a P-type substrate. In the silicon substrate 101, an N-type well 111 having a conductivity type opposite to that of the substrate 101 is formed.
A P-type MOS transistor 110 is manufactured in the device 1. Also, an N-type MOS transistor 12 is
0 is created. Here, each of the transistors 110 and 12
During a period between 0 and 0, a potential is applied between the well 111 and the substrate 101 so that the PN junction is reversely biased, and separated by a depletion layer 116 formed at this time in a direct current (DC) manner.

However, when the operating frequency of the transistor 110 increases, the depletion layer 116 acts as a capacitor,
The well 111 and the substrate 101 are capacitively coupled in an alternating current (AC) manner. Therefore, the operation signal of the transistor 110 is changed to the silicon substrate 1 as indicated by the arrow 181.
01 to cause crosstalk.

[0005] Although not shown, when an SOI (Silicon On Insulator) substrate is used as a substrate for manufacturing a transistor, a silicon oxide film (Si) is formed around the transistor.
By surrounding with an insulating film such as an O ₂ film), the elements can be completely separated in a DC manner. However, also in this case, when the operating frequency of the transistor increases, the insulating film separating the transistor and the substrate acts as a capacitor, and
The operation signal propagates to the substrate due to the capacitive coupling.

Next, regarding crosstalk between passive elements, see, for example, "ALLPun et al.," Substrate Noise Co.
up1ing Through P1anar Spiral Inductor ", IEEE J.Soli
d-State Circuits, vo1.33, PP.877-884, 1998. " A conventional method for suppressing crosstalk between passive elements will be described using the inductor 135 shown in FIG. 15 as an example. The inductor 135 is formed in a region surrounded by the element isolation insulating film 102 and the wiring interlayer insulating films 103 and 106. Although the inductor 135 and the silicon substrate 101 are separated by the element isolation insulating film 102, as in the case described above, when the operating frequency of the circuit element including the inductor 135 increases, the inductance between the inductor 135 and the substrate 101 is reduced. Is A
Capacitively coupled in a C-like manner. As a result, the signal of the inductor 135 propagates to the silicon substrate 101 as indicated by the arrow 182, and thus affects adjacent elements and other circuit elements in the form of unnecessary signals, noise, and the like.

[0007]

As described above, in the conventional semiconductor device, when the operating frequency of the circuit increases, the depletion layer 116 or the insulating layer 102 separating the circuit element and the silicon substrate 101 functions as a capacitor. Then, the circuit element and the silicon substrate 101 are capacitively coupled. For this reason, the operation signal of the element propagates to the silicon substrate 101 and causes crosstalk with other elements, thereby affecting the operation characteristics of the circuit as an unnecessary signal or noise. The present invention has been made to solve such a problem, and has as its object to suppress crosstalk between elements of a semiconductor device.

[0008]

In order to achieve this object, a semiconductor device according to the present invention is a semiconductor device having a plurality of elements formed on a semiconductor substrate and formed between the elements and electrically connected between the elements. An element isolation insulating film for electrically insulating and separating;
And an opening formed by removing a portion of the semiconductor substrate corresponding to the element isolation insulating film. In this manner, by removing the semiconductor substrate and forming an opening, a path where crosstalk occurs can be blocked. Since the element isolation insulating film corresponds to a passive element formation region, an element isolation region, and a circuit element isolation region, crosstalk due to passive elements and crosstalk between elements and between circuit elements can be suppressed.

In this semiconductor device, when an A / D mixed circuit including an analog circuit and a digital circuit is formed by each element, the opening corresponds to an element isolation insulating film between the analog circuit and the digital circuit. It may be formed in the part where it does. Thereby, the propagation path of the signal leaked from the analog circuit and the digital circuit can be cut off, so that the crosstalk between the analog circuit and the digital circuit can be suppressed.

When a plurality of analog circuits are formed by each element, the opening may be formed at a portion corresponding to an element isolation insulating film between the analog circuits.
Thus, the propagation path of the signal leaked from the analog circuit can be cut off, so that crosstalk between the analog circuits can be suppressed.

A semiconductor device according to the present invention is a semiconductor device of an SOI substrate having at least three layers of a semiconductor substrate, an insulator layer formed on the semiconductor substrate, and a semiconductor layer formed on the insulator layer. In a semiconductor device in which a plurality of elements are formed in a layer, an opening formed by removing a semiconductor substrate in a portion corresponding to at least one of an element formation region and an element isolation region of the semiconductor layer is provided. I do. Since the SOI substrate is provided with the insulator layer over the entire region between the semiconductor layer where the elements are formed and the semiconductor substrate, any region of the semiconductor substrate can be removed with good controllability. As a result, an opening can be formed in an arbitrary region including not only a passive element formation region, an element isolation region, and a circuit element isolation region, but also an active element formation region such as a transistor. Therefore, it is possible to suppress crosstalk between all elements including the active element and an arbitrary region.

In this semiconductor device, when an A / D mixed circuit including an analog circuit and a digital circuit is formed by each element, the element formation area is an area where a digital circuit is formed, and an element isolation area. Is the area between the analog and digital circuits. In other words, by removing the semiconductor substrate corresponding to the formation area of the digital circuit and the area between the analog circuit and the digital circuit, it is possible to suppress the leakage and propagation of the operation signal of the digital circuit. Mixing can be prevented. As a result,
The signal-to-noise ratio (S / N ratio) of the analog circuit can be improved.

When an A / D mixed circuit composed of an analog circuit and a digital circuit is formed by each element, the element formation area is an area where the analog circuit is formed, and the element isolation area is It may be an area between an analog circuit and a digital circuit. In other words, by removing the semiconductor substrate corresponding to the formation area of the analog circuit and the area between the analog circuit and the digital circuit, the leakage and propagation of the carrier signal and the harmonic signal of the analog circuit can be suppressed. It is possible to prevent noise from entering the digital circuit. As a result, malfunction of the digital circuit can be suppressed.

Further, when a plurality of analog circuits are formed by the respective elements, the element forming region is a region where at least one analog circuit is formed, and the inter-element region is a region between the analog circuits. . That is, by removing the semiconductor substrate corresponding to the formation region of the specific analog circuit and the region between the analog circuits, it is possible to prevent unnecessary signals and noise from being mixed into other analog circuits. Therefore, the S / N ratio of the analog circuit can be improved, and
The operation of the analog section can be stabilized.

Further, the above-described semiconductor device may include a member that shields an electromagnetic wave disposed in the opening without contacting the semiconductor substrate. Accordingly, it is possible to prevent the electromagnetic waves radiated from the elements of the semiconductor device from leaking outside the semiconductor device.

One configuration example of the member for shielding the electromagnetic wave is as follows.
It has a multilayer structure of soft magnetic thin films having uniaxial magnetic anisotropy, and the soft magnetic thin films of the respective layers have different directions of easy axes of magnetization in the film plane. As a result, a high relative magnetic permeability can be obtained in all directions in a high-frequency band, so that high-frequency electromagnetic waves can be effectively shielded regardless of the radiation direction.

Next, a method of manufacturing a semiconductor device according to the present invention
A first step of forming a plurality of elements on a front surface of a semiconductor substrate and an element isolation insulating film for electrically insulating and isolating the elements, and an element isolation insulating film from the back surface of the semiconductor substrate A second step of removing a portion of the semiconductor substrate corresponding to the element isolation insulating film until the element is exposed, and applying a first magnetic field having a parallel component to an exposed surface of the element isolation insulating film. A third step of forming a first soft magnetic thin film on a predetermined region of the exposed surface of the isolation insulating film; and a step of forming a first magnetic field having a different parallel component from the exposed surface of the element isolation insulating film. And a fourth step of forming a second soft magnetic thin film on the first soft magnetic thin film while applying the second magnetic field. According to this method, it is possible to form a semiconductor device in which a multilayer structure of a soft magnetic thin film in which the direction of the axis of easy magnetization differs in each layer is provided on the element isolation insulating film.

Further, a method of manufacturing a semiconductor device according to the present invention
A first method for forming a plurality of elements on a semiconductor layer of an SOI substrate including a semiconductor substrate, an insulator layer formed on the semiconductor substrate, and at least three semiconductor layers formed on the insulator layer. A second step of removing a predetermined region of the semiconductor substrate until the insulator layer is exposed, and a step of removing the insulator by applying a first magnetic field having a parallel component to the exposed surface of the insulator layer. A third step of forming a first soft magnetic thin film on a predetermined region of the exposed surface of the layer, and a second magnetic field having a parallel component different from the first magnetic field on the exposed surface of the insulator layer And a fourth step of forming a second soft magnetic thin film on the first soft magnetic thin film while applying the pressure.
According to this method, it is possible to form a semiconductor device in which a multilayer structure of a soft magnetic thin film in which the direction of the easy axis of magnetization differs in each layer is provided on the insulator layer.

[0019]

Embodiments of the present invention will be described below with reference to the drawings. (First Embodiment) FIG. 1 is a sectional view of a first embodiment of a semiconductor device according to the present invention. FIG. 1 shows an example in which the present invention is applied to a semiconductor device including a P-type MOS transistor 10 and an N-type MOS transistor 20 manufactured by a CMOS process on a silicon substrate 1 as a semiconductor substrate. .

An N-well 11 is formed on the front surface of the P-type silicon substrate 1, and a P-type MOS transistor 10 is formed inside the N-well 11. This P
The MOS transistor 10 includes a source 12 and a drain 13 of a P ⁺ region formed separately in an N well 11.
An insulating film 14 such as SiO ₂ disposed on a region between the source 12 and the drain 13, and a gate electrode 15 formed of a metal or polycrystalline silicon (polysilicon) formed on the insulating film 14. It consists of. P-type MO
The S-transistor 10 is formed in a conductive N-well 11 opposite to the P-type silicon substrate 1 so that the substrate 1
And separate structure.

Similarly, an N-type MOS transistor 20 including a source 22 and a drain 23 in an N ⁺ region, an insulating film 24 and a gate electrode 25 is formed on the front surface of the P-type silicon substrate 1. . These MOS transistors 10 and 20 are electrically isolated by the element isolation insulating film 2.

On the MOS transistors 10 and 20, PSG
(Phospho-Silicate Glass) interlayer insulating film 3
The wirings 5a, 5b and 5c are formed on the interlayer insulating film 3 with Al or the like. Further, these wirings 5a to 5c are covered with an interlayer insulating film 6 also made of PSG or the like. Contact holes are provided in the interlayer insulating film 3, and contacts 4a, 4b, 4c, 4d made of Al or the like embedded in each contact hole.
The source 1 of each of the MOS transistors 10 and 20
2, 22, and drains 13, 23 and wirings 5a to 5c are electrically connected.

As shown in FIG. 1, the drain 13 of the P-type MOS transistor 10 and the N-type MOS transistor 20
Are the contacts 4b and 4c and the wiring 5b
The electric signal of the wiring 5b can be taken out from the opening 7a provided in the interlayer insulating film 6. Also,
Although not shown, the source 1 of the P-type MOS transistor 10
The wiring 5a connected to 2 and the wiring 5c connected to the drain 23 of the N-type MOS transistor 20 are respectively connected to other elements. Although not shown, the gate electrodes 15 and 25 are connected to other elements via contacts and wirings, respectively. Note that the wiring may be a multilayer wiring structure in which two or more layers are stacked by repeating the same layer structure two or more times.

Further, a portion corresponding to the element isolation insulating film 2, that is, the silicon substrate 1 in the element isolation region is removed, and an opening 1a is provided. A portion of the silicon substrate 1 corresponding to the element isolation insulating film 2 is electrically separated from the silicon substrate 1 on the P-type MOS transistor 10 side and the silicon substrate 1 on the N-type MOS transistor 20 side.
Is desirably completely removed.

By providing the opening 1a in the silicon substrate 1 as described above, the operation signals of the MOS transistors 10 and 20 are supplied to the silicon substrate 1 as indicated by arrows 81 and 82.
, The propagation path causing the crosstalk is cut off, so that the crosstalk between the MOS transistors 10 and 20 via the silicon substrate 1 can be reduced. Thereby, the S / N ratio of each of the MOS transistors 10 and 20 can be improved, and the MOS transistors 10 and 2 can be improved.
Since the mixing of unnecessary signals into 0 can be suppressed, malfunction of the semiconductor device can be suppressed.

In the opening 1a of the silicon substrate 1, a thin film 8 made of a member having a function of shielding electromagnetic waves is provided.
a is arranged. The thin film 8 a is formed in close contact with the exposed portion of the element isolation insulating film 2 so as not to contact the silicon substrate 1. As the thin film 8a, a material having an action of shielding electromagnetic waves, such as a metal and a ferromagnetic material, is used. The higher the relative permeability, the greater the shielding effect, so
A material having a large relative magnetic permeability is used for the thin film 8a. For example, a permalloy (Pe
rmalloy) thin film, Sendast thin film, amorphous thin film and the like.

The shielding effect in the high-frequency band is governed by the imaginary term of the relative magnetic permeability. However, the above-described permalloy thin film and sendust thin film have a small imaginary number of the relative magnetic permeability in a band of several hundred MHz or more. Is used in the range of several tens of MHz to several hundreds of MHz. On the other hand, by controlling the magnetic anisotropy of the soft magnetic thin film largely, the imaginary term of the relative permeability is maintained up to a high frequency band of GHz. The soft magnetic thin films include CoFeSiB-based and CoNbZr-based amorphous thin films, and CoFeAl-O-based and CoFePd-O microcrystalline thin films.
There are composition systems containing many gas elements, such as systems, CoFeBF-F systems, and FeCoAl-N systems.

Electromagnetic waves 83 and 84 are radiated from each of the MOS transistors 10 and 20 together with the above-mentioned operation signal. By arranging such a thin film 8a in the opening 1a of the silicon substrate 1, this electromagnetic wave 83,8
4 can be suppressed from leaking outside the semiconductor device.

Next, a method of manufacturing the semiconductor device shown in FIG. 1 will be described. 2 and 3 are cross-sectional views showing main steps in manufacturing this semiconductor device. First, a P-type silicon (100) substrate is prepared as the silicon substrate 1 and a predetermined area of the front surface of the silicon substrate 1 is
An element isolation insulating film 2 made of a silicon oxide film is formed by the COS method. Next, a P-type MOS is formed in a region separated by the element isolation insulating film 2 by a CMOS process.
The transistor 10 and the N-type MOS transistor 20 are respectively formed.

Subsequently, the PS is formed thereon by using the CVD method.
G is deposited to form an interlayer insulating film 3. And
After opening a contact hole for making an electrical connection to each of the MOS transistors 10 and 20 in the interlayer insulating film 3,
Contacts 4a to 4d are formed by embedding a wiring material such as Al in each contact hole. Further, an Al film is formed on the interlayer insulating film 3 so as to be in contact with the surfaces of the contacts 4a to 4d.
The wirings 5a to 5c made of, for example, are formed. Then, PSG or the like is deposited thereon again to form an interlayer insulating film 6, and then an opening 7a for extracting an electric signal from the wiring 5b is formed in the interlayer insulating film 6 (FIG. 2A).

Next, a silicon oxide film 9 is formed on the entire back surface of the silicon substrate 1 by, for example, a plasma CVD method (FIG. 2B). Next, using a known photolithography technique and an etching technique, the silicon oxide film 9 corresponding to the element isolation insulating film 2 is removed,
An opening 9a is formed (FIG. 2C). Then, using the silicon oxide film 9 thus patterned as an etching mask, the silicon substrate 1 is immersed in an aqueous KOH solution or the like until the element isolation insulating film 2 is exposed.
Is formed to form an opening 1a (FIG. 3)
(A)).

The KOH aqueous solution is characterized in that the etching rate of the silicon (100) plane is high and the etching rates of the silicon (111) plane and the silicon oxide film are very low. With this feature, the silicon substrate 1 is etched in a tapered shape with the silicon (111) plane as a boundary, and the etching stops at the element isolation insulating film 2 which is a silicon oxide film.

The opening 1a is formed by a selective wet etching method of silicon using an alkaline solution such as an aqueous KOH solution, a selective vapor etching method of silicon using SF ₆ gas or the like, and a grinding apparatus. It can be performed by a mechanical grinding method using a method such as the above, or a combination of these methods. In any method, since the element isolation insulating film 2 is formed on the silicon substrate 1, a desired portion of the silicon substrate 1 can be removed with good controllability.

Next, the thin film 8a 'having the function of shielding electromagnetic waves is formed by sputtering, vapor deposition, or CVD (Chemical).
It is deposited in the opening 1a by a Vapor Deposition method (FIG. 3B). Then, the thin film 8a 'is patterned using a known photolithography technique and an etching technique so that the thin film 8a'
a is formed and completed (FIG. 3C). Note that FIG.
3B, a thin film 8a 'is deposited in a region other than the opening 1a of the silicon substrate 1, and all the thin film 8a is removed except for the thin film 8a in FIG. 3C. Substrate 1 and N-type MOS transistor 2
Since the thin film 8a 'may be patterned so as not to be electrically connected to the silicon substrate 1 on the 0 side, the thin film 8a' may be left on the back surface of the silicon substrate 1.

In this embodiment, P is used as an active element.
An example in which the present invention is applied to a semiconductor device including a MOS transistor 10 and an N-type MOS transistor 20 has been described.
It can also be applied between OS transistors. Further, an N-type substrate may be used as the silicon substrate 1. Further, the present invention can be applied to a circuit including a bipolar transistor. Further, the present invention can be similarly applied between circuit elements constituted by a large number of elements. Accordingly, the silicon substrate 1 is removed from the inter-element isolation region that separates elements from one another and the inter-element separation region that separates circuit elements from one another, and the thin film 8a having an action of shielding electromagnetic waves is disposed. Thereby, crosstalk between elements and between circuit elements can be suppressed.

(Second Embodiment) FIG. 4 is a conceptual diagram showing a cross section of a semiconductor device according to a second embodiment of the present invention. FIG. 4 shows an example in which the present invention is applied to a semiconductor device in which an inductor element 35 is formed on an element isolation insulating film 2 for electrically isolating an active element. However, in FIG. 4, the size L of the MOS transistors 10 and 20
1 and L2 are about several μm, whereas the dimension L3 of the inductor element 35 is about several hundred μm (when the inductance is several nH), and FIG. 4 does not reflect the actual dimensions. 4, the same components as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will be appropriately omitted. FIG. 5 is FIG.
5 is a perspective view showing a planar shape of the inductor element 35 shown in FIG. FIG. 4 shows the inductor element 35 in FIG.
Is taken along the line IV-IV '.

The inductor element 35 is formed on the interlayer insulating film 3 as shown in FIG. 4, and has a spiral shape as shown in FIG. One end of the inductor element 35 has a contact 34 formed on the interlayer insulating film 3, a wiring 33 formed on the element isolation insulating film 2,
Of the P-type MOS transistor 1 via a contact 32 formed on the substrate and a wiring 31 formed on the interlayer insulating film 3.
Connected to 0. Further, the other end of the inductor element 35 is connected to the N-type MOS transistor 20 via a wiring 36 formed on the interlayer insulating film 3. The inductor element 35 is formed of a wiring material such as Al.

As shown in FIG. 4, the silicon substrate 1 corresponding to the region where the inductor element 35 is formed (hereinafter, referred to as the inductor element region) is removed by the same method as shown in the first embodiment. Thus, an opening 1a is formed. Even if the operating frequency of each of the MOS transistors 10 and 20 and the inductor element 35 increases and an operating signal leaks, a path propagating through the silicon substrate 1 is removed by removing the silicon substrate 1 located under the inductor element region. Since it is cut off, crosstalk between the P-type MOS transistor 10 and the inductor element 35 and between the N-type MOS transistor 20 and the inductor element 35 can be suppressed.

Further, a thin film 8 b having a function of shielding electromagnetic waves is formed in close contact with the exposed portion of the element isolation insulating film 2. This thin film 8b is formed of the same material as the thin film 8a shown in FIG. 1 by the same method. Further, a thin film 8c having an action of shielding electromagnetic waves is also formed on the interlayer insulating film 6. Thus, a structure in which the inductor element 35 is sandwiched between the thin films 8b and 8c from above and below can be realized. Therefore, since the electromagnetic waves radiated in the vertical direction from the inductor element 35 can be shielded, the influence of the electromagnetic waves originating from the inductor element 35 can be suppressed. Moreover, since the silicon substrate 1 located below the inductor element region is removed and the thin film 8b can be arranged near the inductor element 35, electromagnetic waves can be effectively shielded.

Further, by adopting such a configuration, the thin film 8b can be formed by an additional process after the completion of the LSI process. When the thin film 8b is made of a ferromagnetic material, its characteristics change when exposed to high temperatures. However, by forming the thin film 8b by the additional process, the thin film 8b does not need to receive the heat history due to the LSI process, so that the characteristics when the thin film 8b is formed alone can be maintained. Although the present embodiment has been described using an example in which the inductor element 35 is formed on the element isolation insulating film 2 for electrically isolating the active element, other elements such as a resistance element may be formed on the element isolation insulating film 2. A similar effect can be obtained when a passive element is formed.

(Third Embodiment) FIG. 6 is a sectional view of a semiconductor device according to a third embodiment of the present invention. 6, the same parts as those in FIG. 1 are denoted by the same reference numerals, and the description thereof will be appropriately omitted. FIG. 6 shows a P-type MOS transistor 10 and an N-type MOS transistor 10 on an SOI substrate having a three-layer structure including a silicon substrate (semiconductor substrate) 41, a buried oxide film layer (insulator layer) 42, and an active silicon layer (semiconductor layer). An example in which the present invention is applied to a semiconductor device in which a CMOS including a MOS transistor 20 is manufactured is shown.

In a semiconductor device using an SOI substrate, a buried oxide film (4
2) It has a certain structure. Therefore, even when the silicon substrate 41 is etched using the buried oxide film (42) as a stopper as in the first embodiment, the opening 41a can be formed in an arbitrary region of the silicon substrate 41. Therefore, the silicon substrate 41, which was the noise propagation path,
Not only the element isolation region (or circuit element isolation region) shown in FIG. 1 and the passive element formation region shown in FIG. 2, but also any region including the element formation region of active elements such as MOS transistors 10 and 20. , The crosstalk can be effectively suppressed.

Further, the opening 41a of the silicon substrate 41
By disposing the thin film 8d having a function of shielding electromagnetic waves in a desired region in the semiconductor device, it is possible to suppress leakage of electromagnetic waves serving as noise to the outside of the semiconductor device.

Next, a method of manufacturing the semiconductor device shown in FIG. 6 will be briefly described. 7 and 8 are cross-sectional views showing main steps in manufacturing this semiconductor device. First,
As shown in FIG. 7A, a silicon substrate 41, a buried oxide film layer 42 formed on the silicon substrate 41,
An SOI substrate including an active silicon layer 43 formed on the buried oxide film layer 42 is prepared. In order to manufacture this SOI substrate, SIMOX (Separation by SIMOX) in which oxygen is implanted into a silicon substrate to form a buried oxide film layer 42 is performed.
IMplanted OXygen) technology may be used, or SBD (Silicon Direct Bondi) for bonding two silicon substrates together.
ng) The technique may be used, or other methods may be used.

Next, in the same manner as described with reference to FIG. 2A, MOS transistors 10, 20 and the like are formed in the active silicon layer 43 as shown in FIG. 7B. Next, a silicon oxide film 9 is formed in a desired region on the back surface of the silicon substrate 41 (FIG. 7C). Then, using the silicon oxide film 9 as an etching mask, the silicon substrate 41 is etched until the buried oxide film layer 42 is exposed, thereby forming an opening 41a (FIG. 8).
(A)). Finally, a thin film 8d having a function of shielding electromagnetic waves is formed in an arbitrary region of the exposed buried oxide film 42, and completed (FIG. 8B). The opening 41
For forming the thin film 8a and the thin film 8d, any of the methods described in the first embodiment may be used.

(Fourth Embodiment) FIG. 9 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention. 9, the same parts as those of FIG. 1 are denoted by the same reference numerals, and the description thereof will be appropriately omitted. As described above, since a soft magnetic thin film such as an amorphous thin film retains a large imaginary term relative permeability up to a high frequency band of GHz, an electromagnetic wave shielding effect in this band is large. On the other hand, since the soft magnetic thin film has a large uniaxial magnetic anisotropy, the relative magnetic permeability in the direction of the hard axis is large, but the relative magnetic permeability in the direction of the easy axis perpendicular thereto is small. Therefore, in FIGS.
When a soft magnetic thin film having uniaxial magnetic anisotropy is used as 8d, it becomes difficult to effectively shield high-frequency electromagnetic waves that propagate radially.

Therefore, soft magnetic thin films having different easy axis directions of magnetization in the film plane are multilayered and arranged in the opening 1a. As shown in FIG. 9, when the thin film 8e disposed in the opening 1a has a two-layer structure including a first soft magnetic thin film 8e1 and a second soft magnetic thin film 8e2, each thin film 8e1,
It is desirable that the direction of the axis of easy magnetization in the film plane of 8e2 is shifted by 90 °. The thin film 8e may have a multilayer structure of three or more layers. The thin film 8e has an n-layer structure (n
Is an integer of 2 or more), it is desirable that the directions of easy axes of magnetization in the film planes of the respective layers are shifted by 180 ° / 2 ⁿ⁻¹ .

By forming the soft magnetic thin film having uniaxial magnetic anisotropy into a multilayer as described above, a high relative magnetic permeability can be obtained in all directions in a high frequency band. Therefore, electromagnetic waves in a direction that is not absorbed by a certain layer are also absorbed by another layer, so that high-frequency electromagnetic waves that propagate radially can be effectively shielded.

Although not shown in FIG. 9, an insulating layer such as a silicon oxide film may be formed between the soft magnetic thin films 8e1 and 8e2. When heated to a high temperature in a configuration in which the soft magnetic thin films 8e1 and 8e2 are in contact, each of the thin films 8e1 and 8e2
This is because 8e2 may affect each other to change the direction of the easy axis of magnetization. However, as long as no heat treatment is performed, the same characteristics can be obtained regardless of the presence or absence of the insulating layer. Although not shown in FIG. 9, a silicon oxide film or the like may be formed as a protective layer so as to cover the thin film 8e. Thereby, evaporation of the thin film material and intrusion of impurities can be prevented. Also, the thin film 8e shown in FIG.
May be applied to the semiconductor device shown in FIG.

FIG. 10 shows the multilayer soft magnetic thin film 8e shown in FIG.
1 is a cross-sectional view schematically showing a film forming apparatus for forming a film. FIG. 11 is a sectional view of an essential part taken along line XI-XI 'in FIG. The film forming apparatus 50 shown in FIG. 10 is configured by adding a pair of magnets 57a and 57b to a normal sputtering apparatus. Each of the magnets 57a and 57b is for giving uniaxial magnetic anisotropy to each layer of the thin film 8e, so that a magnetic field H in a direction parallel to the surface of the silicon substrate 1 on which the thin film 8e is formed is uniformly generated. It is arranged on each side of the silicon substrate 1. In FIG. 10, the magnets 57a and 57b are
4, but may be installed inside the vacuum vessel 54 as long as the sputtered target atoms (or molecules) are prevented from adhering to the magnets 57a and 57b.

The magnetic field H applied to the silicon substrate 1
Each magnet 57a, 57b can be rotated as shown in FIG.
As shown in (A) and (B), the structure is rotatable around the silicon substrate 1. Alternatively, the substrate table 51 for mounting the silicon substrate 1 may be configured to be rotatable.

Next, a method of manufacturing the semiconductor device shown in FIG. 9 using the film forming apparatus 50 shown in FIG. 10 will be described.
Here, a case where a CoFeSiB-based amorphous thin film is formed as the thin film 8e will be described. First, after the MOS transistors 10 and 20 are formed, the substrate (see FIG. 3A) in which the opening 1a is formed in the silicon substrate 1 is placed inside the vacuum container 54 with the surface on which the opening 1a is formed facing upward. Is set on the substrate table 51. Next, a mask (not shown) having a hole in a region where the thin film 8e is to be formed is placed on the silicon substrate 1.
Put on the back side of the.

Next, air is exhausted from the exhaust port 55 by a vacuum pump, and the degree of vacuum in the vacuum vessel 54 is reduced to 2 × 10 ⁻⁷ To.
rr. Subsequently, Ar gas is supplied through the inlet 56 for 10 S.
By introducing CCM (Standard Cubic Centimeter per Minute), the degree of vacuum in the vacuum vessel 54 is set to 4 × 10 ⁻³ Torr. In this state, a negative potential is applied to the substrate table 51, and the RF output of the high-frequency power supply 53 is sputter-etched at a low output of about 1 W / cm ² to clean the surface of the element isolation insulating film 2.

Next, when the composition is Co ₈₀ Fe ₅ Si ₈ B ₇ (at
%), And the target 52 is prepared.
To the high frequency power supply 53
Sputtering with an output of about 3 W / cm ²
Soft magnetic thin film 8e made of CoFeSiB in opening 1a
1 is deposited on the order of 0.3 μm. At this time, the magnets 57a,
57b are arranged as shown in FIG. 11A, and a first magnetic field H1 in the direction shown by the arrow is applied. That is, the soft magnetic thin film 8e1 is formed while the magnetic field H1 having a parallel component is applied to the exposed surface of the element isolation insulating film 2.

Next, while maintaining the degree of vacuum in the vacuum chamber 54, the magnets 57a and 57b are rotated by 90 ° about the silicon substrate 1 and arranged as shown in FIG.
Then, sputtering is performed again in the second magnetic field H2 in a direction orthogonal to the magnetic field H1, and the soft magnetic thin film 8e2 is deposited on the soft magnetic thin film 8e1 by about 0.3 μm. That is,
The soft magnetic thin film 8e2 is formed while applying a magnetic field H2 having a direction parallel to the magnetic field H1 and a component parallel to the exposed surface of the element isolation insulating film 2. This makes it possible to form a two-layer structure of the soft magnetic thin films 8e1 and 8e2 whose easy axis directions differ by 90 °.

Finally, a protective layer is formed by depositing SiO ₂ so as to cover the multilayer soft magnetic thin film 8e composed of the soft magnetic thin films 8e1 and 8e2. The specific resistance of the thin film 8e thus formed is about 120 μΩcm, and has a specific resistance that is at least one digit greater than that of copper or aluminum.

The process shown here is an example of a method of forming the thin film 8e, and the present embodiment is not limited to the numerical values given here. When the composition of the thin film 8e is an oxide, the film is formed at a gas flow ratio of Ar: O ₂ = 10: 2. Also, needless to say, the method of forming the opening 1a and the method of forming the thin film 8e described here are described with reference to FIGS.
Can be applied to the semiconductor device shown in FIG.

(Fifth Embodiment) FIGS. 12 and 13
FIG. 14 is a block diagram for explaining a fifth embodiment of the semiconductor device according to the present invention. For example, an LSI including an A / D mixed circuit including an analog circuit 61, an A / D converter 62, and a digital processing unit 63 as shown in FIG.
Is formed on a silicon substrate, when the operating frequency increases, the analog circuit 61 and the digital processing unit 6
As shown by arrows 85 and 86, operation signals and electromagnetic waves that become noise leak from each of 3 to the silicon substrate, and crosstalk occurs between the analog circuit 61 and the digital processing unit 63.

Therefore, as shown by a dotted line 64 in FIG. 12B, by applying the present invention to the digital processing unit 64, the operation signal of the digital processing unit 63 leaks and propagates in the silicon substrate. Can be suppressed. FIG. 12 (A)
Is formed on the silicon substrate 1 as shown in FIG. 2A, a portion corresponding to the element isolation insulating film 2 between the analog circuit 61 and the digital processing section 63 is formed. The opening 1a is formed as shown in FIG. Here, the opening 1a is not only an area separating the analog circuit 61 and the digital processing unit 63, but also a digital circuit 6a.
3 may be formed in a groove shape in a region surrounding the groove 3. Further, a thin film 8a having an action of shielding electromagnetic waves may be arranged in the opening 1a.

As a result, the noise propagation path indicated by the arrow 86 can be cut off, so that the digital signal can be prevented from being mixed into the analog circuit 61 as noise. As a result, the S / N ratio of the analog circuit 61 can be improved. FIG.
The LSI shown in FIG. 7A has an SO as shown in FIG.
When formed on the I substrate, the digital processing unit 6
Since the silicon substrate 41 in the entire region where 3 is formed can be removed, further effects can be obtained.

As shown by a dotted line 65 in FIG. 12C, by applying the present invention to the analog circuit 61,
It is possible to prevent the carrier signal and the harmonic signal of the analog circuit 61 from leaking and propagating through the silicon substrate. When the LSI shown in FIG. 12A is formed on the silicon substrate 1 as shown in FIG.
As in the case of (B), the area separating the analog circuit 61 and the digital processing unit 63 or the analog circuit 61
The opening 1a is formed in a region surrounding. The opening 1a
A thin film 8a having a function of shielding electromagnetic waves may be arranged in the inside.

As a result, the propagation path of the noise indicated by the arrow 85 can be cut off, so that it is possible to prevent the antenna signal from being mixed as noise into the digital processing section 63, so that malfunction of the digital processing section 63 can be suppressed. FIG.
When the LSI shown in FIG. 3A is formed on an SOI substrate, the silicon substrate 41 in the entire region where the analog circuit 61 is formed can be removed, so that a further effect can be obtained.

An LSI including a plurality of analog circuits
Is formed on a silicon substrate, crosstalk may occur between analog circuits when the operating frequency is increased. For example, in a circuit including an oscillator 71, a low-noise amplifier 72, and a mixer 73 as shown in FIG. 13A, a signal or electromagnetic wave leaked from the oscillator 71 propagates through a silicon substrate as indicated by an arrow 87 and the low-noise amplifier 72, which causes deterioration of the S / N ratio of the low noise amplifier 72.

Therefore, the present invention is applied to a low noise amplifier 72 as shown by a dotted line 74 in FIG. FIG.
When the circuit shown in FIG. 2A is formed on the silicon substrate 1 as shown in FIG. 2A, the oscillator 71 and the low-noise amplifier 72 are provided as in the case of FIG. Is formed in a region separating the low noise amplifier 72 or a region surrounding the low noise amplifier 72. Further, a thin film 8a having an action of shielding electromagnetic waves may be arranged in the opening 1a.

As a result, the noise propagation path indicated by the arrow 87 can be cut off, so that the noise can be prevented from entering the low-noise amplifier 72. Therefore, the S / N of the low noise amplifier 72
The ratio can be improved, and the operation of the entire circuit can be stabilized. In the case where the circuit shown in FIG. 13A is formed on an SOI substrate, the silicon substrate 41 in the entire region where the low noise amplifier 72 is formed can be removed, so that a further effect can be obtained. .

[0066]

As described above, according to the present invention,
By removing a predetermined region of the substrate on which elements are formed, a path where crosstalk occurs can be cut off, so that crosstalk between elements and between circuit elements can be suppressed. This makes it possible to improve the S / N ratio in circuit characteristics, stabilize circuit operation, and suppress circuit malfunction. Further, by disposing a member that shields electromagnetic waves in the opening of the substrate, it is possible to prevent the electromagnetic waves radiated from the element from leaking out of the semiconductor device. Here, by forming this member into a multilayer structure of soft magnetic thin films in which the direction of the axis of easy magnetization differs in each layer, high-frequency electromagnetic waves can be effectively shielded without depending on the radiation direction.

[Brief description of the drawings]

FIG. 1 is a sectional view of a first embodiment of a semiconductor device according to the present invention.

FIG. 2 is a cross-sectional view showing main steps in manufacturing the semiconductor device shown in FIG.

FIG. 3 is a cross-sectional view showing a step that follows the step of FIG. 2;

FIG. 4 is a conceptual diagram showing a cross section of a second embodiment of the semiconductor device according to the present invention.

FIG. 5 is a perspective view showing a planar shape of the inductor element shown in FIG. 4;

FIG. 6 is a sectional view of a semiconductor device according to a third embodiment of the present invention.

FIG. 7 is a cross-sectional view showing main steps in manufacturing the semiconductor device shown in FIG.

FIG. 8 is a cross-sectional view showing a step that follows the step of FIG. 7;

FIG. 9 is a sectional view of a semiconductor device according to a fourth embodiment of the present invention.

10 is a cross-sectional view schematically showing an apparatus for forming the multilayer soft magnetic thin film shown in FIG.

11 is a cross-sectional view of a main part taken along line XI-XI 'in FIG.

FIG. 12 is a sectional view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 13 is a sectional view of a semiconductor device according to a fifth embodiment of the present invention.

FIG. 14 is a cross-sectional view illustrating a conventional method for suppressing crosstalk between active elements.

FIG. 15 is a cross-sectional view illustrating a conventional method for suppressing crosstalk between passive elements.

[Explanation of symbols]

1,41: silicon substrate, 1a, 7a to 7c, 9a, 4
1a opening, 2 element isolation insulating film, 3, 6 interlayer insulating film, 4a-4d, 32, 34 contact, 5a-5
c, 31, 33, 36... wiring, 8a to 8e, 8a ', 8
e1, 8e2: thin film, 9: silicon oxide film, 10, 20
... MOS transistor, 11 N well, 35 inductor element, 42 buried oxide film layer, 43 active silicon layer, 50 film forming apparatus, 51 substrate stand, 52 target, 53 high frequency power supply, 54 vacuum Container, 55: exhaust port, 56: intake port, 57a, 57b: magnet, 61: analog circuit, 62: A / D converter, 63: digital processing unit, 71: oscillator, 72: low noise amplifier, 73: mixer .

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Mitsuru Harada 3-19-2 Nishi-Shinjuku, Shinjuku-ku, Tokyo Japan Telegraph and Telephone Corporation (72) Inventor Tsuneo Tsukahara 3-2-1, Nishishinjuku, Shinjuku-ku, Tokyo No. Nippon Telegraph and Telephone Corporation (72) Inventor Eiji Sugawara 6-7-1, Koriyama, Taishiro-ku, Sendai City, Miyagi Prefecture Tokinnai Co., Ltd. (72) Hideo Suzuki 6-7, Koriyama, Tashiro-ku, Sendai City, Miyagi Prefecture No. 1 Tokinnai Co., Ltd. (72) Inventor Masahiro Sato 6-7-1, Koriyama, Taishiro-ku, Sendai-shi, Miyagi F-term (reference) 5F032 AA09 AA12 AC02 BB00 CA14 CA17 CA20 5F048 AA04 AC01 AC03 AC10 BA09 BG11 BG12

Claims (11)

[Claims] 1. A semiconductor device having a plurality of elements formed on a semiconductor substrate, comprising: an element isolation insulating film formed between the elements and electrically insulating and isolating the elements; An opening formed by removing a corresponding portion of the semiconductor substrate. 2. The device according to claim 1, wherein an A / D mixed circuit including an analog circuit and a digital circuit is formed by each of the elements, and the opening is configured to separate the element between the analog circuit and the digital circuit. A semiconductor device formed in a portion corresponding to an insulating film. 3. The device according to claim 1, wherein a plurality of analog circuits are formed by the respective elements, and the opening is formed in a portion corresponding to the element isolation insulating film between the analog circuits. Semiconductor device. 4. An SOI substrate having at least three layers of a semiconductor substrate, an insulator layer formed on the semiconductor substrate, and a semiconductor layer formed on the insulator layer, wherein a plurality of elements are provided in the semiconductor layer. A semiconductor device, comprising: an opening formed by removing a portion of the semiconductor substrate corresponding to at least one of an element formation region and an element isolation region of the semiconductor layer. 5. The device according to claim 4, wherein each of the elements forms an A / D mixed circuit including an analog circuit and a digital circuit, and the element formation region is a region where the digital circuit is formed. A semiconductor device, wherein the separation region is a region between the analog circuit and the digital circuit. 6. The device according to claim 4, wherein an A / D mixed circuit including an analog circuit and a digital circuit is formed by each of the elements, the element formation region is a region where the analog circuit is formed, A semiconductor device, wherein the separation region is a region between the analog circuit and the digital circuit. 7. The device according to claim 4, wherein a plurality of analog circuits are formed by the respective elements, the element formation region is a region in which at least one analog circuit is formed, and the inter-element region is A semiconductor device, which is a region between analog circuits. 8. The semiconductor device according to claim 1, further comprising: a member that shields an electromagnetic wave disposed in the opening without contacting the semiconductor substrate. 9. The soft magnetic thin film according to claim 8, wherein the member for shielding the electromagnetic wave has a multilayer structure of a soft magnetic thin film having uniaxial magnetic anisotropy, and each layer has an easy magnetization in a plane of the soft magnetic thin film. A semiconductor device having different axial directions. 10. A first step of forming a plurality of elements on a front surface of a semiconductor substrate and an element isolation insulating film for electrically insulating and separating the elements from each other; A second step of removing a portion of the semiconductor substrate corresponding to the element isolation insulating film until the element isolation insulating film is exposed from a surface; and a second step having a component parallel to the exposed surface of the element isolation insulating film. A third step of forming a first soft magnetic thin film on a predetermined region of the exposed surface of the element isolation insulating film while applying the magnetic field of 1 to the exposed surface of the element isolation insulating film; And a fourth step of forming a second soft magnetic thin film on the first soft magnetic thin film while applying a second magnetic field having a parallel component different from the first magnetic field. Semiconductor device manufacturing method. 11. An SOI substrate having at least three layers of a semiconductor substrate, an insulator layer formed on the semiconductor substrate, and a semiconductor layer formed on the insulator layer, wherein a plurality of elements are formed in the semiconductor layer. A second step of removing a predetermined region of the semiconductor substrate until the insulator layer is exposed; and a first step having a component parallel to an exposed surface of the insulator layer. A third step of forming a first soft magnetic thin film on a predetermined region of the exposed surface of the insulator layer while applying a magnetic field of A fourth step of forming a second soft magnetic thin film on the first soft magnetic thin film while applying a second magnetic field having a parallel component different from that of the first magnetic field. Manufacturing method.