JP2000323500A - Field-effect semiconductor device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a high output characteristic with a Schottky barrier kept high by optimizing an initial film thickness of a gate electrode and maintain high frequency characteristics by suppressing the parasitic capacitance from increasing due to the gate electrode burying effect. SOLUTION: A gate electrode with a lowermost Pt layer is formed on a barrier layer (nondoped AlGaAs) 17, the (initial) film thickness of the lowermost Pt layer before solid-phase diffusion is set to 2 to 5 nm, the gate electrode is heat treated at 250 to 400 deg.C to mutually diffuse Pt in the lowermost layer and GaAs in the barrier layer 17, thereby obtaining a buried gate structure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a field-effect semiconductor device and a method of manufacturing the same, and more particularly, to a field-effect semiconductor device having a buried gate structure and a method of manufacturing the semiconductor device.

[0002]

2. Description of the Related Art Field-effect transistors (hereinafter referred to as FETs)
In order to improve the characteristics, various structures and improvement methods have been proposed, among which are miniaturization of a gate electrode and a buried gate structure.

(Miniaturization of Gate Electrode) As a field-effect transistor capable of high-frequency operation, a GaAs FET has been put to practical use. As one indication of the high-speed operation of the FET, the cut-off frequency f _T is used.
This cutoff frequency f _T is approximately It is expressed as Here, gm is the mutual conductance of the FET, Cgs is the gate-source capacitance, Vsat is the electron saturation speed, and Lg is the gate length.

[0004] As can be seen from the equation representing the cutoff frequency f _T, in order to improve the cutoff frequency f _T is the gate-source capacitance Cg by shortening the gate length Lg
It is necessary to reduce s and increase the transconductance. Therefore, in order to increase the cutoff frequency f _T , it is most effective to reduce the gate length Lg by miniaturizing the gate electrode, and a GaAs FET having a sub-micron gate electrode is realized.

(Embedded Gate Structure) On the other hand, in order to obtain high output characteristics of the FET, a large drain current needs to be passed, which requires a high gate forward voltage. Therefore, as a Schottky electrode material of the gate electrode,
Pt has been used instead of Ti and Al which have been widely used in the past. When, for example, Ti is used as the Schottky electrode material, the Schottky barrier height for the GaAs semiconductor layer is about 0.7 eV,
At t, a high Schottky barrier of about 0.9 eV is obtained. As a result, the gate current decreases with the forward voltage, so that the gate bias voltage when Pt is used for the gate electrode is about 0.8 V with respect to the GaAs semiconductor layer,
The voltage is about 1.1 V with respect to the As semiconductor layer, and operation up to a high gate bias voltage is possible.

[0006] Further, as shown in FIG.
When the semiconductor layer 1 is provided with the gate electrode 3 whose lowermost layer is the Pt layer 2, Pt (Pt layer 2) and GaAs (GaAs
The semiconductor layer 1) undergoes a solid phase diffusion reaction with each other by a thermal reaction, and Pt is formed on the lowermost layer of the gate electrode 3 as shown in FIG.
And a GaAs compound (Pt-GaAs compound 4) are formed, and a good Schottky junction is obtained between the Pt-GaAs compound 4 and the GaAs semiconductor layer 1. Furthermore, P
When the t layer 2 and the GaAs semiconductor layer 1 react, P
t diffuses into the GaAs semiconductor layer 1 to form Pt-GaAs
Since the s compound 4 is formed, the Schottky junction surface 5 is formed at a position deeper than the surface of the GaAs semiconductor layer 1 as shown in FIG. Therefore, the lowermost layer is Pt-
The gate electrode 3 made of the GaAs compound 4 has a structure embedded in the GaAs semiconductor layer 1 and is called an embedded gate structure.

The burying effect in such a buried gate structure largely depends on the film thickness (initial film thickness t) of the Pt layer 2 formed on the GaAs semiconductor layer 1 before the solid phase diffusion reaction. The larger the initial thickness t, the larger the buried amount d of the gate electrode 3. For example, Pt layer 2
When the initial film thickness t is 10 nm, the same effect as that of the embedded electrode having a depth of about 20 nm can be obtained.

Therefore, in the buried gate structure using Pt, a higher Schottky barrier can be obtained than in the conventional gate structure using Ti or Al, and high output characteristics can be obtained.

[0009]

However, in the buried gate structure as described above, the depletion layer expands more than in the conventional gate structure. FIG. 2A is a view showing that the expansion of the depletion layer 6 is increased by the buried gate structure (the surface depletion layer is omitted), and FIG.
Shows the conventional gate structure and the expansion of the depletion layer 6 for comparison (the surface depletion layer is omitted). FIGS. 2A and 2B
As shown in FIG. 5, in the buried gate structure, the depletion layer 6 expands more than in the conventional gate structure,
And the distance between the source electrode 7 and the drain electrode 8 becomes shorter,
In particular, the parasitic capacitance (gate fringing capacitance) on the side surface of the gate electrode 3 increases, and as a result, the high-frequency characteristics of the FET deteriorate.

[0010] Generally, as mentioned earlier, the FE is reduced by reducing the gate length and miniaturizing the gate electrode.
The cutoff frequency fT of _T can be improved. However, in the case of an FET having a buried gate structure, as the gate length becomes shorter, the increase in gate fringing capacitance between the gate and the source becomes relatively large, so that high-frequency characteristics deteriorate remarkably. cut-off frequency f _T also does not improve.

The present invention has been made in view of the above-mentioned drawbacks of the prior art, and has as its object to optimize the initial film thickness of a Schottky electrode in a field-effect semiconductor device having a buried electrode structure. By doing so, high output characteristics can be obtained by maintaining the height of the Schottky barrier, and high-frequency characteristics can be maintained by suppressing an increase in parasitic capacitance due to the burying effect of the Schottky electrode. is there.

[0012]

A field-effect semiconductor device according to claim 1, comprising a Schottky electrode buried deeper than the surface of the compound semiconductor layer by solid-phase diffusion into the compound semiconductor layer. The thickness of the lowermost layer of the Schottky electrode before solid phase diffusion is larger than the minimum thickness necessary to substantially maintain the saturation value of the Schottky barrier height, and It is characterized by being in the vicinity.

In the field effect type semiconductor device according to the first aspect of the present invention, the lowermost layer of the Schottky electrode is set to a substantially minimum necessary film thickness for maintaining the Schottky height. The increase in the gate parasitic capacitance due to the burying effect can be suppressed, and the high frequency characteristics are not impaired.

Therefore, as in the field effect type semiconductor device according to the first aspect, the thickness of the lowermost layer of the Schottky electrode is
If the film thickness before the solid phase diffusion is set to be larger than the minimum film thickness necessary to substantially maintain the saturation value of the Schottky barrier height and close to the minimum film thickness, the Schottky barrier The height and the cut-off frequency can be increased, and a buried-type field-effect semiconductor device with high output and good high-frequency characteristics can be manufactured.

According to a second aspect of the present invention, there is provided a field effect type semiconductor device having a Schottky electrode which is buried deeper than the surface of the compound semiconductor layer by solid phase diffusion into the compound semiconductor layer. The film thickness of the lowermost layer of the Schottky electrode before solid phase diffusion is thicker than the minimum film thickness required to substantially maintain the saturation value of the Schottky barrier height, and substantially maintains the saturation value of the cutoff frequency It is characterized in that it is thinner than the maximum film thickness necessary for the operation.

According to the experimental observations made by the inventors, when the initial thickness of the lowermost layer of the Schottky electrode is reduced, there is a minimum thickness at which the Schottky barrier is suddenly reduced. It was found that when the initial film thickness was increased, there was a maximum film thickness at which the cut-off frequency suddenly decreased, and the maximum initial film thickness at which the cut-off frequency decreased was higher than the minimum initial film thickness at which the Schottky barrier decreased. .

Therefore, according to the field effect semiconductor device of the second aspect, the height of the Schottky barrier can be increased and the cutoff frequency can be increased. Type field-effect semiconductor device.

According to a third aspect of the present invention, in the field effect type semiconductor device according to the first or second aspect, the lowermost layer of the Schottky electrode has a thickness of 2 nm or more before solid phase diffusion. It is characterized in that it is 5 nm or less.

According to experiments, when the initial film thickness of the lowermost layer of the Schottky electrode is smaller than 2 nm, the Schottky barrier is suddenly reduced. When the initial film thickness of the lowermost layer of the Schottky electrode is larger than 5 nm, The cutoff frequency suddenly dropped. Therefore, the thickness of the lowermost layer of the Schottky electrode is set to 2 nm.
By setting the thickness to 5 nm or less, the first or second aspect can be satisfied, and a field-effect semiconductor device having good high-output characteristics and without deteriorating high-frequency characteristics can be manufactured.

According to a fourth aspect of the present invention, there is provided a field effect type semiconductor device according to the first, second or third aspect, wherein M is formed on the lowermost layer of the Schottky electrode.
It is characterized by having a diffusion barrier layer of o, Cr, Ti, W, Ta and the like.

In the field effect type semiconductor device according to the fourth aspect, since the diffusion barrier layer is provided on the lowermost layer of the Schottky electrode, the compound semiconductor is formed on the surface side of the Schottky electrode by the diffusion barrier layer. Can be prevented.

According to a fifth aspect of the present invention, in the method of manufacturing a field-effect semiconductor device, the thickness of the lowermost layer before the solid phase diffusion is smaller than the minimum thickness required to substantially maintain the saturation value of the Schottky barrier height. Thick, and a Schottky electrode near the minimum thickness is provided on the surface of the compound semiconductor layer, and the Schottky electrode is heat-treated at 250 ° C. or more and 400 ° C. or less, so that the lowermost layer of the Schottky electrode is It is characterized by solid-phase diffusion into the semiconductor layer.

According to a fifth aspect of the present invention, there is provided a method of manufacturing a field effect type semiconductor device, which clarifies heat treatment conditions of a Schottky electrode for manufacturing the above field effect type semiconductor device. Temperature is 250 ℃ or more and 400 ℃
The following is desirable. If the heat treatment temperature is 250 ° C. or lower, the diffusion between the lowermost layer of the Schottky electrode and the compound semiconductor becomes insufficient, and the characteristics may change over time.
On the other hand, if the heat treatment temperature is 400 ° C. or more, the ohmic electrode formed earlier than the Schottky electrode may be deteriorated.

[0024]

FIG. 3 is a conceptual sectional view showing an embodiment of the present invention, and is a double hetero GaAs HEMT.
(High electron mobility transistor) 11 is shown. FIGS. 4A to 4G schematically show the manufacturing steps. In the following, the GaAs HEMT 11
By explaining the manufacturing method, the structure is also clarified.

In manufacturing the GaAs HEMT 11, first, as shown in FIG.
A buffer layer 13 made of undoped AlGaAs or undoped GaAs on a substrate 12, n-type AlGaAs
Electron supply layer 14 of non-doped InGaAs
s channel layer 15, second electron supply layer 16 made of n-type AlGaAs, barrier layer 17 made of non-doped AlGaAs, contact layer 18 made of n-type GaAs
Are sequentially epitaxially grown. After stacking these epitaxial growth layers, element isolation is performed. Then
As shown in FIG. 4B, a source electrode 19 and a drain electrode 20 are formed on the contact layer 18 using an AuGe-based metal by using a photolithography technique.

Next, as shown in FIG. 4C, the contact layer 18 is formed from above the source electrode 19 and the drain electrode 20.
A resist film 21 is formed by applying a resist on the surface of
An opening 22 having an opening width of 0.2 μm or less is formed in the resist film 21 between the source electrode 19 and the drain electrode 20. Using the resist film 21 as a mask, the contact layer 1
8 is partially removed by etching to expose the barrier layer 17 from the opening 23 of the contact layer 18 as shown in FIG.

Next, after removing the resist film 21,
As shown in FIG. 5E, another resist film 24 is formed, and an opening 25 is provided in the resist film 24 to form a barrier layer 17.
Only the gate electrode formation region is exposed. Then, the Pt layer is used as the lowermost layer by, for example,
Layer, a Ti layer, a Pt layer, and an Au layer are sequentially deposited, and FIG.
A metal layer 26 for a gate electrode as shown in FIG. Specifically, the initial thickness of the lowermost Pt layer is set to 2 nm or more and 5 n or more.
m, a Mo layer, a Ti layer, an upper Pt layer,
The Au layers were 5 nm, 50 nm, 20 nm, and 500 nm, respectively.
Deposit in nm. Here, the lowermost Pt layer has a function as a solid-phase diffusion source, the Mo layer, the Ti layer, and the upper Pt layer each have a diffusion preventing function, and the uppermost Au layer lowers the gate electrode. It is provided for resistance.

As shown in FIG. 5G, the gate electrode 27 is patterned by removing the unnecessary gate electrode metal layer 26 and the resist film 24 by a lift-off method.
Heat treatment is performed at a temperature of not less than 400 ° C. and not less than 400 ° C. As an example, in the case of the gate electrode 27 in which the initial film thickness of the lowermost Pt layer is 2 nm, heat treatment is performed at 350 ° C. for 10 minutes. By this heat treatment, a buried gate structure as shown in FIG. 3 is formed by the diffusion effect of the lowermost Pt layer of the gate electrode 27 and GaAs of the barrier layer 17. Then, a high Schottky barrier can be obtained by a Schottky junction formed by interdiffusion between the barrier layer 17 which is a high resistance layer and Pt. In addition, this heat treatment promotes the diffusion of Pt and GaAs, and at the same time, improves the adhesion between the lowermost Pt layer and the substrate to obtain stable characteristics and mechanical strength.

Next, the device characteristics of the buried GaAs HEMT 11 having Pt as the lowermost layer will be described.
The gate length Lg is 0.4 μm to 0.15 μm (gate width Wg
= 200 μm, drain voltage Vd = 4V)
The relationship between the initial thickness t and the cut-off frequency f _T of t layer shown in FIG. According to FIG. 6, even in an element having substantially the same value of the transconductance gm, the cut-off frequency f _T decreases as the Pt film thickness increases, especially when the initial film thickness t of the lowermost Pt layer is 5 nm or more. The cutoff frequency f _T has dropped from its saturation value. Further, the influence becomes larger as the gate length becomes shorter. This is because, as the initial thickness t of the lowermost Pt layer increases, the amount of the diffusion filling increases, and as a result, the gate fringing capacitance relatively increases.

Further, in the gate electrode of the gate length is 0.15 [mu] m, illustrating the relationship between the initial thickness t and the Schottky barrier height phi _B of the lowermost Pt layer in FIG. The Schottky barrier height φ _B was determined from the Schottky forward current of the device. According to FIG. 7, the initial film thickness t of the lowermost Pt layer is shown.
Up to about 2 nm, a large value of the Schottky barrier height φ
It is possible to obtain _B (saturation value of the Schottky barrier height phi _B), but it can be seen that the ineffectiveness of the thinner the Pt barrier than 1 nm.

Therefore, in a gate electrode having a gate length of 0.3 μm or less, the initial thickness t of the lowermost Pt layer is 2 nm.
At a thickness of 5 nm or less, a high Schottky barrier can be obtained without increasing the gate fringing capacity.

As it is apparent from FIGS. 6 and 7, thicker than the minimum thickness required to initial film thickness of the gate electrode lowermost Pt layer is substantially maintain saturation value of the Schottky barrier height phi _B In addition, in the vicinity of the minimum film thickness, there is a region where the cutoff frequency f _T is substantially maintained at its saturation value. Therefore, by setting the initial film thickness of the lowermost Pt layer to the region, the high frequency characteristics can be improved. Without deteriorating the FET, high output characteristics can be obtained, and excellent FET characteristics can be obtained.
In particular, by setting the initial film thickness of the lowermost Pt layer to 2 nm to 5 nm, it can be set in this region. Also, the effect is larger as the gate length is shorter, as shown in FIG.
As shown in FIG.

In this embodiment, the GaAs HEMT is used.
However, other structures such as MES
Similar effects can be obtained in the FET and doped channel HFET structures.

In the above embodiment, the reason why the heat treatment temperature of the gate electrode is 250 ° C. or more and 400 ° C. or less is that when the heat treatment temperature is 250 ° C. or less, the diffusion of Pt and GaAs becomes insufficient, and the characteristics are deteriorated with time. This is because it may change. If the heat treatment temperature is 400 ° C. or higher, the source electrode and the drain electrode may be deteriorated.

Further, in the above embodiment, the Mo layer and the Ti layer are used as diffusion barrier layers for preventing GaAs from diffusing from the substrate side to the surface side of the gate electrode and increasing the resistance of the Au layer. However, other than this, a Cr layer, a W layer, a Ta layer, or the like can be used as the diffusion barrier layer.

[0036]

According to the field effect type semiconductor device of the present invention, the film thickness of the lowermost layer of the Schottky electrode is substantially equal to the saturation value of the Schottky barrier height before the solid phase diffusion. Since the thickness is set to be thicker than the minimum film thickness necessary for maintaining and close to the minimum film thickness, the Schottky barrier height can be increased, and the cutoff frequency can be increased. A field-effect semiconductor device having a buried electrode structure with high output and good high-frequency characteristics can be manufactured.

According to the field effect type semiconductor device of the present invention, the thickness of the lowermost layer of the Schottky electrode and the thickness before solid phase diffusion substantially maintain the saturation value of the height of the Schottky barrier. The thickness is larger than the minimum thickness required for this purpose, and it is smaller than the maximum thickness required to almost maintain the saturation value of the cutoff frequency, so the Schottky barrier height is increased and the cutoff frequency is also increased. Thus, a field-effect semiconductor device having a buried electrode structure with high output and good high-frequency characteristics can be manufactured.

According to the field effect type semiconductor device of the third aspect, since the lowermost layer of the Schottky electrode has a thickness of 2 nm or more and 5 nm or less, the first or second aspect can be satisfied. A field-effect semiconductor device having good output characteristics and no deterioration in high-frequency characteristics can be manufactured.

According to the field effect type semiconductor device of the fourth aspect, Mo, C is formed on the lowermost layer of the Schottky electrode.
Since the semiconductor device has the diffusion barrier layer of r, Ti, W, Ta, or the like, the diffusion barrier layer can prevent the compound semiconductor from diffusing to the surface side of the Schottky electrode.

According to the method of manufacturing a field-effect semiconductor device according to the fifth aspect, the Schottky electrode is set at a temperature of 250 ° C. or higher.
By performing the heat treatment at a temperature of 00 ° C. or less, the lowermost layer of the Schottky electrode and the compound semiconductor can be sufficiently diffused, and the device characteristics can be stabilized with time.
The deterioration of the ohmic electrode can be prevented.

[Brief description of the drawings]

FIG. 1A is a GaAs FET having a buried gate structure.
2 is a conceptual cross-sectional view showing the structure of the gate electrode before the diffusion reaction, and FIG. 2B is a conceptual cross-sectional view showing the structure of the gate electrode after the diffusion reaction.

FIG. 2A is a GaAs FET having a buried gate structure.
3A is a conceptual cross-sectional view showing a state of a depletion layer generated near a gate electrode, and FIG. 4B is a conceptual cross-sectional view showing a state of a depletion layer generated near a normal gate electrode.

FIG. 3 shows a double hetero GaAs according to one embodiment of the present invention.
It is a conceptual sectional view showing the structure of sHEMT.

FIGS. 4A to 4D are schematic views showing a manufacturing process of the GaAs HEMT according to the first embodiment.

5 (e) to 5 (g) are continuation diagrams of FIG.

FIG. 6 is a diagram showing a relationship between an initial film thickness of a lowermost Pt layer and a cutoff frequency in a gate electrode having a buried gate structure.

FIG. 7 is a diagram showing a relationship between an initial film thickness of a lowermost Pt layer and a Schottky barrier height in a gate electrode having a buried gate structure.

[Explanation of symbols]

 12 Semi-insulating GaAs substrate 17 Barrier layer 18 Contact layer 19 Source electrode 20 Drain electrode 27 Gate electrode

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M104 AA05 BB06 BB09 BB13 BB14 BB16 BB17 BB18 DD07 DD34 DD68 FF27 GG12 HH05 5F102 GB01 GC01 GD01 GJ05 GK05 GK06 GL04 GM06 GN05 GQ03 GR09 GS02 GT01 HC05 HC11 HC11 HC11

Claims (5)

[Claims] 1. A field effect type semiconductor device having a Schottky electrode buried deeper than the surface of a compound semiconductor layer by solid phase diffusion into the compound semiconductor layer, wherein the lowermost layer of the Schottky electrode is a solid phase. A field-effect-type semiconductor device, wherein the film thickness before diffusion is larger than the minimum film thickness necessary for substantially maintaining the saturation value of the Schottky barrier height, and is close to the minimum film thickness. 2. A field-effect semiconductor device having a Schottky electrode buried deeper than the surface of the compound semiconductor layer by solid-phase diffusion into the compound semiconductor layer, wherein the lowermost layer of the Schottky electrode is a solid phase. The film thickness before diffusion is thicker than the minimum film thickness required to substantially maintain the saturation value of the Schottky barrier height, and smaller than the maximum film thickness required to substantially maintain the saturation value of the cutoff frequency A field effect type semiconductor device characterized by the above-mentioned. 3. The field effect type semiconductor device according to claim 1, wherein a thickness of the lowermost layer of the Schottky electrode before solid phase diffusion is 2 nm or more and 5 nm or less. 4. The electric field according to claim 1, further comprising a diffusion barrier layer made of Mo, Cr, Ti, W, Ta or the like on the lowermost layer of the Schottky electrode. Effect type semiconductor device. 5. A Schottky film having a thickness of a lowermost layer before solid-phase diffusion that is larger than a minimum film thickness necessary for substantially maintaining a saturation value of a Schottky barrier height and near the minimum film thickness. Providing an electrode on the surface of the compound semiconductor layer and subjecting the Schottky electrode to a heat treatment at 250 ° C. or more and 400 ° C. or less, so that the lowermost layer of the Schottky electrode is solid-phase diffused into the compound semiconductor layer. Of manufacturing a semiconductor device.