JP2000315795A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable low-resistance gate wiring using aluminum by preventing damage to a gate electrode due to dilute hydrofluoric acid treatment which is performed for removing any oxide film naturally formed on the surface of a silicon film, in order to enhance reliability of electrical connections between a wiring metal and a source/drain region. SOLUTION: This device has a first gate electrode film 6 made of a material which is insoluble in hydrofluoric acid, a second gate electrode film 7 made of a material which has a lower specific resistance than that of the first gate electrode film 6, a layer insulation film 8, and a wiring metal film 9. Electrical connections between the first gate electrode film 6 and wiring metal film 9, and between the first gate electrode film 6 and second gate electrode film 7, are established. The layer insulation film 8 is used to separate the second gate electrode film 7 from the wiring metal film 9.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device used for an active matrix type liquid crystal display device, etc.
In particular, the present invention relates to a thin film transistor array and a manufacturing method thereof.

[0002]

2. Description of the Related Art In a thin film transistor array used in an active matrix type liquid crystal display device, aluminum is used as a material of a gate electrode in order to prevent a signal delay due to wiring resistance and to realize a large and high definition liquid crystal panel. Is desired.

On the other hand, as shown in FIG. 5, the wiring metal 9 must be connected to the gate electrode 5 and the wiring metal 9 must be connected to the source region or the drain region.
After the opening used for connection is provided in the gate insulating film 4, hydrofluoric acid and water are mixed at a ratio of 1:30 for the purpose of improving the reliability of electrical connection between the wiring metal 9 and the source region or the drain region. It is necessary to remove the natural oxide film on the surface of the silicon film with dilute hydrofluoric acid diluted at a ratio of about 1: 300.

[0004]

In the process of removing the natural oxide film with dilute hydrofluoric acid, the surface of the gate electrode corresponding to the connection point between the wiring metal 9 and the gate electrode 5 also comes into contact with dilute hydrofluoric acid and is dissolved in dilute hydrofluoric acid. Aluminum (500Å / min when diluted hydrofluoric acid is diluted 1: 250 with pure water)
This causes a problem that the neighboring etching rate cannot be used as the material of the gate electrode 5.

An object of the present invention is to realize a semiconductor device suitable for a large, high-definition liquid crystal panel by preventing damage to an aluminum gate electrode due to dilute hydrofluoric acid treatment, using low-resistance aluminum wiring, and preventing wiring delay. With the goal.

[0006]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-described problems, and uses low-resistance aluminum as a gate electrode material and electrically connects a wiring metal to a source region or a drain region. It is an object of the present invention to realize a semiconductor device which is compatible with a dilute hydrofluoric acid treatment for improving connection reliability, prevents signal delay due to wiring resistance, and has high reliability and is suitable for a large-sized and high-definition liquid crystal panel.

For this reason, the following configuration is specifically used.

According to the first aspect of the present invention, a substrate made of non-alkali glass or the like and having a base layer formed on the surface thereof, a substrate formed on (a base layer of) the substrate, and a source region and a drain region formed thereon. At least a portion including a semiconductor film into which impurities are implanted (and naturally subjected to a heat treatment) and a channel region of a semiconductor film for an individual semiconductor element (necessary parts are, of course, individual semiconductor elements as well as the entire surface of the substrate). A first gate electrode film made of a material that is at least partially opposed to the semiconductor film with the gate insulating film interposed therebetween and that is insoluble in hydrofluoric acid; and a specific resistance lower than the first gate electrode film. The second made of material
Having a gate electrode film, an interlayer insulating film, and a wiring metal film,
An electrical connection between the first gate electrode film and the wiring metal film, an electrical connection between the first gate electrode film and the second gate electrode film, and an interlayer insulating film between the second electrode film and the wiring metal film; It is characterized by being separated by.

Each semiconductor element also has a source electrode and a drain electrode necessary for exhibiting its function, and the semiconductor device has wirings for driving each semiconductor element necessary for exhibiting its function. Of course they do.

The following operation is performed by the above configuration.

For example, in a large-sized semiconductor device such as a liquid crystal display device, the number of pixels is increased and individual semiconductor elements are miniaturized to reduce the width of a gate electrode and a wiring for the purpose of achieving high definition display. I do. As the width of the wiring decreases, the resistance of the wiring increases, and the signal delay due to the resistance of the wiring increases. In order to prevent signal delay, it is effective to use a material having low specific resistance for the gate electrode and the wiring. Aluminum and an aluminum alloy are preferable as a wiring material having a low specific resistance. However, aluminum and an aluminum alloy have a natural surface of a silicon film in order to improve reliability of electrical connection between a wiring metal and a source region or a drain region. It has the property of dissolving in dilute hydrofluoric acid used for removing oxide films. According to the structure of the first aspect, the gate electrode has a two-layer structure of a second gate electrode film made of a material such as aluminum having a low specific resistance and a first electrode film, and the gate electrode has a resistance value of As a result, the signal delay due to the wiring resistance can be reduced. Further, it is treated with dilute hydrofluoric acid.

In the process step, the second gate electrode film made of a low-resistance material such as aluminum is covered with an interlayer insulating film, does not contact dilute hydrofluoric acid, and does not dissolve in dilute hydrofluoric acid such as molybdenum or tungsten. Since only the first gate electrode film made of the material is exposed to the surface, the gate electrode is not damaged by the diluted hydrofluoric acid treatment. This prevents damage to the gate electrode due to dilute hydrofluoric acid treatment, enables low-resistance gate wiring using aluminum or the like, prevents signal delay, and is suitable for highly reliable large and high-definition liquid crystal panels. Semiconductor device can be realized.

According to a second aspect of the present invention, the first gate electrode film is made of either molybdenum or a molybdenum-tungsten alloy, and the second gate electrode film is made of either aluminum or an aluminum alloy. Features.

The following operation is performed by the above configuration.

Molybdenum and molybdenum-tungsten alloy are metals insoluble in hydrofluoric acid and have characteristics suitable for a material of a gate electrode film of a semiconductor device, such as excellent adhesion to SiO ₂ . On the other hand, aluminum and aluminum alloys are low-resistance metals and have characteristics suitable for the material of the gate electrode film, such as excellent workability.

Therefore, the first gate electrode film is made of either molybdenum or a molybdenum-tungsten alloy, and the second gate electrode film is made of either aluminum or an aluminum alloy. It can be extracted most effectively.

According to a third aspect of the present invention, there is provided a method of manufacturing a semiconductor device having the same configuration as the semiconductor device according to the first aspect, wherein the wiring metal film and the gate electrode film, the wiring metal film and the source region are provided. Alternatively, a step of forming a resist pattern by performing photolithography using a photomask having a pattern corresponding to an opening for making an electrical connection with a drain region, and forming a second electrode through the opening of the resist pattern A step of isotropically etching the film and photolithography using the same photomask used for forming the opening of the second electrode film to form a resist pattern having the same shape as the first resist pattern, The method is characterized by the step of anisotropically etching the interlayer insulating film through the opening of the resist pattern.

The following operation is performed by the above configuration.

In the isotropic etching, after the opening is formed, the etching is further continued, and an over-etching is performed to obtain an opening larger than the resist pattern. On the other hand, in the anisotropic etching, an opening having the same shape as the resist pattern can be obtained with high accuracy. By using this, it is possible to realize different opening shapes while using the same photomask. Specifically, the opening of the second electrode film can be made larger than the opening of the interlayer insulating film. As a result, the process that required two types of photomasks can be performed with one type of photomask, and the process cost can be reduced.

According to a fourth aspect of the present invention, there is provided a method of manufacturing a semiconductor device having the same configuration as the semiconductor device according to the first aspect, wherein the step of isotropically etching the second electrode film is performed. It is characterized by realizing by etching, and realizing the step of anisotropically etching the interlayer insulating film by dry etching.

The following operation is performed by the above configuration.

When Al is used as the material of the second electrode film, wet etching can be performed with a mixed solution of phosphoric acid and acetic acid, so that isotropic etching can be easily realized. When SiO2 is used as the material of the interlayer insulating film, reactive ion etching (RI
E) Anisotropic etching can be easily realized using an apparatus and a fluorine-based gas. Thus, by using the method of claim 4, the configuration of the invention described in claim 1 can be easily realized.

[0023]

Next, a specific example of the present invention will be described.

(Embodiment 1) FIG. 1A is a structural view of a semiconductor device according to Embodiment 1 of the present invention, and FIG. 1B is a cross-sectional view taken along the line AA of FIG. 1A. 2 is a pattern diagram of a photomask, and FIG. 3 is a sectional view of a gate electrode portion.

Hereinafter, description will be made in accordance with the manufacturing process of the semiconductor device with reference to FIGS.

Although an n-type transistor is described here as an example, the present invention is not limited to this.

1) Undercoat film 2 on glass substrate 1
Is provided. The undercoat film 2 is usually made of SiO ₂ , SiN or the like.

2) An amorphous silicon film 3 is provided on the undercoat film 2.

3) The silicon film 3 in an amorphous state is polycrystallized by using a technique such as a laser annealing method.

4) Photolithography and etching are performed to remove unnecessary portions of the polycrystallized silicon film 3 to form a pattern.

5) A gate insulating film 4 is provided so as to cover the pattern of the silicon film 3. SiO ₂ or the like is used for the gate insulating film 4.

6) On the gate insulating film 4, a first gate electrode film 6 and a second gate electrode film 7 are formed.

The first gate electrode film 6 and the second gate electrode film 7 are desirably formed continuously in a vacuum chamber for the purpose of maintaining a good interface state.

As a material of the first gate electrode film 6, a metal insoluble in hydrofluoric acid is used. Molybdenum, tungsten, and molybdenum-tungsten alloy are examples of metals insoluble in hydrofluoric acid.

As the material of the second gate electrode film 7, a material having a lower specific resistance than the material of the first gate electrode film 6 is used. Representative materials include aluminum and aluminum alloys.

7) The first gate electrode film 6 and the second gate electrode film 7 are patterned by performing photolithography and etching. When the material of the first gate electrode film 6 is molybdenum and the material of the second gate electrode film 7 is aluminum, wet etching is performed using a mixed solution of phosphoric acid, nitric acid, and acetic acid, or ,
Dry etching is performed using a chlorine-based gas.

8) Photolithography is performed using a photomask A corresponding to the pattern 11 in FIG. The pattern of the photomask A (11 in FIG. 2) has a shape surrounding the center pattern of the pattern of the photomask B (12 in FIG. 2).
11) and each side of the central pattern of the photomask B pattern (12 in FIG. 2) parallel to each side of the photomask A pattern (11 in FIG. 2) is 0.5 μm.
At least.

FIG. 3A shows a cross-sectional shape of the gate electrode portion after photolithography.

9) Reactive ion etching (RI
E) Anisotropic etching is performed using an apparatus or the like to form a pattern of a photomask A on the second gate electrode film 7 (1 in FIG.
An opening having the same shape as in 1) is provided. Specifically, when the material of the second gate electrode film 7 is aluminum, dry etching with a chlorine-based gas is performed using a reactive ion etching apparatus, an inductively coupled plasma (ICP) etching apparatus, or the like.

FIG. 3B shows a sectional shape of the gate electrode portion after the etching.

10) Impurity implantation is performed. Here, n
Since a type transistor is taken as an example, phosphorus is implanted.

11) A heat treatment for activating the impurities is performed. Usually, 450 to 600 in consideration of the heat resistant temperature of the glass substrate 1.
A heat treatment at ℃ is performed.

12) An interlayer insulating film 8 is provided. SiO ₂ or the like is used for the interlayer insulating film 8. FIG. 3C shows a cross-sectional shape of the gate electrode portion after the provision of the interlayer insulating film 8.

13) Photolithography is performed using the pattern of the photomask B (12 in FIG. 2). here,
The center pattern of the pattern of the photomask B (12 in FIG. 2) is located at the center of the opening having the same shape as the pattern of the photomask A provided in the second gate electrode film 7 (11 in FIG. 2). Alignment.

FIG. 3D shows a cross-sectional shape of the gate electrode portion after photolithography.

14) Reactive ion etching (R
(IE) Anisotropic etching is performed using an apparatus or the like, and an opening having the same shape as the pattern of the photomask B (12 in FIG. 2) is provided in the interlayer insulating film 8.

More specifically, when the material of the interlayer insulating film 8 is SiO ₂ , dry etching with a fluorine-based gas is performed using a reactive ion etching apparatus, an inductively coupled plasma (ICP) etching apparatus, or the like. . FIG. 3E shows a cross-sectional shape of the gate electrode portion after the etching.

15) The resist 10 is removed. FIG. 3F shows a cross-sectional shape of the gate electrode portion after removing the resist.

16) Interlayer insulating film 8 using diluted hydrofluoric acid solution
Next, the natural oxide film on the surface of the silicon film 3 exposed at the opening is removed.

17) The wiring metal 9 is formed.

18) Photolithography and etching are performed to remove the wiring metal 9 leaving at least a portion necessary for electrical connection of the wiring.

The semiconductor device is completed through the above steps.

Conventionally, if a low-resistance material such as aluminum is used for the gate electrode film, the gate electrode film is dissolved by the natural oxide film removal treatment using dilute hydrofluoric acid before the formation of the wiring metal film, resulting in poor connection. Was. Therefore, it is difficult to reduce the resistance of the gate electrode, and there is a problem that a wiring delay is caused. However, according to the structure of the present invention, aluminum and an aluminum alloy having low specific resistance can be used as a material of the gate electrode film. As a result, a high-performance semiconductor device with less wiring delay can be realized by reducing the resistance of the gate electrode.

(Embodiment 2) Since the process up to the formation of the second gate electrode film 7 is the same as that of the embodiment 1, only the process after the formation of the second gate electrode film 7 is described with reference to FIGS. This will be described with reference to FIG.

FIG. 2 is a pattern diagram of a photomask, and FIG. 4 is a sectional view of a gate electrode portion.

1) The first gate electrode film 6 and the second gate electrode film 7 are patterned by performing photolithography and etching. When molybdenum is used for the material of the first gate electrode film 6 and aluminum is used for the material of the second gate electrode film 7, wet etching is performed using a mixed solution of phosphoric acid, nitric acid, and acetic acid. Alternatively, dry etching is performed using a chlorine-based gas.

2) Pattern of photomask B (1 in FIG. 2)
Photolithography is performed using 2). FIG. 4A shows a cross-sectional shape of the gate electrode portion after photolithography.

3) Pattern of photomask B (1 in FIG. 2)
The isotropic etching is performed through the resist mask of 2), and an opening having a shape larger than the pattern of the photomask B (12 in FIG. 2) is provided in the second gate electrode film 7. Specifically, when the material of the first gate electrode film 6 is molybdenum and the material of the second gate electrode film 7 is aluminum,
Molybdenum which is the material of the first gate electrode film 6 is not etched, and only aluminum which is the material of the second gate electrode film 7 is etched.
Wet etching is performed using a solution diluted with 0 or more. Here, even after the first gate electrode film 6 is exposed by the wet etching, the etching time is further extended (over-etching) and the opening is widened. On the other hand, the undercut width increases and the opening widens). The amount of overetching is adjusted so that the undercut width is 0.5 μm to 1.0 μm (the range of the undercut width shown here is a guide and does not necessarily have to fall within this range). FIG. 4B shows a cross-sectional shape of the gate electrode portion after the wet etching.

4) Inject impurities. Here, phosphorus is implanted because an n-type transistor is taken as an example.

5) An impurity activation heat treatment is performed. Normal,
A heat treatment at 450 to 600 ° C. is performed in consideration of the heat resistant temperature of the glass substrate 1.

6) An interlayer insulating film 8 is provided. Interlayer insulating film 8
Is used, for example. FIG. 4C shows a cross-sectional shape of the gate electrode portion after the provision of the interlayer insulating film 8.

7) Pattern of photomask B (1 in FIG. 2)
Photolithography is performed using 2). Here, the pattern of the photomask B (12 in FIG. 2) is aligned so that the center pattern is located at the center of the opening provided in the second gate electrode film 7.

FIG. 3D shows a cross-sectional shape of the gate electrode portion after photolithography.

8) Reactive ion etching (RI
E) Anisotropic etching is performed using an apparatus or the like to provide an opening having the same shape as the pattern of the photomask B (12 in FIG. 2) in the interlayer insulating film 8.

Specifically, when the material of the interlayer insulating film 8 is SiO ₂ , dry etching with a fluorine-based gas is performed using a reactive ion etching apparatus, an inductively coupled plasma (ICP) etching apparatus, or the like. . FIG. 4E shows a cross-sectional shape of the gate electrode portion after the etching.

9) The resist 10 is removed. FIG. 4F shows a cross-sectional shape of the gate electrode portion after removing the resist.

10) Interlayer insulating film 8 using diluted hydrofluoric acid solution
Next, the natural oxide film on the surface of the silicon film 3 exposed at the opening is removed.

11) The wiring metal 9 is formed.

12) Photolithography and etching are performed to remove the wiring metal 9 leaving at least a portion necessary for electrical connection of the wiring.

The semiconductor device is completed through the above steps.

By using the method of the second embodiment, a high-performance semiconductor device having the same effect as that of the first embodiment and a small wiring delay can be realized, and an opening in the second gate electrode film can be formed. Since the photomask for providing the portion and the photomask for providing the opening in the interlayer insulating film are shared, the number of photomasks can be reduced, and the manufacturing cost can be reduced.

[0072]

As described above, according to the present invention, the gate electrode can be prevented from being damaged by dilute hydrofluoric acid treatment, a low-resistance gate wiring using aluminum or the like can be formed, and wiring delay can be prevented. A semiconductor device suitable for a high-definition liquid crystal panel can be realized.

[Brief description of the drawings]

FIG. 1 is a diagram showing a structure of a semiconductor device according to a first embodiment of the present invention;

FIG. 2 is a pattern diagram of a photomask.

FIG. 3 is a sectional view of a gate electrode portion of the semiconductor device according to the first embodiment of the present invention;

FIG. 4 is a sectional view of a gate electrode portion of a semiconductor device according to a second embodiment of the present invention;

FIG. 5 is a structural diagram of a conventional semiconductor device.

[Explanation of symbols]

 Reference Signs List 1 glass substrate 2 undercoat film 3 silicon film 4 gate insulating film 5 gate electrode 6 first gate electrode film 7 second gate electrode film 8 interlayer insulating film 9 wiring metal 10 resist

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 2H092 HA28 JA24 JA34 JA37 JA41 KA05 MA13 MA19 MA29 MA30 NA25 NA28 PA01 5F110 AA03 AA16 AA26 BB01 CC02 DD02 DD13 DD14 EE03 EE04 EE06 EE11 EE12 EE14 EE22 EE37 GG02J13 PP03 QQ04 QQ05 QQ09

Claims (4)

[Claims] A gate insulating film formed on the substrate, the semiconductor film having a source region and a drain region doped with an impurity, and covering at least a part of the semiconductor film including a channel region; and a gate insulating film. A first gate electrode film made of a material that is at least partially opposed to the semiconductor film and that is insoluble in hydrofluoric acid;
A second gate electrode film made of a material having a lower specific resistance than the gate electrode film, an interlayer insulating film, and a wiring metal film, and electrically connecting the first gate electrode film to the wiring metal film. A semiconductor device, wherein the first gate electrode film and the second gate electrode film are electrically connected, and the second electrode film and the wiring metal film are separated by the interlayer insulating film. . 2. The semiconductor device according to claim 1, wherein said first gate electrode film is made of molybdenum or a molybdenum-tungsten alloy, and said second gate electrode film is made of aluminum or an aluminum alloy. 3. The semiconductor device according to claim 1. 3. A gate insulating film formed on the substrate, the semiconductor film having impurities implanted into a source region and a drain region, and a gate insulating film covering at least a portion including a channel region of the semiconductor film, and the gate insulating film. A first gate electrode film made of a material that is at least partially opposed to the semiconductor film and that is insoluble in hydrofluoric acid;
A second gate electrode film made of a material having a lower specific resistance than the gate electrode film, an interlayer insulating film, and a wiring metal film, and electrically connecting the first gate electrode film to the wiring metal film. A method for manufacturing a semiconductor device, wherein the first gate electrode film and the second gate electrode film are electrically connected, and the second electrode film and the wiring metal film are separated by the interlayer insulating film. Forming a first resist pattern by performing photolithography, isotropically etching the second electrode film through an opening of the first resist pattern, and performing the first resist by performing photolithography. Forming a second resist pattern having the same shape as the pattern, and anisotropically etching the interlayer insulating film through an opening of the second resist pattern. The method of manufacturing a semiconductor device according to claim and. 4. The method according to claim 3, wherein the isotropic etching is wet etching, and the anisotropic etching is dry etching.