JP2000315588A - Power supply control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply control device capable of stabilizing to the rated amperage in a short time after switching-on without using any fuse for circuit protection by supply controlling the load current on the fuse fusion characteristic curve. SOLUTION: A power supply control device is equipped with a comparator circuit to judge whether an over-current is flowing upon determining the difference between the drain-source voltage of an over-heat self-shutoff type semiconductor switch QA and the drain-source voltage of an over-heat self-shutoff type semiconductor switch QB and comparing the obtained difference with the specified over-current reference value, a driver circuit 2 to turn on and off the switch QA with a control signal according to the sensing signal, and a microcomputer 8 which stores the current supply value for the time from the switch turn-on to attainment of the rated current, conducts time measurement at starting, and executes on-off control of the switch QA, whereby on-off of the switch QA is repeated in accordance with the result from comparison, and judgement of shortcircuited condition is passed when a specified frequency of occurrence of the switch QA being turned off is generated, and it is put off.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control device for supplying power to a load, and more particularly to a power supply control device capable of supplying a maximum current in accordance with a fuse blowing characteristic.

[0002]

2. Description of the Related Art Various loads are connected to a battery mounted on an automobile, and a constant current is supplied to the load from the battery. When this load is like a lamp, when the switch is turned on and turned on, the lamp temperature is initially low, so that the resistance value of the lamp is low and a large inrush current flows. After the excess current flows through the lamp, the lamp temperature gradually increases, the resistance value of the lamp increases, the current flowing through the lamp decreases, and the rated current is eventually stabilized.

Conventionally, the main power supply to a lamp load is performed by connecting a semiconductor current control element (semiconductor relay) 10 such as a power transistor to a battery VB via a fuse 9 as shown in FIG. The lamp load 12 is connected to the semiconductor current control element 10.
The fuse 9 is for protecting the circuit, and is blown when a current equal to or more than a predetermined current flows through the circuit, thereby preventing the electric wire from burning. The semiconductor current control element 10 is controlled by the microcomputer 11 to
B supplies a constant power to the load 12. In the case of such a power supply circuit, when the switch is turned on, the rush current flowing through the ranf load is set so as not to exceed the current value of the fuse blowing characteristic curve B as shown by the current characteristic curve A of the lamp load in FIG. I have. The fuse blowing characteristic curve B shown in FIG. 8 shows the limit of the current value that can be passed through the circuit without blowing the fuse 9. FIG. 8 shows a smoke characteristic curve C of the electric wire above the fuse blowing characteristic curve B. The smoke characteristic curve C indicates a current value at which the circuit burns (generates smoke) when a current having this characteristic is supplied to the circuit.

When the current supplied to the lamp load exceeds the current value of the fuse blowing characteristic curve B, the fuse 9
Is blown, the current supplied to the lamp load is supplied in accordance with the lamp load current characteristic curve A set to be below the fuse blowing characteristic curve B.

[0005]

When the switch is first turned on,
The lamp is cold and has low resistance. Therefore, when the switch is turned on and power is supplied to the lamp load 12, a large inrush current flows through the lamp load 12 immediately after the switch is turned on, as shown by a characteristic curve A in FIG. Thereafter, since the resistance value of the lamp load 12 increases with the temperature rise of the lamp load 12, the value of the current flowing through the lamp load 12 decreases with time and eventually stabilizes at the rated current. However, as for the lamp load current, a large inrush current flows after the switch is turned on, and thereafter, the current sharply decreases as shown by a characteristic curve A in FIG.

In such a state, the time required to reach the rated current can be shortened by increasing the inrush current, but for this purpose, a wiring having a large current capacity must be used. This must be against the trend of thinning of the wire rod. Further, if the fuse capacity is reduced to reduce the wire thickness and the current capacity of the wiring is reduced, the current can be set low so as not to exceed the current value of the fuse blowing characteristic curve B. And it takes time to reach the rated current.

An object of the present invention is to control the supply of load current on a fuse blowing characteristic curve without using a fuse for circuit protection, and to stabilize the rated current in a short time after the switch is turned on. .

[0008]

A power supply control device according to the present invention has a first overheating self-interruption type semiconductor switch connected in series between a DC power supply and a load, and a first overheating self-interruption type semiconductor switch. A reference resistor that has the same characteristics as the semiconductor switch, and that causes a current to be generated between the drain and the source that is the same as the drain-source voltage generated when a constant load current flows through the first overheat self-interrupting semiconductor switch. A reference circuit in which a second overheated self-interrupting semiconductor switch connecting the first overheating self-interrupting semiconductor switch is connected in parallel to the first overheating self-interrupting semiconductor switch; and a drain-source voltage of the first overheating self-interrupting semiconductor switch. And a second overheat self-interrupt type semiconductor switch, and a predetermined overcurrent determination value to determine whether the current is an overcurrent. , Determination and comparison circuit for outputting a detection signal corresponding to the result, the first control signal according to the detection signal
A drive circuit for turning on / off the semiconductor switch of the overheat self-interrupt type and a current supply value with respect to a time from when the switch is turned on to a rated current are stored in advance. A microcomputer for performing on / off control of the cut-off semiconductor switch is provided, time counting is started by turning on the switch, and between the drain and the source of the first overheat self-cut-off semiconductor switch and between the drain and source of the second overheat self-cut-off semiconductor switch. Supply current with respect to an elapsed time in which a current value of a difference between a first difference current between the drain and the source and a second difference current between both ends of the temperature sensor incorporated in the first overheat self-interrupting semiconductor switch is stored in advance. The first overheating self-interrupting semiconductor switch is turned on and off from the time the switch is turned on to the rated current to match the value so that no overcurrent is supplied to the load. When it is determined by the comparison circuit that a current equal to or more than a predetermined current has flowed through the first overheated self-interrupting semiconductor switch, the first overheated self-interrupting semiconductor switch is turned off for a predetermined time. The first overheated self-interruption type semiconductor switch is repeatedly turned on and off at intervals, and when the first overheated self-interruption type semiconductor switch is turned off a predetermined number of times, a short-circuit state is detected.
The first overheat self-interruption type semiconductor switch is turned off. With this configuration, according to the present invention, the supply of the load current is controlled on the fuse blowing characteristic curve without using the circuit protection fuse,
The rated current can be stabilized in a short time after the switch is turned on.

[0009]

Embodiments of the present invention will be described below. FIG. 1 shows an embodiment of a power supply control device according to the present invention.

In FIG. 1, an input terminal A of a power supply 1
Is connected to a battery VB.
Is connected to a battery VB via a resistor R4. The input terminal C has a switch S
One end of W1 is connected, and the other end of the switch SW1 is grounded. The output terminal H has a capacitor C1
Is connected. This capacitor C1 is ON / OF
This is a capacitor of the RC integration circuit of the F counting circuit. Also,
A load L whose one end is grounded is connected to the output terminal B. The output terminal E of the power supply device 1 is connected to the first reference resistor Rr1 of the first reference circuit.
Is connected at one end, and the other end is grounded. The first reference resistor Rr1 is a reference resistor of the first reference circuit, and a first reference voltage (a reference voltage for overcurrent detection) is generated by the first reference resistor Rr1.

The output terminal F is connected to a second reference resistor Rr2 of the second reference circuit. A second reference voltage (a reference voltage for detecting an undercurrent) is generated by the second reference resistor Rr2.

Further, an output terminal M of the power supply device 1
The (−) input terminal of the operational amplifier 5 is connected to the output terminal N, and the (+) input terminal of the operational amplifier 5 is connected to the output terminal N. The output terminal M and the output terminal N are connected as shown in FIG.
Main FE of first overheat self-interruption type semiconductor switch QA
These terminals are taken out from both ends of the temperature sensor of the temperature detection circuit of TQ1. That is, the difference current between both ends of the temperature sensor is amplified and extracted. On the other hand, the output terminal B and the output terminal E of the power supply device 1 are connected via a resistor R11. At the connection end between the resistor R11 and the output terminal B,
The (-) input terminal of the operational amplifier 6 is connected to the (+) input terminal of the operational amplifier 6 at the connection end between the resistor R11 and the output terminal E. Therefore, the difference current between the current flowing through the output terminal B and the current flowing through the output terminal E is amplified and extracted.

The output terminal of the operational amplifier 6 has
The (−) input terminal of the operational amplifier 7 is connected. The output terminal of the operational amplifier 5 is connected to the (+) input terminal of the operational amplifier 7. The microcomputer 8 is connected to the output terminal of the operational amplifier 7. The output terminal of the microcomputer 8 is connected to the input terminal C of the power supply device 1. Therefore, the operational amplifier 7 takes the difference between the output difference current from the operational amplifier 5 and the output difference current from the operational amplifier 6, amplifies the difference, and inputs the amplified current to the microcomputer 8 as a current signal. Since the current signal input from the operational amplifier 7 to the microcomputer 8 is an analog signal, the current signal is converted into a digital signal by an A / D converter built in the microcomputer 8 and is taken in. The current value output from the operational amplifier 7 is
This is a current signal corresponding to the current value flowing through the main FET Q1 of the first overheat self-interruption type semiconductor switch QA.

The power supply device 1 has a configuration as shown in FIG. That is, the power supply device 1 controls a current supplied from a battery to each load such as a headlight in a vehicle such as an automobile, and is configured as one chip. In this power supply device 1, a connection terminal for connecting an external element is indicated by a circle.
And the terminals shown in FIG. That is, the battery VB is connected to the input terminal A of the power supply control device 1, and the load L is connected to the output terminal B. on the other hand,
The switching terminal C has one end grounded and the other end connected to a resistor R.
4 is connected to a switch SW1 connected to the battery VB. The input side terminal A is connected to the drain side terminal DA of the first overheating self-interruption type semiconductor switch QA, and the source side terminal SA of the first overheating self-interruption type semiconductor switch QA is connected to the output side. Terminal B is connected. In addition, the first overheat self-interruption type semiconductor switch Q
A is provided with a gate terminal GA. And
The first overheated self-interrupting semiconductor switch QA is connected in series between the battery VB and the load L.

The first overheated self-interruption type semiconductor switch QA has a configuration as shown in FIG. That is,
The drain of the main FET Q1 is connected to the drain terminal DA, and the source terminal SA is connected to the source of the main FET Q1. The gate of the main FET Q1 is connected to a gate terminal GA via an internal resistor RA (for example, 10 kΩ). A temperature detecting circuit 30 is provided between the gate terminal GA and the source terminal SA.
Is connected. This temperature detection circuit 30 is connected to the main F
This is for detecting the temperature of the ETQ 1, and a latch circuit 31 is connected to the temperature detection circuit 30. When the temperature of the main FET Q1 reaches a predetermined temperature (abnormal temperature), the temperature detection circuit 30
To output an ON signal. The latch circuit 31 has a function of receiving a signal from the temperature detection circuit 30 and continuously outputting an ON signal. The output terminal of the latch circuit 31 is connected to the gate of an overheat cutoff FET Q2. When the temperature detection circuit 30 detects that the main FET Q1 is overheated, an ON signal output via the latch circuit 31 outputs the signal. The overheat cut-off FET Q2 turns on and the main FET Q
The main FET Q1 is cut off by dropping the gate voltage of No. 1.

On the other hand, a load L is connected to a source terminal SA of the first overheat self-interrupting semiconductor switch QA via an output terminal B. The power supply to this load L is
Main FE of first overheat self-interruption type semiconductor switch QA
This is performed by TQ1. In this way, the first overheated self-interruption type semiconductor switch QA is designed to prevent the main FET Q1 from overheating and being destroyed when an overcurrent flows due to a load short circuit or the like. It is equipped with an overheat self-interruption function that forcibly turns off (interrupts) by its own action when it rises above. This first
The main FET Q1 constituting the overheat self-interruption type semiconductor switch QA is constituted by an NMOSFET having a DMOS structure.

First overheating self-interruption type semiconductor switch QA
The drain-side terminal DA of the second overheat self-interruption type semiconductor switch QB and the drain-side terminal DC of the third overheat self-interruption type semiconductor switch QC are connected to the drain-side terminal DA. An output terminal E is connected to a source terminal SB of the second overheated self-interruption type semiconductor switch QB, and an output terminal F is connected to a source side terminal SC of the third overheated self-interruption type semiconductor switch QC. It is connected. Also,
The second overheated self-interruption type semiconductor switch QB has a gate-side terminal GB connected to the third overheated self-interruption type semiconductor switch QB.
C is provided with a gate-side terminal GC.

The second overheated self-interruption type semiconductor switch QB has a configuration as shown in FIG. 4, and the second overheated self-interruption type semiconductor switch QB has the first overheating self-interruption type semiconductor switch QB shown in FIG. It has the same configuration as the self-interrupting semiconductor switch QA. That is, the drain of the main FET Q3 is connected to the drain-side terminal DB,
The source 3 is connected to the source side terminal SB.
The gate of the main FET Q3 is connected to the gate terminal GB via an internal resistor RB (for example, 10 kΩ). The temperature detection circuit 40 is connected between the gate side terminal GB and the source side terminal SB. The temperature detecting circuit 40 is for detecting the temperature of the main FET Q3.
Is connected. And this temperature detection circuit 40
It has a function of outputting an ON signal to the latch circuit 41 when the temperature of the main FET Q3 becomes equal to or higher than a predetermined temperature (abnormal temperature) due to a current larger than a predetermined current flowing through the main FET Q3. Then, the latch circuit 41
Has an operation of receiving a signal from the temperature detection circuit 40 and continuously outputting an ON signal. Further, the output terminal of the latch circuit 41 is connected to the gate of the overheat cutoff FET Q4.
When detecting that TQ3 is overheated, the latch circuit 4
FE for overheating cut-off by ON signal output through
TQ4 is turned on, the gate voltage of the main FET Q3 is dropped, and the main FET Q3 is cut off.

On the other hand, a first reference resistor Rr1 is connected to a source terminal SB of the second overheat self-interruption type semiconductor switch QB via an output terminal E. The other end is grounded. Then, a first reference circuit is constituted by the main FET Q3 and the first reference resistor Rr1. This first reference circuit is connected in parallel to a series circuit of a main FET Q1 and a load L of a first overheat self-interruption type semiconductor switch QA. This first
The reference circuit of (1) turns on the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and causes current to flow to the load L. When the current is normally flowing through the load L, the first overheated self-interruption is performed. The same voltage (reference voltage) as the voltage generated at the source (source terminal SA) of the main FET Q1 of the semiconductor switch QA is applied to the source (source terminal SB) of the main FET Q3 of the second overheat self-interrupting semiconductor switch QB. It has the function of constantly generating. That is, the source (source side terminal SB) of the main FET Q3 of the second overheat self-interruption type semiconductor switch QB is
A constant source voltage is always generated irrespective of a change in the state of the load L connected to the source side terminal SA of the first overheat self-interruption type semiconductor switch QA. The main F of the second overheated self-interruption type semiconductor switch QB
When the source voltage of the ETQ3 excessively flows through the main FET Q1 of the first overheat self-interruption type semiconductor switch QA, the source (source side terminal S
This is a first reference voltage for detecting that an overcurrent has flowed through the load L as compared with the source voltage generated in A).

As described above, the second overheated self-interrupting semiconductor switch QB is connected to the main FET Q3 of the second overheating self-interrupting semiconductor switch QB by the short-circuit of the first reference resistor Rr1 connected to the source of the main FET Q3.
In order to prevent the main FET Q3 from being overheated and damaged when an overcurrent flows through the main FET Q3,
3 is provided with an overheating self-interruption function of forcibly turning off (interrupting) by its own action when the temperature rises above a specified value. The main FET Q3 forming the second overheat self-interruption type semiconductor switch QB is an NMOS FE having a DMOS structure.
T.

The third overheated self-interruption type semiconductor switch QC has a configuration as shown in FIG.
Has the same configuration as the first overheated self-interruption type semiconductor switch QA shown in FIG. That is, the drain of the main FET Q5 is connected to the drain side terminal DC,
A source terminal SC is connected to the source of Q5. The gate of the main FET Q5 is connected to an internal resistor RC.
(For example, 10 kΩ) via a gate terminal GC. The gate side terminal GC and the source side terminal SC
Is connected to the temperature detection circuit 50. The temperature detection circuit 50 is for detecting the temperature of the main FET Q5, and a latch circuit 51 is connected to the temperature detection circuit 50. And this temperature detection circuit 5
0 has a function of outputting an ON signal to the latch circuit 51 when the temperature of the main FET Q5 becomes equal to or higher than a predetermined temperature (abnormal temperature) due to a current larger than a predetermined current flowing through the main FET Q5. The latch circuit 51 has a function of receiving a signal from the temperature detection circuit 50 and continuously outputting an ON signal. Further, the output terminal of the latch circuit 51 is connected to the gate of the overheat cutoff FET Q6. When the temperature detection circuit 50 detects that the main FET Q5 is overheated, the output is output via the latch circuit 51. The overheat cutoff FET Q6 is turned on by the ON signal, and the gate voltage of the main FET Q5 is dropped to cut off the main FET Q5.

On the other hand, a second reference resistor Rr2 is connected to a source terminal SC of the third overheat self-interruption type semiconductor switch QC via an output terminal F. The other end is grounded. The main FET Q5 and the second reference resistor Rr2 form a second reference circuit. This second reference circuit is connected in parallel to a series circuit of the main FET Q1 and the load L of the first overheat self-interruption type semiconductor switch QA. This second
The reference circuit of (1) turns on the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and causes current to flow to the load L. When the current is normally flowing through the load L, the first overheated self-interruption is performed. The same voltage (reference voltage) as the voltage generated at the source (source terminal SA) of the main FET Q1 of the semiconductor switch QA is applied to the source (source terminal SC) of the main FET Q5 of the third overheat self-interruption type semiconductor switch QC. It has the function of constantly generating. That is, the source (source-side terminal SC) of the main FET Q5 of the third overheat self-interruption type semiconductor switch QC is
A constant source voltage is always generated irrespective of a change in the state of the load L connected to the source side terminal SA of the first overheat self-interruption type semiconductor switch QA.

The source voltage of the main FET Q5 of the third overheated self-interruption type semiconductor switch QC is such that a current flows through the load L despite the fact that the main FET Q1 of the first overheated self-interruption type semiconductor switch QA is on. When the amount of current flowing through the main FET Q1 of the first overheat self-interruption type semiconductor switch QA when the current does not flow or an insufficient current flows (in the case of a load disconnection or the like) is smaller than a second predetermined value. , Is a second reference voltage for detecting that the current has excessively flowed through the load L as compared with the source voltage of the main FET Q1.

As described above, the third overheated self-interrupting type semiconductor switch QC is connected to the main FET Q5 of the third overheating self-interrupting type semiconductor switch QC by the short circuit of the second reference resistor Rr2 connected to the source of the main FET Q5.
In order to prevent the main FET Q5 from being overheated and damaged when an overcurrent flows through the main FET Q5,
5 is provided with an overheating self-interruption function of forcibly turning off (interrupting) by its own action when the temperature rises above a specified value. The main FET Q5 constituting the third overheat self-interruption type semiconductor switch QC is an NMOS FE having a DMOS structure.
T.

The main FET Q1 of the first overheating self-interruption type semiconductor switch QA, the main FET Q3 of the second overheating self-interruption type semiconductor switch QB, and the main FET Q5 of the third overheating self-interruption type semiconductor switch QC are: This main FET is composed of multiple transistors.
The ratio of the number of transistors constituting the main FET Q1, the main FET Q2, and the main FET Q3 is: main FET Q1> main FET Q3 main FET Q1> main FET Q5. Specifically, for example, the main FET Q1 of the first overheating self-interruption type semiconductor switch QA and the main FET Q3 of the second overheating self-interruption type semiconductor switch QB,
And a main FET Q1 of the first overheated self-interruption type semiconductor switch QA and a third overheated self-interruption type semiconductor switch QA.
The ratio of the number of transistors of the main FET Q5 of C is 100
0: 1 is set.

Then, the first reference resistor Rr1
For example, when a load current (drain current) of 5 A flows through the main FET Q1 of the first overheated self-interruption type semiconductor switch QA, the second overheated self-interruption type semiconductor switch QB
Drain current of 5 mA flows through the main FET Q3 of the first semiconductor switch QA.
The same drain / source voltage Vds as Q1.
The source-to-source voltage is changed to a second overheated self-cutoff semiconductor switch Q
The value is set so as to be generated between the drain and source of the B main FET Q3. Further, the first reference resistor Rr1 and the second reference resistor Rr2 are
For example, when a load current of 5 A flows through the main FET Q1 of the first overheat self-interruption type semiconductor switch QA, a drain current of 5 mA flows through the main FET Q5 of the third overheat self-interruption type semiconductor switch QC, The same drain-source voltage Vds as the drain-source voltage Vds of the main FET Q1 of the cut-off type semiconductor switch QC is applied to the main FET Q5 of the third overheat self-cut-off type semiconductor switch QC.
The value is set so as to be generated between the drain and the source.

Therefore, the gate-source voltage of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the gate-source voltage of the main FET Q3 of the second overheated self-interruption type semiconductor switch QB are equal to the first voltage. As long as the load L connected to the main FET Q1 of the overheat self-interruption type semiconductor switch QA is normal, the value becomes the same value. Similarly, the gate-source voltage of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the gate-source voltage of the main FET Q5 of the third overheated self-interruption type semiconductor switch QC are equal to the first superheated self-interruption type semiconductor switch QC. As long as the load L connected to the main FET Q1 of the cutoff type semiconductor switch QA is normal, the values will be the same.

First overheated self-interruption type semiconductor switch QA
Of the main FET Q1, the gate of the main FET Q3 of the second overheat self-interruption type semiconductor switch QB, and the main FET of the third overheat self-interruption type semiconductor switch QC
The gate of Q5 is connected to the drive circuit 2 via a series circuit of a resistor R7 and a resistor R8, and the gate signal output from the drive circuit 2 causes the main FET Q1 of the first overheat self-interrupting semiconductor switch QA to be connected. A main FET Q3 of the second overheated self-interruption type semiconductor switch QB and a main FET of the third overheated self-interruption type semiconductor switch QC
Q5 is turned on and off at the same time.

The anode of the Zener diode ZD1 is connected to the source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. The cathode of the Zener diode ZD1 has resistors R7 and R8.
Connection points are connected. The (+) side input terminal of the comparator CMP1 and the (−) side input terminal of the comparator CMP2 are connected to the source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA via the resistor R5. I have. This zener diode Z
D1 is a power supply voltage (12) between the gate and source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA.
When the overvoltage is applied to the gate while maintaining V), the overvoltage is bypassed. The comparator CMP1 is connected to a voltage induced at the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the main F of the second overheated self-interruption type semiconductor switch QB.
By comparing the voltage induced at the source of the ETQ3 with the main FET Q1 of the first overheated self-interruption type semiconductor switch QA.
To detect an excessive current flowing through the load L connected to the load L. That is, the output of the comparator CMP1 is based on the source voltage (potential on the source SA side) of the main FET Q1 of the first overheating self-interruption type semiconductor switch QA and the main FET of the second overheating self-interruption type semiconductor switch QB.
Compare with the source voltage of Q3 (potential on the source SB side)
While the difference is equal to or less than the overcurrent determination value (the potential of the source of the main FET Q1 of the first overheated self-interrupting semiconductor switch QA is equal to or more than the potential of the source of the main FET Q3 of the second overheating self-interrupting semiconductor switch QB). During the period, Hi is output, and when the difference is larger than the overcurrent determination value (first
FET Q of overheating self-interruption type semiconductor switch QA
When the potential of the source 1 becomes lower than the potential of the source of the main FET Q3 of the second overheat self-interruption type semiconductor switch QB), it is inverted and Low is output, and it is determined that an excessive current has flowed.

The comparator CMP2 has a voltage induced at the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and a voltage induced at the source of the main FET Q5 of the third overheated self-interruption type semiconductor switch QC. To detect whether a predetermined amount of current is flowing through the main FET Q1 of the first overheat self-interruption type semiconductor switch QA (whether the current is not too small). That is, the output of the comparator CMP2 is the first
FET Q of overheating self-interruption type semiconductor switch QA
1 is compared with the source voltage (potential on the source SC side) of the main FET Q5 of the third overheat self-interruption type semiconductor switch QC, and the difference is equal to or smaller than the undercurrent determination value. (The source voltage of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA is
FET of the overheat self-interruption type semiconductor switch QC
Hi is output while the value is lower than the source voltage of the first superheated semiconductor switch QA (if the difference is larger than the undercurrent determination value).
Source voltage of the third overheat self-interruption type semiconductor switch Q
When it becomes higher than the source voltage of the main FET Q5 of C), it is inverted and Low is output, and it is determined that the current becomes too small.
The (-) side input terminal of the comparator CMP1 is connected to the source of the main FET Q3 of the second overheat self-interruption type semiconductor switch QB via the resistor R6. Further, the (+) side input terminal of the comparator CMP2 is connected to the source of the main FET Q5 of the third overheat self-interruption type semiconductor switch QC.

On the other hand, the input terminal A of the power supply controller 1
Is connected to the emitter of a PNP transistor Tr1, a collector of the PNP transistor Tr1 is connected to a series circuit of resistors R1, R3 and R2, and the other end of the resistor R2 is grounded. . And
The (+) side input terminal of the comparator CMP1 is a resistor R1
And a connection point of the resistor R3 via a diode D1. The (−) side input terminal of the comparator CMP1 is
The connection point between the resistors R3 and R2 is connected via a diode D2. Accordingly, a voltage obtained by dividing the power supply voltage supplied from the battery VB by the resistor R1 and the combined resistance of the resistors R3 and R2 is applied to the (+) side input terminal of the comparator CMP1.
A side input terminal includes a combined resistance of the resistors R1 and R3,
2 are applied so that the divided voltages are respectively applied. The PNP transistor Tr1, the resistors R1, R3, R2, and the diodes D1, D2 cause the main FET Q1 of the first overheat self-interruption type semiconductor switch QA to be turned off from on due to an abnormality such as short circuit. A return circuit for returning the main FET Q1 of the first overheat self-interruption type semiconductor switch QA to ON is configured. In this return circuit, the emitter is connected to the output terminal on the battery VB side, and the base is connected to the resistor R1.
0, a transistor Tr1 connected to the input terminal on the switch SW1 side, resistors R1, R3, R2 connected in series between the collector and ground, and a resistor R
The comparator D1 includes a diode D1 for passing a current flowing through the comparator 1 to the (+) terminal side of the comparator CMP1, and a diode D2 for passing a current flowing through the resistors R1 and R3 to the minus terminal side of the comparator CMP1. The resistance value of the resistor R1 is determined by the switch SW
1 is turned on and the transistor Tr1 is turned on, the potential V1 at the connection point of the resistors R1 and R3 becomes 60 to 8 of the battery.
At about 0%, the potential of the source SA is set to a value higher than the voltage V3 (potential on the cathode side of the diode D1), which is reduced by the voltage drop at the resistor R5.

Further, the anode of the diode D3 is connected to the (+) side input terminal of the comparator CMP1 via the resistor R9, and the gate signal output terminal of the drive circuit 2 is connected to the cathode of the diode D3. ing. The output terminal of the comparator CMP1 is connected to the drive circuit 2, and the result of the judgment by the comparator CMP1 is input to the drive circuit 2. The drive circuit 2 has a voltage VP boosted by the charge pump circuit 3.
(For example, VP = VB + 5V), and the drive circuit 2 outputs H from the comparator CMP1.
The source signal 2a of the drive circuit 2 is turned on, the sink transistor 2b is turned off, and the drive signal of the voltage VP is generated by the signal i and the input of the ON signal input from the switch side by turning on the switch SW1. Is output to the gate of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA via the resistors R8 and R7, thereby turning on the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. I have. This driving circuit 2 is connected to the comparator CMP1 while the Hi signal is being input (unless a Low signal is output).
Main FE of first overheat self-interruption type semiconductor switch QA
Continue to output the ON signal to the gate of TQ1. In the drive circuit 2, when the comparator CMP1 is inverted and a Low signal is input from the comparator CMP1, the source transistor 2a of the drive circuit 2 is turned off, the sink transistor 2b is turned on, and the output from the drive circuit 2 is Low. As a result, an off signal is output to the gate of the main thermal FET QA to turn off the main thermal FET QA. The output terminal of the comparator CMP2 is connected to an output terminal F to the outside, and the result determined by the comparator CMP2 is used by a circuit connected to the output terminal F.

At start-up, when switch SW1 is turned on, P
The NP transistor Tr1 is turned on, and a voltage value (for example, 80% to 60% of the power supply voltage) obtained by dividing VB (12 V) by the resistor R1 and (the resistor R3 + the resistor R2) is a (+) terminal of the comparator CMP1. Is applied. The (-) side terminal of the comparator CMP1
A voltage value (for example, 20% to 40% of the power supply voltage) divided by (the resistance R1 + the resistance R3) and the resistance R2 is applied. This resistor R3 has a small resistance value, and the resistance value of the resistor R1 and (the resistance R
The difference between the resistance values of (3 + resistance R2) is a slight difference.

When the switch SW1 is turned on and the PNP transistor Tr1 is turned on, VB (12 V) is changed to the resistance R1.
And the (R3 + R2) voltage divided by the (+) input terminal of the comparator CMP1 and the comparator CMP
1 is applied to the (−) side input terminal and the comparator CMP
1, the voltage applied to the (+) input terminal of the comparator CMP1 is higher than the voltage applied to the (−) input terminal of the comparator CMP1, and the output of the comparator CMP1 becomes Hi.
The driving circuit 2 is driven, and the driving circuit 2 outputs a gate driving signal Hi. The gate drive signal Hi is supplied to the main FET Q1 of the first overheated self-interruption type semiconductor switch QA.
To turn on the main FET Q1. This gate drive signal simultaneously turns on the main FET Q3 of the second overheated self-interruption type semiconductor switch QB and the main FET Q5 of the third overheated self-interruption type semiconductor switch QC.

Now, when a dead short circuit such as a short circuit occurs on the load L side, the first overheating self-interruption type semiconductor switch QA
Voltage Vds between the drain and source of the main FET Q1
Becomes larger (the first overheated self-interruption type semiconductor switch Q
As long as the A main FET Q1 is on, the voltage between the drain and the source increases, and the first overheated self-interruption type semiconductor switch QA stabilizes at the point determined by the on-resistance of the main FET Q1 and the short-circuit current. If the source of the main FET Q3 of the second overheated self-interruption type semiconductor switch QB is normal during the continuous ON state, the source of the main FET Q3 is more than the source of the main FET Q3 of the second overheated self-interruption type semiconductor switch QB. 1. The overheat self-interruption type semiconductor switch
Since the first reference resistor Rr1 is set so that the source of the A main FET Q1 is higher, the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA is lowered. When the semiconductor switch QA is normally turned on, the voltage Vds (0.5) between the drain and the source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA is set.
V), the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the main FET Q3 of the second overheated self-interruption type semiconductor switch QB than the voltage divided by the resistors R1, R3 and R2. Source is also high (approaching the power supply voltage). The voltage divided by the resistors R1, R3, and R2 is equal to a diode D1,
The signal is cut off at D2 and becomes irrelevant to the (+) input terminal and the (-) input terminal of the comparator CMP1. That is, the value of the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the value of the source of the main FET Q3 of the second overheated self-interruption type semiconductor switch QB are directly input to the (+) side input terminal of the comparator CMP1; ) Side input terminal.

On the other hand, a circuit including a resistor R9 and a diode D3 is connected to the (+) side input terminal of the comparator CMP1, and the cathode of the diode D3 of this circuit is connected to the gate signal output terminal. When the wiring is normal, the gate of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA is turned on.
The cathode of No. 3 is at a considerably high voltage. Therefore, the diode D3 is cut off, and no current flows through the series circuit of the resistor R9 and the diode D3. Accordingly, no current flows through the resistors R5 and R6, and the main FET of the first overheated self-interruption type semiconductor switch QA
Source of Q1 and second overheated self-interrupting semiconductor switch Q
The voltage of the source of the B main FET Q3 is directly input to the (+) input terminal and the (-) input terminal of the comparator CMP1. At this time, when the wiring is normal (not dead short), the main FET of the second overheated self-interruption type semiconductor switch QB is compared with the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA.
Since the first reference resistor Rr1 is set so that the source of Q3 is small, the output of the comparator CMP1 is Hi.

In this state, when a short circuit occurs between the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the load L, a large current flows to the main FET Q1 side of the first overheated self-interruption type semiconductor switch QA. Flows, and the main FE of the first overheat self-interruption type semiconductor switch QA
A large current is applied to the ON resistance of TQ1, and the potential difference between the drain and the source increases. However, the main FET Q3 of the second overheat self-interruption type semiconductor switch QB is
Is constant by the reference resistance Rr1. Therefore, the second
FET of the overheated self-interruption type semiconductor switch QB
The source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA is lower than the source of the third. Then, the comparator CMP1 is inverted, the output of the comparator CMP1 becomes Low, and an attempt is made to cut off the main FET Q1 of the first overheating self-cutoff semiconductor switch QA.

When trying to cut off the main FET Q1 of the first overheat self-cutoff semiconductor switch QA, the transistor 2a on the source side of the drive circuit 2 is turned off and the transistor 2b on the sink side is turned on. Therefore, the resistance R
Since the cathode side of the diode D3 of the series circuit of the diode 9 and the diode D3 is grounded, a current flows through the series circuit of the resistor R9 and the diode D3. This current flows from the source of the main FET Q1 of the first overheat self-interrupting semiconductor switch QA, through the resistor R5, through the resistor R9, and through the diode D3 to ground. Then, a current flows through the resistor R5, causing a voltage drop by the resistor R5. Due to this voltage drop, the (+) input terminal of the comparator CMP1 is the first input terminal.
FET Q of overheating self-interruption type semiconductor switch QA
1 is lower than the source by the voltage drop of the resistor R5. This is hysteresis.

Second overheating self-interruption type semiconductor switch QB
Once the source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA is once lower than the source of the main FET Q3, the comparator CMP1 is inverted and the Low signal of the drive circuit 2 is input to drive the drive circuit 2. Try to turn off. Once the drive circuit 2 is stopped, the transistor 2a on the source side of the drive circuit 2 is turned off and the transistor 2b on the sink side is turned on, so that a current flows through the series circuit of the resistor R9 and the diode D3, and the current of the comparator CMP1 is reduced. The (+) side input terminal has a voltage lower than the source of the main FET Q1 of the actual first overheat self-interruption type semiconductor switch QA. Therefore, the comparator CMP1 is stably turned off even if the source of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA rises slightly and fluctuates. That is, the resistor R9 and the diode D3 form a hysteresis circuit.

In this state, since the drive circuit 2 is turned off, the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the second overheated self-interruption type semiconductor switch Q
The B main FET Q3 shifts to the off direction. First,
Both the voltage between the drain and the source gradually increases. As the drain-source voltage increases, the capacitance of the CGD in the gate is charged by being pulled by the drain-source voltage, and is pulled while being charged. The voltage between the true gate and source of the main FET Q3 of the overheated self-interruption type semiconductor switch QB2 increases, and the current temporarily increases. However, the main FET Q1, the main FET Q3
Since the source voltage does not increase indefinitely, it saturates when it slightly exceeds the power supply voltage (12 V), loses the pulling effect any more, and discharges the first overheated self-interrupt type semiconductor switch QA by the gate discharge circuit. Main FE
The gate charge of the main FET Q3 of the TQ1 and the second overheat self-interruption type semiconductor switch QB is gradually removed, and the gate voltage is reduced with respect to the source. Therefore, the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the second overheated self-interruption type semiconductor switch QA
At the same time as the current of the main FET Q3 of B decreases, the main FET of the first overheat self-interruption type semiconductor switch QA
The source voltage of both the Q1 and the main FET Q3 of the second overheat self-interruption type semiconductor switch QB is steadily increasing.

In this state, a voltage obtained by dividing the power supply voltage by the resistors R1, R3 and R2 is applied to the (+) input terminal and the (-) input terminal of the comparator CMP1. Will be. Then, the comparator C
The voltage divided by the resistors R1, R3 and R2 applied to the (+) input terminal of MP1 is smaller than the voltage divided by the resistors R1, R3 and R2 applied to the (−) input terminal. Therefore, the output is increased by the voltage drop of the resistor R3, and the output of the comparator CMP1 is inverted.
becomes i. When the output of the comparator CMP1 becomes Hi, the drive circuit 2 is turned on again, and a gate signal is sent to the gate of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA.
Of the main FET Q1 is turned on. As a result, a current flows through the load L. Such ON / OFF is repeatedly performed as shown by the waveform A in FIG.

The ON / OFF counting circuit 4 is in a state in which the gate of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA is off and the driving circuit 2 is off, that is, the sink transistor 2b of the driving circuit 2 is on. , The source of the main FET Q1 of the first overheat self-interruption type semiconductor switch QA has a voltage higher than the ground (5
V) in some cases, and operates in such a state. Specifically, a CR integrating circuit is used, and the capacitor C1 is a capacitor of the CR integrating circuit.

As described above, the drain DA of the main FET Q1 of the first overheating self-interruption type semiconductor switch QA and the main FET Q3 of the second overheating self-interruption type semiconductor switch QB
Drain DB of the main FET Q5 of the third overheat self-interruption type semiconductor switch QC,
And the gate GA of the main FET Q1 of the first overheated self-interruption type semiconductor switch QA, the gate GB of the main FET Q3 of the second overheated self-interruption type semiconductor switch QB, and the third
FET of the overheat self-interruption type semiconductor switch QC
By sharing the gates of the five gates GC, integration on the same chip can be facilitated. Also, the main FET Q1 of the first overheated self-interruption type semiconductor switch QA and the second overheated self-interruption type semiconductor switch QB
The main FET Q3 of the third embodiment and the main FET Q5 of the third overheat self-interruption type semiconductor switch QC are formed on the same chip in the same process to eliminate the effects of temperature drift and variations between lots. ing.

When the switch SW1 is turned on, the microcomputer 8 shown in the figure is also turned on. This microcomputer 8
When turned on, the timer provided inside starts. At the same time, the PNP transistor Tr1 turns on and VB (1
2V) is applied to the (+) side input terminal of the comparator CMP1 and the (−) side input terminal of the comparator CMP1 by dividing the voltage by the resistor R1 and (the resistor R3 + the resistor R2). Since the voltage applied to the terminal is higher than the voltage applied to the (−) side input terminal of the comparator CMP1, the output of the comparator CMP1 becomes Hi, which drives the drive circuit 2 and the gate drive signal Hi from the drive circuit 2. Is output. This gate drive signal Hi is applied to the gate of the main FET Q1 of the first overheating self-interruption type semiconductor switch QA, and turns on the main FET Q1 of the first overheating self-interruption type semiconductor switch QA. The inrush current is supplied to the load L by turning on the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. The current value of the rush current is output from the operational amplifier 7 and input to the microcomputer 8.

At the time of startup, the microcomputer 8 turns on the main FET Q1 of the first overheat self-interruption type semiconductor switch QA, and sets a rush current of a preset current value indicated by a in FIG. Is supplied for the time indicated by a in FIG. When the current value indicated by a of the waveform A shown in FIG. 6 is supplied for the time shown by a of the waveform A shown in FIG.
Since the current exceeds the allowable current indicated by the fuse blowing curve B shown in FIG. 6, the microcomputer 8 outputs a signal for shutting off the main FET Q1 of the first overheating self-interruption type semiconductor switch QA to the drive circuit 2, and outputs the first overheating. Self-interrupting semiconductor switch Q
A main FET Q1 is cut off. Then, the current supplied to the load L sharply decreases, falls below the allowable current indicated by the fuse blowing curve B, and decreases to the current value indicated by b in the waveform A shown in FIG. Then, when the current value becomes lower than the allowable current shown by the fuse blowing curve B and becomes the current value shown by b of the waveform A shown in FIG. 6, the microcomputer 8 again switches the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. When turned on, a current having a current value indicated by b in FIG. 6 is supplied for a time indicated by b in FIG.

When the current value indicated by the waveform A in FIG. 6 is supplied for the time indicated by the waveform A in FIG.
The microcomputer 8 outputs a signal for shutting off the main FET Q1 of the first overheat self-interruption type semiconductor switch QA to the drive circuit 2 because the current exceeds the allowable current indicated by the fuse blowing curve B shown in FIG.
To shut off the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. Then, the current supplied to the load L sharply decreases, falls below the allowable current indicated by the fuse blowing curve B illustrated in FIG. 6, and decreases to the current value indicated by c of the waveform A illustrated in FIG. Then, when the current value becomes lower than the allowable current shown by the fuse blowing curve B shown in FIG. 6 and becomes the current value shown by c of the waveform A shown in FIG. 6, the microcomputer 8 again starts the first overheat self-interruption type semiconductor switch. The main FET Q1 of QA is turned on, and a current having a current value indicated by c in FIG. 6 is supplied for a time indicated by c in FIG.

When the current value indicated by c in FIG. 6 is supplied for the time indicated by c in FIG.
The microcomputer 8 outputs a signal for shutting off the main FET Q1 of the first overheat self-interruption type semiconductor switch QA to the drive circuit 2 because the current exceeds the allowable current indicated by the fuse blowing curve B shown in FIG.
To shut off the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. Then, the current supplied to the load L sharply decreases and falls below the allowable current indicated by the fuse blowing curve B illustrated in FIG. 6 to the current value indicated by d of the waveform A illustrated in FIG. Then, when the current value becomes lower than the allowable current shown by the fuse blowing curve B shown in FIG. 6 and becomes the current value shown by d of the waveform A shown in FIG. 6, the microcomputer 8 again starts the first overheat self-interruption type semiconductor switch. The main FET Q1 of QA is turned on, and a current having a current value indicated by d of the waveform A shown in FIG. 6 is supplied for a time shown by d of the waveform A shown in FIG.

When the current value indicated by d of the waveform A shown in FIG. 6 is supplied for the time shown by d of the waveform A shown in FIG.
The microcomputer 8 outputs a signal for shutting off the main FET Q1 of the first overheat self-interruption type semiconductor switch QA to the drive circuit 2 because the current exceeds the allowable current indicated by the fuse blowing curve B shown in FIG.
To shut off the main FET Q1 of the first overheat self-interruption type semiconductor switch QA. Then, the current supplied to the load L sharply decreases, falls below the allowable current indicated by the fuse blowing curve B illustrated in FIG. 6, and decreases to the current value indicated by e in the waveform A illustrated in FIG. Then, when the current value becomes lower than the allowable current shown by the fuse blowing curve B shown in FIG. 6 and becomes the current value shown by e in the waveform A shown in FIG. 6, the microcomputer 8 again starts the first overheat self-interruption type semiconductor switch. The main FET Q1 of the QA is turned on, and a current having a current value indicated by e in FIG. 6 is supplied for a time indicated by e in FIG.

The current (load current) flowing through the main FET Q1 of the first overheated self-interrupting semiconductor switch QA by intermittently connecting the main FET Q1 of the first overheating self-interrupting semiconductor switch QA as shown in FIG. As shown in A,
The control can be performed stepwise along the fuse blowing curve B shown in FIG. By controlling in this way, the first
FET Q of overheating self-interruption type semiconductor switch QA
In FIG. 1, a current along the fuse blowing curve B shown in FIG. 6 can flow, and the maximum current can be supplied to the circuit.
The circuit can be protected without using a fuse, and the load L can be quickly stabilized at the rated current.

[0050]

According to the present invention, it is possible to control the supply of the load current on the fuse blowing characteristic curve without using a fuse for circuit protection, and to stabilize the rated current in a short time after the switch is turned on.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a power supply control device according to the present invention.

FIG. 2 is a schematic configuration diagram illustrating an example of a power supply device indicated by a broken line in FIG.

FIG. 3 is a detailed circuit diagram of a first overheat self-interruption type semiconductor switch QA shown in FIG. 2;

FIG. 4 is a detailed circuit diagram of a second overheat self-interruption type semiconductor switch QB shown in FIG. 2;

FIG. 5 is a detailed circuit diagram of a third overheat self-interruption type semiconductor switch QC shown in FIG. 2;

FIG. 6 is a diagram showing current control characteristics of the power supply control device according to the present invention.

FIG. 7 is a circuit diagram of a conventional power supply to a load.

8 is a diagram showing a current waveform supplied to the load shown in FIG. 7, a fuse blowing characteristic curve, and a smoke characteristic curve.

[Explanation of symbols]

1 Power supply device 2 Driving circuit 5, 6, 7 Operational amplifier 8 Microcomputer QA ... First overheated self-interrupting semiconductor switch QB Second overheated self-interrupting semiconductor switch QC Switch Rr1 First reference resistor Rr2 Second reference resistor CMP1 Comparator CMP2 Comparator VB Comparator VB ... DC power supply

Claims (1)

[Claims] 1. A first overheating self-interruption type semiconductor switch is connected in series between a DC power supply and a load, and the first overheating self-interruption type semiconductor switch has the same characteristics as the first overheating self-interruption type semiconductor switch. A second overheating self-interruption type in which a reference resistor is connected to the source, which flows a current that generates the same voltage between the drain and source as the voltage between the drain and source generated when a constant load current flows through the self-interruption type semiconductor switch. A reference circuit having a semiconductor switch connected in parallel to the first overheated self-interruption type semiconductor switch;
Comparing the difference between the source-to-source voltage and the drain-to-source voltage of the second overheat self-interruption type semiconductor switch with a predetermined overcurrent determination value to determine whether the current is an overcurrent; A comparison circuit that outputs a detection signal according to the determination result, a drive circuit that turns on and off the first overheat self-interrupting semiconductor switch with a control signal corresponding to the detection signal, The microcomputer supplies a current supply value with respect to time beforehand, measures time at the time of start, and provides a microcomputer for performing on / off control of the first overheat self-interruption type semiconductor switch. A first differential current between a drain and a source of the first overheated self-interrupting semiconductor switch and a drain and a source of the second overheated self-interrupting semiconductor switch; In the overheated self-interruption type semiconductor switch, the current from the switch-on to the rated current is adjusted so that the current value of the difference between the second differential currents at both ends of the built-in temperature sensor matches the supply current value for an elapsed time stored in advance. Until the first overheating self-interruption type semiconductor switch is turned on / off to prevent overcurrent from being supplied to the load, the comparison result of the comparison circuit indicates that the first overheating self-interruption type semiconductor switch has a predetermined current or more. When it is determined that the current has flowed, the first overheating self-interruption type semiconductor switch is turned off, and the first overheating self-interruption type semiconductor switch is repeatedly turned on and off at predetermined time intervals. A short-circuit state is detected when the overheated self-interrupting semiconductor switch is turned off a predetermined number of times, and the first overheated self-interrupting semiconductor switch is turned off. Power supply control device.