JP2000307010A - Semiconductor integrated circuit device and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a highly reliable integrated circuit having two types of gate electrodes with different film thickness of gate insulating film, on which the malfunction in the internal circuit and the increase in circuit power consumption can be prevented. SOLUTION: The gate insulating film of the second transistor constituting an internal circuit 200 is formed into the multilayer film of a silicon oxide/ nitride film 30 and a barium titanate strontium film 31. To be more precise, the second transistor group constituting an internal circuit is provided with a gate insulating film which contains a high dielectric material. Accordingly, the conversion film thickness of a gate insulating film can be thinly formed, and a high speed operation can be accomplished while the generation of a leakage current is being suppressed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an integrated circuit, and more particularly, to an MIS field effect transistor.

[0002]

2. Description of the Related Art Hitherto, integrated circuits have realized high performance such as high speed and low power consumption by reducing the gate length, thinning the gate insulating film, and lowering the voltage. When the gate insulating film is thin, the current driving capability of the transistor is improved, so that the performance of the integrated circuit can be improved. In addition, lower voltage can realize lower power consumption while maintaining the reliability of the gate insulating film.

On the other hand, when a system is constructed using integrated circuits, it is desirable that the voltage of a power supply used is constant. Therefore, in order to improve the performance of the integrated circuit while keeping the power supply voltage constant, the transistors in the input / output unit are driven at a high voltage, and the transistors in the region other than the input / output unit, that is, the transistors in the region inside the integrated circuit, have a low voltage. It is conceivable to adopt a configuration driven by. FIG. 6 schematically shows an example of such a configuration. In the figure, two types of transistors are shown. The transistor in the input / output unit is provided with a thick gate insulating film so as to withstand a high power supply voltage. On the other hand, transistors in regions other than the input / output section are provided with a thin gate insulating film,
The performance of integrated circuits has been improved.

[0004]

However, when two types of gate electrodes having different thicknesses of the gate insulating film are formed as described above, a leak current occurs in a transistor having a small thickness during long-term use, and the internal In some cases, the circuit malfunctions and the circuit current consumption increases. In particular, as shown in FIG. 5, when the film thickness is 2 nm or less, the leak current sharply increases, and the above problem becomes remarkable.

The present invention has been made in view of the above circumstances, and in an integrated circuit provided with two types of gate electrodes having different gate insulating film thicknesses, malfunction of an internal circuit or long circuit operation during long-term use. It is an object of the present invention to provide a highly reliable integrated circuit by preventing an increase in current consumption.

[0006]

According to the present invention to solve the above-mentioned problems, in a semiconductor integrated circuit device having an input / output unit and an internal circuit on a silicon substrate, a first transistor constituting the input / output unit The group includes a gate insulating film made of a silicon oxide-based material, and the second transistor group forming the internal circuit includes a gate insulating film containing a high dielectric material having a higher dielectric constant than the silicon oxide-based material. A semiconductor integrated circuit device is provided.

Further, according to the present invention, a step of forming a silicon oxide-based insulating film on a semiconductor substrate including an input / output section forming region and an internal circuit forming region, and forming a silicon film on the silicon oxide-based insulating film, Forming a multilayer film in which a first conductive film and a silicon nitride film are stacked in this order; and processing the silicon oxide-based insulating film and the multilayer film to form a first gate in the input / output portion formation region. Forming an electrode, forming a sacrificial gate electrode in the internal circuit formation region, forming a source / drain region, and forming an interlayer insulating film so as to fill the first gate electrode and the sacrificial gate electrode. Performing a step of selectively removing the multilayer film and the silicon oxide-based insulating film included in the sacrificial gate electrode to form a recess, and forming an acid containing nitrogen in the recess. Forming a first film made of a silicon-based material and a second film made of a high-dielectric material having a higher dielectric constant than the silicon oxide-based material in this order; and forming a second film on the second film. Forming a second gate electrode by processing at least the second conductive film after the conductive film is deposited.

The operation of the semiconductor integrated circuit device according to the present invention will be described below. The present invention is based on experimental results of gate leakage characteristics of a transistor using a silicon oxide insulating film as a gate insulating film and a transistor using an insulating film made of a high dielectric material. FIG. 5 shows the relationship between the gate leak current and the insulating film thickness when a silicon oxide-based insulating film is used as the gate insulating film and when a barium / strontium titanate film is used. When the silicon oxide film thickness is less than 2 nm, the gate leakage current is 1 × 10 ^-2 A /
Since the value exceeds cm ⁻² , the occurrence of a leak current becomes a problem. On the other hand, in an example using an insulating film made of a high dielectric material such as a barium strontium titanate film, the equivalent film thickness (the value obtained by dividing the film thickness of the insulating film by the dielectric constant) is 1 nm.
Further, in a stacked structure of a silicon oxynitride film and an insulating film made of a high-dielectric material, a gate leakage can be kept small up to 0.5 nm. Therefore, even when a high-speed operation is performed using a transistor having a gate insulating film with a thickness of 2 nm or less by forming an insulating film containing a high dielectric material, generation of leakage current can be effectively suppressed. is there.

Further, a method of manufacturing a semiconductor integrated circuit device according to the present invention provides a method for suitably forming a semiconductor integrated circuit device having a small gate leak. It is difficult to manufacture an integrated circuit having a silicon oxide film and an insulating film made of a high dielectric material at the same time by the conventional method. In the conventional method, a high-temperature heat treatment is performed after the gate insulating film is formed, so that the gate insulating film reacts with the silicon substrate or the gate insulating film and the film forming the gate electrode. Ideally, a gate dielectric film having a high-dielectric-constant single-layer structure can reduce gate leakage as compared with a case where a stacked structure of a silicon oxynitride film and a high-dielectric film is used. However, when the silicon substrate reacts with the high dielectric film, gate leakage may increase. The manufacturing method of the present invention effectively solves such a problem. That is, in the manufacturing method of the present invention, after removing the gate electrode film and the gate insulating film of the sacrificial gate electrode, a high dielectric film and a conductive gate electrode are formed. Therefore, deterioration of the high dielectric film during the manufacturing process can be prevented, and a semiconductor integrated circuit device with less current leakage can be suitably manufactured.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In a semiconductor integrated circuit device according to the present invention, a gate insulating film of a second transistor group includes a first film made of a silicon oxide-based material containing nitrogen and the high film formed thereon. It is preferable to form a multilayer film including a second film made of a dielectric material. When a high dielectric film is formed directly on a silicon substrate, silicon and oxygen in the high dielectric film react with each other due to high-temperature heat treatment, and a silicon oxide film having a low dielectric constant may be formed. In this case, it may be difficult to reduce the reduced thickness of the gate insulating film (the value obtained by dividing the thickness of the insulating film by the dielectric constant). In contrast, such a problem can be solved by disposing a first film made of a silicon oxide-based material containing nitrogen, which acts as an oxidation barrier of a silicon substrate, below a second film made of a high dielectric material. Can be solved effectively.

It is preferable to select a material having a relative dielectric constant of 15 or more as the high dielectric material in the present invention. For example, aluminum oxide (Al ₂ O ₃ ), aluminum nitride, tantalum oxide (Ta ₂ O ₅ ), strontium titanate (SrTiO ₃ ), barium titanate (BaTi
O ₃ ), barium strontium titanate (Ba _x Sr)
_{1- x} TiO ₃ (0 <x <1)), TiO ₂ , ZrO ₂ , PZ
T (PbZrTiO ₃ ) and bismuth strontium tantalate (SrBi ₂ Ta ₂ O ₉ ). Among them, tantalum oxide (Ta ₂ O ₅ ), barium strontium titanate (Ba _x Sr _{1 -x} TiO ₃ (0 <
x <1)) and one or more materials selected from the group consisting of bismuth strontium tantalate (SrBi ₂ Ta ₂ O ₉ ). If these materials are used, the equivalent film thickness can be effectively reduced while increasing the actual thickness of the gate insulating film, and the high-speed operation of the internal circuit and the suppression of the current leak can be more effectively realized.

A gate insulating film containing a high dielectric material is formed in the internal circuit in the semiconductor integrated circuit device of the present invention and in the internal circuit forming region in the method of manufacturing the semiconductor integrated circuit device of the present invention. The converted thickness of the insulating film, that is, the value obtained by dividing the thickness of the insulating film by the dielectric constant is preferably 2 nm or less, more preferably 1 nm. By doing so, it is possible to operate the internal circuit at higher speed. Note that when the gate insulating film is a multilayer film, a converted value (t / ε) _{RED represented} by the following equation is used as the converted film thickness. (T / ε) _RED = t ₁ / ε ₁ + t ₂ / ε ₂ + ... + t _n / ε _n
(N is an integer of 2 or more) (where ε is the relative dielectric constant of the insulating film, t is the film thickness of the insulating film (n
m). Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view showing a first embodiment of the semiconductor integrated circuit device of the present invention.

In a MISFET in an internal circuit, a gate insulating film has a silicon oxynitride film having a thickness of 0.3 to 1.0 nm and a gate insulating film having a thickness of 5 to 10 nm.
The gate electrode film has a laminated structure of a high dielectric constant insulating film having a thickness of 50 nm, and the gate electrode film has a metal nitride film or a metal oxide or metal film or a metal silicide film having a thickness of 10 to 100 nm.
Alternatively, it has a laminated structure of these.

On the other hand, in a MISFET in a circuit of an input / output unit, a gate insulating film is a silicon oxynitride film having a thickness of 2 to 5 nm,
The gate electrode film has a laminated structure of a silicon film doped with an impurity having a thickness of 50 to 200 nm and a metal nitride film, a metal oxide, a metal film, or a metal silicide film having a thickness of 10 to 100 nm.

As the high dielectric constant insulating film in the above structure, there is a tantalum oxide film, a titanium oxide film, or the like, and as the metal nitride film in the above structure, a titanium nitride film, a tantalum nitride film, or the like is used. As the metal oxide film, a ruthenium oxide film, an iridium oxide film, or the like is used. As the metal film, a tungsten film, a molybdenum film, or the like is used, and as the metal silicide film, a titanium silicide film, a cobalt silicide film, or the like is used. However, it is not limited to these.

FIG. 2 is a cross-sectional view of a MISFET showing a second embodiment of the semiconductor integrated circuit device according to the present invention. The materials and dimensions of the transistor structure are almost the same as those of the first embodiment. The difference from the first embodiment is that in the MISFET in the internal circuit, the gate electrode film is not self-aligned with the source / drain regions.

FIG. 3 is a process sectional view showing a first embodiment of a method of manufacturing a semiconductor integrated circuit device according to the present invention. FIG. 3A shows that a gate oxide-based insulating film 3 is formed on a silicon semiconductor substrate 1 on which an element isolation region 2 is formed.
This shows a state in which a silicon film is deposited by a VD method or the like, and then a metal conductor film and a silicon nitride film are deposited on the silicon film doped with impurities by an ion implantation method.

Next, FIG. 3B shows that the gate electrode is formed by a normal lithography process and an etching process, and then impurities are ion-implanted into the source / drain regions, and the impurities are activated by heat treatment to form an input / output portion. And the source / drain regions of the internal circuit transistors are formed. The silicon oxide film-based interlayer insulating film is planarized by a chemical mechanical polishing method or the like.

Next, FIG. 3C shows that after selectively removing the nitride film and the metal conductor film on the internal circuit transistor, the silicon film as the gate electrode and the oxynitride film as the gate insulating film are selectively removed. Shows the removed state. FIG. 3D shows a case where a multilayer film of a silicon oxide-based insulating film and a high dielectric constant insulating film is formed as a gate insulating film, and a conductive film is formed as a gate electrode film. This shows a state in which the gate electrode film is removed to complete the entire circuit transistor.

[0021]

FIG. 1 is a sectional view of a MISFET showing an example of a semiconductor integrated circuit device according to the present invention. The transistor of the input / output circuit 100 includes a silicon oxynitride film 30 having a thickness of 3 nm as a gate insulating film, and a polycrystalline silicon film 51, a titanium nitride film 41, and a tungsten film 40 are stacked thereon. Further, a silicon nitride film 70 is formed on the tungsten film 40. Polycrystalline silicon film 5
1 is an n ⁺ conductivity type in the nMOS,
The pMOS has p ⁺ conductivity type.

On the other hand, in the transistor of the internal circuit 200, a multilayer film composed of a 0.5 nm thick silicon oxynitride film 30 and a 10 nm thick barium / strontium titanate film 31 is used as a gate insulating film. The film 41 and the tungsten film 40 are stacked. The gate electrode has a structure self-aligned with the source / drain region 60. In this structure, as shown in FIG. 3, the interlayer insulating film 71 is planarized by a chemical mechanical polishing method.

The semiconductor integrated circuit device of FIG. 1 is structurally different from the internal circuit 2 after the completion of the high-temperature heat treatment for forming the diffusion layer.
00 can be formed (described later in Example 3). Therefore, the requirement for heat resistance of the gate electrode material of the internal circuit 200 can be eased. Specifically, the gate electrode can be formed of a material having a heat resistance of 600 ° C. or less, at which the dielectric constant insulating film reacts with the silicon substrate. This makes it possible to expand the range of selection of the gate electrode material.

Embodiment 2 FIG. 2 is a sectional view of a MISFET showing another example of the semiconductor integrated circuit device according to the present invention. The transistor of the input / output circuit 100 has a 4 nm-thick silicon oxynitride film 32 as a gate insulating film, on which a polycrystalline silicon film 51 and a cobalt silicide film 42 are laminated. The polycrystalline silicon film 51 has n ⁺
And the pMOS conductivity type is p ⁺ .

On the other hand, in the transistor of the internal circuit 200, a multilayer film composed of a silicon oxynitride film 32 having a thickness of 1 nm and a tantalum oxide film 33 having a thickness of 4 nm is used as a gate insulating film, on which a titanium nitride film 41 and a tungsten film are formed. 40 are stacked.

Embodiment 3 This embodiment shows an example of a method for manufacturing a semiconductor integrated circuit device according to the present invention. Hereinafter, description will be made with reference to FIG.

First, a 3 nm-thick gate oxynitride film 30 was formed by thermal oxynitridation on a silicon semiconductor substrate 1 having element isolation regions formed by a trench method. Next, low pressure CVD
After the polycrystalline silicon film 50 is deposited by the ion implantation method, arsenic is added to the nMOS side polycrystalline silicon film by ion implantation.
3 × 10 ¹⁵ cm ⁻² ions were implanted into the polycrystalline silicon film on the side of × 10 ¹⁵ cm ⁻² and pMOS. Subsequently, a titanium nitride film 41 and a tungsten film 40 were deposited thereon by a sputter method, and a silicon nitride film 70 was further deposited by a CVD method. This state is shown in FIG.

Next, after forming a gate electrode by a usual lithography process and etching process, impurities were ion-implanted near the gate in the source / drain regions. After forming the insulating film side wall on the gate electrode, impurities were ion-implanted into the source / drain regions again, and heat treatment was performed at 1000 ° C. to activate the impurities. Thereby, the diffusion layer 60 was formed. After a cobalt silicide film 42 was formed by depositing a cobalt film and performing heat treatment, a silicon oxide film was deposited by a CVD method, and flattened by a chemical mechanical polishing method. This state is shown in FIG.

Subsequently, for the transistor constituting the internal circuit, the nitride film 70, the tungsten film 40 and the titanium nitride film 41 were selectively removed by a usual resist process and a dry etching method. Subsequently, the polycrystalline silicon film 50 and the gate oxynitride film 30 were selectively removed by wet etching. This state is shown in FIG.

Next, a film as shown in FIG. 3D was formed for the transistors constituting the internal circuit. First, a 0.5-nm-thick oxynitride film is formed on the surface of the silicon substrate 10 by a thermal oxynitridation method, and then a 10-nm-thick barium oxide / strontium / titanium film 31 is laminated by a CVD method. The film 41 was formed by a sputter method. Excess gate insulating film and gate electrode film on the interlayer film were removed by a chemical mechanical polishing method.

Through the above steps, all circuit transistors were completed. The manufactured semiconductor integrated circuit device exhibited a high operation speed and a small current leak during long-term use.

Embodiment 4 This embodiment shows another example of a method of manufacturing a semiconductor integrated circuit device according to the present invention. Hereinafter, description will be made with reference to FIG.

First, a 4 nm-thick gate oxynitride film 32 was formed by thermal oxynitridation on a silicon semiconductor substrate 1 having element isolation regions formed by a trench method. Next, low pressure CVD
After the polycrystalline silicon film 51 is deposited by the ion implantation method, arsenic is added to the polycrystalline silicon film on the nMOS side by ion implantation.
3 × 10 ¹⁵ cm ⁻² ions were implanted into the polycrystalline silicon film on the side of × 10 ¹⁵ cm ⁻² and pMOS.

Next, after a gate electrode was formed by a usual lithography process and etching process, impurities were ion-implanted in the vicinity of the gate in the source / drain regions. After forming the insulating film side wall on the gate electrode, impurities were ion-implanted into the source / drain regions again, and then heat treatment was performed at 1020 ° C. to activate the impurities. Subsequently, a cobalt film was formed by a sputter method, and after heat treatment, an excess cobalt film on the insulating film was removed and heat treatment was performed again. Thus, a cobalt silicide film 42 was formed. afterwards,
Silicon nitride film 70 and silicon oxide film 7 by CVD
1 was deposited and planarized by a combination of an etch-back method and a chemical mechanical polishing method. This state is shown in FIG.

Subsequently, regarding the transistor constituting the internal circuit, the nitride film 70 and the cobalt silicide film 4
2 was selectively removed by an ordinary resist process and a dry etching method. Subsequently, the polycrystalline silicon film 51 and the gate oxynitride film 32 were selectively removed by wet etching. This state is shown in FIG.

Next, a film as shown in FIG. 4D was formed for the transistor constituting the internal circuit. First, a 1 nm-thick oxynitride film 32 is formed on the surface of the silicon substrate 10 by a thermal oxynitridation method, and then a 4 nm-thick tantalum oxide film 33 is deposited by a CVD method.
3 and a tungsten film 40 were formed by a sputter method. The extra gate insulating film and gate electrode film on the interlayer film are
It was removed by a normal lithography process and a dry etching process.

Through the above steps, all circuit transistors were completed. The manufactured semiconductor integrated circuit device exhibited a high operation speed and a small current leak during long-term use.

[0038]

As described above, according to the present invention, the second transistor group forming the internal circuit has a gate insulating film containing a high dielectric material. For this reason, it is possible to reduce the equivalent thickness of the gate insulating film and realize high-speed operation while suppressing generation of a leak current.

The gate insulating film of the transistor constituting the internal circuit may be a multilayer film including a film made of a silicon oxide material containing nitrogen and a film made of the high dielectric material formed thereon. If this is the case, it is possible to effectively prevent the deterioration of the high dielectric film during the manufacturing process, and to more effectively realize the suppression of the leak current and the high-speed operation of the internal circuit.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing an example of a semiconductor integrated circuit device of the present invention.

FIG. 2 is a schematic sectional view showing an example of a semiconductor integrated circuit device according to the present invention.

FIG. 3 is a schematic cross-sectional view showing one example of a method for manufacturing a semiconductor integrated circuit device of the present invention.

FIG. 4 is a schematic cross-sectional view showing one example of a method for manufacturing a semiconductor integrated circuit device of the present invention.

FIG. 5 is a diagram showing current-voltage characteristics of a MOS diode using a silicon oxide film and a MIS diode using a high dielectric film.

FIG. 6 is a schematic cross-sectional view of a conventional semiconductor integrated circuit device having gate oxide films having different thicknesses.

[Explanation of symbols]

 Reference Signs List 10 silicon substrate 20 element isolation oxide film 30 silicon oxynitride film 31 barium / strontium titanate film 32 silicon oxide film 33 tantalum oxide film 40 tungsten film 41 titanium nitride film 42 cobalt silicide film 43 nitride tungsten nitride film 51 polycrystalline silicon film 60 diffusion Layer 70 Silicon nitride film 71 Silicon oxide film 100 Input / output unit 200 Internal circuit

Continued on the front page F term (reference) 5F040 DA00 EC01 EC04 EC07 EC13 ED01 ED03 ED04 FC11 5F048 AA07 BB04 BB05 BB08 BB11 BB12 BB16 BB17 5F058 BA20 BD01 BD05 BD15 BD18 BF02 BJ01 BJ10

Claims (5)

[Claims] In a semiconductor integrated circuit device having an input / output unit and an internal circuit on a silicon substrate, a first transistor group forming the input / output unit has a gate insulating film made of a silicon oxide-based material. And a second transistor group forming the internal circuit has a gate insulating film including a high dielectric material having a higher dielectric constant than the silicon oxide-based material. 2. The gate insulating film of the second transistor group includes a first film made of a silicon oxide material containing nitrogen and a second film made of the high dielectric material formed thereon. 2. A multi-layer film comprising:
3. The semiconductor integrated circuit device according to 1. 3. The high dielectric material is tantalum oxide (T).
a ₂ O ₅ ), barium strontium titanate (Ba _x
The material is one or more materials selected from the group consisting of Sr _1-x TiO ₃ (0 <x <1)) and bismuth strontium tantalate (SrBi ₂ Ta ₂ O ₉ ). 3. The semiconductor integrated circuit device according to 1 or 2. 4. A step of forming a silicon oxide-based insulating film on a semiconductor substrate including an input / output section forming region and an internal circuit forming region, and forming a silicon film and a first conductive film on the silicon oxide-based insulating film. Forming a multilayer film in which a silicon nitride film is stacked in this order, and processing the silicon oxide-based insulating film and the multilayer film to form a first gate electrode in the input / output unit formation region; Forming a sacrificial gate electrode in the internal circuit formation region;
Forming a drain region; forming an interlayer insulating film so as to bury the first gate electrode and the sacrificial gate electrode; and forming the multilayer film and the silicon oxide-based insulating film included in the sacrificial gate electrode. Is selectively removed to form a concave portion, and in the concave portion, a first film made of a silicon oxide-based material containing nitrogen, and a first film made of a high dielectric material having a higher dielectric constant than the silicon oxide-based material. A step of forming a second film in this order, and a step of forming a second gate electrode by processing at least the second conductive film after depositing a second conductive film on the second film. A method for manufacturing a semiconductor integrated circuit device, comprising: 5. The high dielectric material is tantalum oxide (T).
a ₂ O ₅ ), barium strontium titanate (Ba _x
The material is one or more materials selected from the group consisting of Sr _1-x TiO ₃ (0 <x <1)) and bismuth strontium tantalate (SrBi ₂ Ta ₂ O ₉ ). 5. The method for manufacturing a semiconductor integrated circuit device according to item 4.