JP2000299563A - Method for forming via hole in printed wiring board - Google Patents

Method for forming via hole in printed wiring board

Info

Publication number
JP2000299563A
JP2000299563A JP10632699A JP10632699A JP2000299563A JP 2000299563 A JP2000299563 A JP 2000299563A JP 10632699 A JP10632699 A JP 10632699A JP 10632699 A JP10632699 A JP 10632699A JP 2000299563 A JP2000299563 A JP 2000299563A
Authority
JP
Japan
Prior art keywords
wiring board
printed wiring
via hole
forming
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10632699A
Other languages
Japanese (ja)
Inventor
Kenichi Kobayashi
健一 小林
Masako Okuyama
政子 奥山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinwa Co Ltd
Original Assignee
Shinwa Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinwa Co Ltd filed Critical Shinwa Co Ltd
Priority to JP10632699A priority Critical patent/JP2000299563A/en
Publication of JP2000299563A publication Critical patent/JP2000299563A/en
Pending legal-status Critical Current

Links

Landscapes

  • Punching Or Piercing (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

PROBLEM TO BE SOLVED: To obtain a fine boring method comparable to ordinary photo-via method or laser-via method by boring a wiring layer and an insulation layer through press. SOLUTION: A wiring board comprises a core board 10 arranged, on the surface thereof, with a wiring layer 11 of copper foil serving as the inner layer pattern of a multiplayer wiring board, an insulation layer 12 of thermosetting resin being applied onto the core board 10, and a wiring layer 13 of copper foil applied onto the surface of the insulation layer 12. Via holes are bored in the wiring board by press. Boring by press means boring by deformation processing comprising shearing or shaping and it is distinguished from ordinary boring, i.e., drilling with rotary drill. Boring is performed by driving a male die corresponding to the shape to be obtained into the wiring board down to a required depth with a strong pressure.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】この発明はプリント配線板に
関し、より詳細にはビルドアップ法によるプリント配線
板の製造時のビアホールの形成方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board, and more particularly, to a method of forming a via hole when manufacturing a printed wiring board by a build-up method.

【0002】[0002]

【従来の技術】実装密度を高めるための多層プリント配
線板の製造方法としてビルドアップ法が公知である。こ
の製法においては配線層(回路パターン)を表面に配し
たコア基板に樹脂からなる絶縁層と導体からなる配線層
を順次積み上げていくものであるが、異なる層の回路、
即ち絶縁層を挟む配線層を接続するためのビアホールの
形成に関し幾つかの方法が提案されている。
2. Description of the Related Art A build-up method is known as a method for manufacturing a multilayer printed wiring board for increasing the mounting density. In this manufacturing method, an insulating layer made of resin and a wiring layer made of a conductor are sequentially stacked on a core substrate having a wiring layer (circuit pattern) disposed on the surface.
That is, several methods have been proposed for forming via holes for connecting wiring layers sandwiching an insulating layer.

【0003】その1はフォトビア法と呼ばれる方法であ
り、コア基板に絶縁層として感光性の樹脂をコーティン
グし、写真法により孔を形成した後、銅メッキを施して
ビアホール導体を構成する。
The first is a method called a photo via method, in which a core substrate is coated with a photosensitive resin as an insulating layer, holes are formed by a photographic method, and then copper plating is performed to form a via hole conductor.

【0004】その2はレーザビア法と呼ばれる方法であ
り、コア基板に絶縁層として熱硬化性の樹脂をコーティ
ングするか熱硬化性の樹脂がコーティングされた銅箔を
積層し、レーザ加工により孔を形成した後、銅メッキを
施してビアホール導体を構成する。
The second is a method called a laser via method, in which a thermosetting resin is coated on a core substrate or a copper foil coated with a thermosetting resin is laminated as an insulating layer, and holes are formed by laser processing. After that, copper plating is performed to form a via-hole conductor.

【0005】その3はバンプ法と呼ばれる方法であり、
コア基板上に導電性ペーストを印刷・乾燥させてバンプ
を形成し、この上にFR−4材などからなる絶縁層を積
層することにより絶縁層を貫挿したバンプ先端を配線層
に接続しビアホール導体を構成する。
The third is a method called a bump method.
A conductive paste is printed and dried on the core substrate to form a bump, and an insulating layer made of FR-4 material or the like is laminated thereon. By connecting the tip of the bump penetrating the insulating layer to the wiring layer, a via hole is formed. Configure the conductor.

【0006】[0006]

【発明が解決しようとする課題】上記の方法のうち、フ
ォトビア法は写真法により複数の孔を一括して短時間に
形成することができる利点を有するが、反面、絶縁層の
樹脂の選択の巾が少なく、樹脂の特性から吸水性や樹脂
表面の密着強度に問題があり、又、コーティングにより
施された樹脂の厚みが不均一のために露光の過不足が生
じる問題があった。
Among the above-mentioned methods, the photo via method has an advantage that a plurality of holes can be formed collectively in a short time by the photographic method. The width is small, and there is a problem in water absorption and adhesion strength of the resin surface due to the characteristics of the resin, and there is a problem in that the thickness of the resin applied by coating is not uniform, resulting in excessive or insufficient exposure.

【0007】又、レーザビア法は加工精度が良好で樹脂
の選択の巾が広い利点を有するが、レーザマシンが高価
なことに加え、孔毎にレーザ光を個別に照射しなくては
ならず、更にコーティングにより施された樹脂の厚みが
不均一のためにレーザ光の条件設定が難しい問題があっ
た。一方、熱硬化性の樹脂がコーティングされた銅箔の
場合はレーザ光が銅箔面により反射されるために銅箔を
貫通できず、加工したいビアホールに対応して外層の銅
箔をエッチングしなければならない問題があった。
The laser via method has the advantages of good processing accuracy and a wide range of resin choices. However, in addition to the high cost of the laser machine, it is necessary to individually irradiate laser light for each hole. Further, there is a problem that it is difficult to set the conditions of the laser beam because the thickness of the resin applied by the coating is uneven. On the other hand, in the case of a copper foil coated with a thermosetting resin, the laser beam is reflected by the copper foil surface and cannot penetrate the copper foil, and the outer copper foil must be etched corresponding to a via hole to be processed. There was a problem to be had.

【0008】又、バンプ法はビアホール導体を構成する
ための銅メッキが不要である利点を有するが、バンプを
小さくすることに限界が有り、更にバンプと回路パター
ンのランドの位置精度を確保し難い問題があった。
Further, the bump method has an advantage that copper plating for forming a via hole conductor is unnecessary, but there is a limit in reducing the size of the bump, and further, it is difficult to secure the positional accuracy between the bump and the land of the circuit pattern. There was a problem.

【0009】[0009]

【課題を解決するための手段】この発明は以上の従来技
術の問題点に鑑みて創作されたものであり、ビルドアッ
プ法によるプリント配線板の製造において異なる層の回
路を接続するためのビアホールを形成するにあたり、配
線層及び絶縁層にプレス加工により孔あけを行うことを
特徴とする。
SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has a via hole for connecting circuits of different layers in manufacturing a printed wiring board by a build-up method. In forming the wiring layer, a hole is formed in the wiring layer and the insulating layer by press working.

【0010】[0010]

【発明の実施の形態】以下、この発明の具体的実施例を
添付図面に基づいて説明する。尚、この実施例において
は4層の配線板を例示しているが、層数はこれに限られ
ないことは勿論であり、又、コア基板、絶縁層、配線層
の素材も例示のものに限られないことは勿論である。
Embodiments of the present invention will be described below with reference to the accompanying drawings. In this embodiment, a four-layer wiring board is illustrated, but the number of layers is not limited to this, and the materials of the core substrate, the insulating layer, and the wiring layer are also illustrated. Of course, it is not limited.

【0011】図1乃至図4はこの発明のビアホール形成
方法の工程を示す図である。図中符号10は多層配線板
の内層パターンとなる銅箔からなる配線層11を表面に
配したコア基板、12はこのコア基板にコーティングさ
れる熱硬化性の樹脂からなる絶縁層、13はこの絶縁層
の表面に施される銅箔からなる配線層である。
FIGS. 1 to 4 are views showing steps of a method of forming a via hole according to the present invention. In the figure, reference numeral 10 denotes a core substrate on which a wiring layer 11 made of copper foil serving as an inner layer pattern of a multilayer wiring board is disposed, 12 denotes an insulating layer made of a thermosetting resin coated on the core substrate, and 13 denotes a core substrate. This is a wiring layer made of copper foil applied to the surface of the insulating layer.

【0012】以上の配線板にプレス加工によりビアホー
ルのための孔あけを行う。ここにプレス加工による孔あ
けとは、剪断や成形からなる塑性加工により孔あけを行
うことを指し、従来公知の回転ドリル歯の切削加工によ
る孔あけと区別される。この孔あけは具体的には得べき
孔の形状に応じた雄型を配線板に強圧力をもって所要の
深さ打ち込むことにより行われる。
A hole for a via hole is formed in the wiring board by press working. Here, punching by press working refers to punching by plastic working such as shearing or forming, and is distinguished from drilling by cutting of a conventionally known rotary drill tooth. Specifically, this hole is formed by driving a male mold corresponding to the shape of the hole to be obtained into the wiring board with a strong pressure to a required depth.

【0013】図中符号1はこの発明に使用する雄型であ
り、錐状に構成される。この雄型は1本のものをXY方
向に順次移動させることにより複数の孔あけを行う他、
予め孔の配置に合致して配した複数本の雄型を用意し一
括して孔あけを行うことが想定し得る。雄型は硬度の高
いものが望ましく、これに加えて一括して孔あけを行う
ために複数本の雄型を用意する場合は安価な材料で構成
されることが望ましくこの実施例では金属製としてい
る。
In the figure, reference numeral 1 denotes a male type used in the present invention, which is formed in a conical shape. This male type makes a plurality of holes by sequentially moving one thing in the X and Y directions,
It can be assumed that a plurality of male molds arranged in advance in accordance with the arrangement of the holes are prepared and the holes are punched collectively. It is desirable that the male mold has a high hardness, and in addition to this, when preparing a plurality of male molds for making a hole in a lump, it is preferable that the male mold be made of an inexpensive material. I have.

【0014】図6はこの実施例における雄型1の形状を
示す図であり、ここでは先端の打ち込み部2先端を切り
落とした円錐状のものを採用しているが、形状はこれに
限られず先端を切り落とさず鋭利に収束させてもよく、
又、図7に示すように多角錐状としても或いは角錐状と
してよいことは勿論である。図中符号3は雄型の打ち込
み部の先端に向けて開口して設けられた孔であり、塑性
加工時に生じる配線板の切りかすを逃がす機能を生じ
る。尚、この孔3は必ずしもこの発明の要件でなく、例
えば図7に示す多角錐状や角錐状の雄型の場合は、打ち
込み部先端2の角部により配線板が押し拡げられて変形
する結果打ち込み部先端の面部との間に隙間が生じ、こ
の隙間が切りかすを逃がす機能を生じることが期待でき
る。
FIG. 6 is a view showing the shape of the male mold 1 in this embodiment. Here, a conical shape in which the tip of the driving portion 2 is cut off is employed, but the shape is not limited to this. May be sharply converged without cutting off
Further, as shown in FIG. 7, it goes without saying that the shape may be a polygonal pyramid or a pyramid. In the figure, reference numeral 3 denotes a hole which is opened toward the tip of the male driving portion, and has a function of releasing chips generated on the wiring board during plastic working. The hole 3 is not always a requirement of the present invention. For example, in the case of a polygonal pyramid or a pyramid-shaped male type shown in FIG. A gap is formed between the tip of the driving portion and the surface portion, and it can be expected that the gap has a function of releasing chips.

【0015】上記の雄型1は多層配線板表面の配線層1
3のビアホールを施す箇所(具体的には接続用のランド
箇所)に配線板のZ方向に向けて打ち込まれる(図1及
び図2参照)。
The above-mentioned male mold 1 is a wiring layer 1 on the surface of a multilayer wiring board.
The via-hole is driven in the Z direction of the wiring board at a location where the third via hole is to be formed (specifically, a connection land location) (see FIGS. 1 and 2).

【0016】上記の打ち込みは雄型1の先端が内層の配
線層11のビアホールに対応する箇所(具体的には接続
用のパッド箇所)に達する深さに行わなければならない
が、この実施例においてはZ方向の打ち込み精度を高め
るために、下端面がプリント配線板の表面に当接するこ
とにより雄型の打ち込み深さを規制するためのフランジ
4を雄型の周側に設けている。上記打ち込み後、雄型を
引き抜いた箇所には配線板外層の配線層13、絶縁層1
2を貫通して内層の配線層11に達する孔Hが出現する
(図3参照)。
The above-described implantation must be performed at a depth where the tip of the male mold 1 reaches a location (specifically, a connection pad location) corresponding to the via hole of the inner wiring layer 11, but in this embodiment. In order to enhance the driving accuracy in the Z direction, a flange 4 for regulating the driving depth of the male die by contacting the lower end surface with the surface of the printed wiring board is provided on the peripheral side of the male die. After the above-mentioned implantation, the wiring layer 13 and the insulating layer 1 outside the wiring board were placed at the locations where the male mold was pulled out.
A hole H penetrating through 2 and reaching the inner wiring layer 11 appears (see FIG. 3).

【0017】上記配線層11(ランド箇所)、孔H、配
線層13(パッド箇所)には公知の手段によりこれらを
接続する銅メッキ13が施され、ビアホール導体が構成
される(図4参照)。
The wiring layer 11 (land portion), the hole H, and the wiring layer 13 (pad portion) are plated with copper 13 to connect them by a known means, thereby forming a via-hole conductor (see FIG. 4). .

【0018】ところで、この発明においては得られる孔
Hの深さは雄型1の打ち込みの深さにより決定されるも
のでありそれ以外の制約はない。よって、孔Hは実施例
におけるような2層の配線層間に限られず、例えば図5
に示すような3層の配線層間や或いはそれ以上のものも
想定し得る。
Incidentally, in the present invention, the depth of the hole H obtained is determined by the depth of the driving of the male mold 1, and there is no other restriction. Therefore, the hole H is not limited to between the two wiring layers as in the embodiment,
And three or more wiring layers as shown in FIG.

【0019】[0019]

【発明の効果】以上の構成よりなるこの発明のビアホー
ル形成方法は次の特有の効果を奏する。 周側に切削歯を形成しなければならない回転ドリル歯
による孔あけと異なり、雄型の直径を可及的に小さくす
ることが可能となるので、機械的な孔あけ加工でありな
がら従来のフォトビア法やレーザビア法に匹敵する微細
な孔あけが可能となる。 機械的な孔あけ加工であるので、孔あけ対象の材質に
より孔あけが不可能となることがなく外層の配線層ごと
孔あけができるので、配線層に予め開口を設けることが
不要となる。 同様の理由より配線板を構成する樹脂の種類の制約が
無くなるので、各種の樹脂を使用することが可能とな
る。 同様の理由に加えて孔の深さは雄型の打ち込みの深さ
により決定されるので、従来技術における2層間の孔あ
けに限らず多層間の孔あけも可能となる。 孔の深さは雄型の打ち込みの深さにより決定されるの
で、絶縁層の厚みの不均一による配線板表面の凹凸にか
かわりなく常に一定の深さの孔を得ることが可能とな
る。 従来のレーザビア法に比べて孔あけ用の設備は格段に
安価であり、又、雄型も安価に構成できるので、予め孔
の配置に合致して配した複数本の雄型を用意し一括して
孔あけを行うことが可能となり、作業時間の短縮及び位
置精度の向上が同時に実現できる。
The via hole forming method according to the present invention having the above-described structure has the following specific effects. Unlike drilling with rotary drill teeth, which must form cutting teeth on the circumferential side, the diameter of the male mold can be made as small as possible. Fine drilling comparable to the laser or laser via method is possible. Since the mechanical drilling process is used, drilling can be performed for the entire outer wiring layer without making the drilling impossible depending on the material to be drilled. Therefore, it is not necessary to provide an opening in the wiring layer in advance. For the same reason, there is no restriction on the type of resin constituting the wiring board, so that various resins can be used. In addition to the same reason, since the depth of the hole is determined by the depth of the male implantation, it is possible not only to form the hole between the two layers in the related art but also to form the hole between the multilayers. Since the depth of the hole is determined by the depth of the male implantation, it is possible to always obtain a hole having a constant depth irrespective of the unevenness of the surface of the wiring board due to the uneven thickness of the insulating layer. Compared with the conventional laser via method, the equipment for drilling is extremely inexpensive, and the male mold can be configured at low cost.Therefore, prepare multiple male molds that are arranged in advance according to the hole arrangement and collectively Drilling can be performed, thereby shortening the working time and improving the positional accuracy at the same time.

【図面の簡単な説明】[Brief description of the drawings]

【図1】 この発明によるビアホール形成の工程を示す
プリント配線板の断面図。
FIG. 1 is a sectional view of a printed wiring board showing a step of forming a via hole according to the present invention.

【図2】 この発明によるビアホール形成の工程を示す
プリント配線板の断面図。
FIG. 2 is a cross-sectional view of a printed wiring board showing a step of forming a via hole according to the present invention.

【図3】 この発明によるビアホール形成の工程を示す
プリント配線板の断面図。
FIG. 3 is a cross-sectional view of a printed wiring board showing a step of forming a via hole according to the present invention.

【図4】 この発明によるビアホール形成の工程を示す
プリント配線板の断面図。
FIG. 4 is a sectional view of a printed wiring board showing a step of forming a via hole according to the present invention.

【図5】 異なる実施例のビアホール形成の工程を示す
プリント配線板の断面図。
FIG. 5 is a cross-sectional view of a printed wiring board showing a step of forming a via hole according to another embodiment.

【図6】 雄型の要部の斜視図。FIG. 6 is a perspective view of a main part of a male mold.

【図7】 異なる実施例の雄型の要部の斜視図。FIG. 7 is a perspective view of a main part of a male mold according to a different embodiment.

【符号の説明】[Explanation of symbols]

1 雄型 12 絶縁層 13 配線層 H 孔 Reference Signs List 1 male type 12 insulating layer 13 wiring layer H hole

Claims (7)

【特許請求の範囲】[Claims] 【請求項1】 ビルドアップ法によるプリント配線板の
製造において異なる層の回路を接続するためのビアホー
ルを形成するにあたり、配線層及び絶縁層にプレス加工
により孔あけを行うことを特徴とするプリント配線板に
おけるビアホール形成方法。
1. A printed wiring, characterized in that in forming a via hole for connecting circuits of different layers in the manufacture of a printed wiring board by a build-up method, a hole is formed in a wiring layer and an insulating layer by press working. A method of forming a via hole in a plate.
【請求項2】 錐状の雄型を配線層及び絶縁層に所要の
深さ打ち込むことにより孔あけを行う請求項1記載のプ
リント配線板におけるビアホール形成方法。
2. A method of forming a via hole in a printed wiring board according to claim 1, wherein the hole is formed by driving a conical male mold into the wiring layer and the insulating layer to a required depth.
【請求項3】 雄型は打ち込み部を円錐状とした形状で
ある請求項2記載のプリント配線板におけるビアホール
形成方法。
3. The method for forming a via hole in a printed wiring board according to claim 2, wherein the male mold has a shape in which the implanted portion has a conical shape.
【請求項4】 雄型は打ち込み部を角錐又は多角錐状と
した形状である請求項2記載のプリント配線板における
ビアホール形成方法。
4. The method for forming a via hole in a printed wiring board according to claim 2, wherein the male mold has a shape in which a driving portion is formed into a pyramid or a polygonal pyramid.
【請求項5】 雄型の打ち込み部の先端を切り落とした
請求項3又は4記載のプリント配線板におけるビアホー
ル形成方法。
5. The method for forming a via hole in a printed wiring board according to claim 3, wherein the tip of the male-type driving portion is cut off.
【請求項6】 打ち込み部の先端に向けて開口した孔を
雄型に設けた請求項2から5の何れかに記載のプリント
配線板におけるビアホール形成方法。
6. The method for forming a via hole in a printed wiring board according to claim 2, wherein a hole opened toward the tip of the driving portion is provided in a male form.
【請求項7】 下端面がプリント配線板の表面に当接す
ることにより雄型の打ち込み深さを規制するためのフラ
ンジを雄型の周側に設けた請求項2から6の何れかに記
載のプリント配線板におけるビアホール形成方法。
7. The male die according to claim 2, wherein a flange for regulating a driving depth of the male die by contacting a lower end surface with a surface of the printed wiring board is provided on a peripheral side of the male die. A method of forming a via hole in a printed wiring board.
JP10632699A 1999-04-14 1999-04-14 Method for forming via hole in printed wiring board Pending JP2000299563A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010074650A1 (en) * 2008-12-23 2010-07-01 Trelleborg Rubore Ab A method of forming a cutting line partially through a multilayer plate structure.
CN108419374A (en) * 2018-05-18 2018-08-17 湖州旭源电气科技有限公司 A kind of pcb board automatic processing device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010074650A1 (en) * 2008-12-23 2010-07-01 Trelleborg Rubore Ab A method of forming a cutting line partially through a multilayer plate structure.
CN102264513A (en) * 2008-12-23 2011-11-30 特雷勒堡鲁博尔公司 Method of forming cutting line partially through multilayer plate structure
CN102264513B (en) * 2008-12-23 2014-07-23 特瑞堡密封设备卡尔马有限公司 Method of forming cutting line partially through multilayer plate structure
US9050732B2 (en) 2008-12-23 2015-06-09 Trelleborg Sealing Solutions Kalmar Ab Method of forming a cutting line partially through a multilayer plate structure
CN108419374A (en) * 2018-05-18 2018-08-17 湖州旭源电气科技有限公司 A kind of pcb board automatic processing device

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