JP2000293485A5 - - Google Patents

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Publication number
JP2000293485A5
JP2000293485A5 JP1999101066A JP10106699A JP2000293485A5 JP 2000293485 A5 JP2000293485 A5 JP 2000293485A5 JP 1999101066 A JP1999101066 A JP 1999101066A JP 10106699 A JP10106699 A JP 10106699A JP 2000293485 A5 JP2000293485 A5 JP 2000293485A5
Authority
JP
Japan
Prior art keywords
signal line
control signal
communication interface
master system
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1999101066A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000293485A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP11101066A priority Critical patent/JP2000293485A/ja
Priority claimed from JP11101066A external-priority patent/JP2000293485A/ja
Priority to US09/545,279 priority patent/US6665757B1/en
Publication of JP2000293485A publication Critical patent/JP2000293485A/ja
Publication of JP2000293485A5 publication Critical patent/JP2000293485A5/ja
Pending legal-status Critical Current

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JP11101066A 1999-04-08 1999-04-08 通信インターフェース Pending JP2000293485A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP11101066A JP2000293485A (ja) 1999-04-08 1999-04-08 通信インターフェース
US09/545,279 US6665757B1 (en) 1999-04-08 2000-04-07 Communication interface having a master activating/deactivating a first signal with a clock signal after a predetermined time after a slave activating/deactivating the first signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11101066A JP2000293485A (ja) 1999-04-08 1999-04-08 通信インターフェース

Publications (2)

Publication Number Publication Date
JP2000293485A JP2000293485A (ja) 2000-10-20
JP2000293485A5 true JP2000293485A5 (en, 2012) 2006-06-01

Family

ID=14290743

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11101066A Pending JP2000293485A (ja) 1999-04-08 1999-04-08 通信インターフェース

Country Status (2)

Country Link
US (1) US6665757B1 (en, 2012)
JP (1) JP2000293485A (en, 2012)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1299217C (zh) * 2003-09-11 2007-02-07 宏达国际电子股份有限公司 具有多功能高速总线的可携式电子系统及其方法
US7308516B2 (en) * 2004-04-26 2007-12-11 Atmel Corporation Bi-directional serial interface for communication control
US8099537B2 (en) * 2006-04-26 2012-01-17 Panasonic Corporation Method, device, and system for transmitting data fragments over multiple transmission lines and techniques for stopping data transmission
EP1931042B1 (en) * 2006-12-04 2015-07-22 Fujitsu Ten Limited Electronic apparatus and electronic system
US8825933B2 (en) * 2011-11-30 2014-09-02 Andes Technology Corporation Bus apparatus with default speculative transactions and non-speculative extension
US10089274B2 (en) * 2013-03-13 2018-10-02 Atieva, Inc. Dual voltage communication bus
US9461601B2 (en) * 2013-05-20 2016-10-04 Maxim Integrated Products, Inc. Multichannel digital audio interface
US9369272B2 (en) * 2014-03-27 2016-06-14 Qualcomm Incorporated Serial time-division-multiplexed bus with bidirectional synchronization/control word line
CN107436851B (zh) * 2016-05-26 2020-05-12 北京联合大学 串行外设接口四线隔离系统及其控制方法
CN112485750B (zh) * 2020-11-09 2022-08-02 杭州西力智能科技股份有限公司 一种智能电表的通信模块接口测试方法及系统
CN113176751B (zh) * 2021-04-28 2022-09-20 青岛歌尔智能传感器有限公司 数据传输方法、设备及计算机可读存储介质

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5142594A (en) * 1983-04-02 1992-08-25 Canon Kabushiki Kaisha Image data communication control system
CA1242283A (en) * 1984-11-30 1988-09-20 Ikio Yoshida Serial interface system flexibly applicable to a one- to-plurality connection
JPS6358567A (ja) * 1986-08-28 1988-03-14 Nec Corp 直列インタフエ−スバス方式
JP3008441B2 (ja) * 1990-04-28 2000-02-14 日本電気株式会社 セキュリティモジュール
JP3134819B2 (ja) * 1997-06-04 2001-02-13 ソニー株式会社 データ処理装置
JPH06324977A (ja) * 1993-05-14 1994-11-25 Matsushita Electric Ind Co Ltd データ転送方法
US5758098A (en) * 1994-05-12 1998-05-26 Apple Computer, Inc. Method and apparatus for providing a high throughput two-conductor serial interface with support for slave device detection
ATE205616T1 (de) * 1994-10-19 2001-09-15 Advanced Micro Devices Inc Integrierte prozessorsysteme für tragbare informationsgeräte
DE19649258C2 (de) * 1996-11-28 2002-11-14 Lucent Tech Network Sys Gmbh Bussystem und Verfahren zur Datenübertragung
US6434650B1 (en) * 1998-10-21 2002-08-13 Intel Corporation Apparatus and method for multiplexing bi-directional data onto a low pin count bus between a host CPU and co-processor
US6434654B1 (en) * 1999-03-26 2002-08-13 Koninklijke Philips Electronics N.V. System bus with a variable width selectivity configurable at initialization
US6446154B1 (en) * 1999-11-03 2002-09-03 Intel Corporation Method and mechanism for virtualizing legacy sideband signals in a hub interface architecture

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