JP2000286449A - Iii nitride compound semiconductor device and its manufacture - Google Patents

Iii nitride compound semiconductor device and its manufacture

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JP2000286449A
JP2000286449A JP9229199A JP9229199A JP2000286449A JP 2000286449 A JP2000286449 A JP 2000286449A JP 9229199 A JP9229199 A JP 9229199A JP 9229199 A JP9229199 A JP 9229199A JP 2000286449 A JP2000286449 A JP 2000286449A
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compound semiconductor
iii nitride
nitride compound
group iii
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JP3760663B2 (en
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Hisayoshi Kato
Norikatsu Koide
久喜 加藤
典克 小出
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Toyoda Gosei Co Ltd
豊田合成株式会社
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Abstract

PROBLEM TO BE SOLVED: To prevent the diffusion of the impurity intrinsic to a substrate into a III nitride compound semiconductor layer by forming the III nitride compound semiconductor layer on an upper face of the silicon substrate, with a side wall of the silicon substrate covered with a diffusion preventive film. SOLUTION: On a Si substrate 11 (a (111) face), a TiN layer 13 (a TiN single crystal, 3000 Å) is formed. Then, a buffer layer 14 (Al0.9Ga0.1N, 150 Å) is grown on the layer 13. Then, this buffer layer/TiN/Si sample is taken out of a chamber of a MOCVD equipment and is transferred to an oxide film formation equipment to be left as it is for 15 min, at 900 deg.C. By this process, a side face 11s and a bottom face 11b of the substrate 11 are oxidized and a silicon oxide diffusion preventive layer 18 is formed. Thereafter, the sample is moved back to the chamber of the MOCVD equipment and an n-clad layer 15 (n-GaN: Si, 4 μm), a light emitting layer 16 (a superlattice structure), and a p-clad layer 17 (p-GaN: Mg, 0.3 μm) are deposited in order. Then, the diffusion preventive layer 18 is removed by etching.

Description

【発明の詳細な説明】 DETAILED DESCRIPTION OF THE INVENTION

【0001】 [0001]

【産業上の利用分野】本発明はIII族窒化物系化合物半導体素子及びその製造方法に関する。 The present invention relates to a semiconductor device and a manufacturing method thereof III nitride compound. 詳しくは、高品質のIII族窒化物系化合物半導体層を得るためのIII族窒化物系化合物半導体素子の製造方法の改良に関する。 More particularly, to an improved manufacturing method of a group III nitride compound semiconductor device for obtaining a group III nitride compound semiconductor layer of high quality.

【0002】 [0002]

【従来の技術】従来、導電性のシリコン基板上にIII族窒化物系化合物半導体層を積層した構成の素子が知られている。 Conventionally, the structure of the device is known by laminating a Group III nitride compound semiconductor layer on a conductive silicon substrate. 導電性のシリコン基板を用いることの利点として、基板に直接電極を接続することが可能となり、電極を接続するために半導体層を複雑にエッチングする工程が不要となることが挙げられる。 The advantage of using a silicon substrate of a conductive, it is possible to connect the electrode directly to the substrate, the step of complex etching the semiconductor layer and the like that becomes unnecessary to connect the electrodes. また、半導体素子のチャージアップの問題も解消できる等の利点もある。 Another advantage of such may be eliminated charge-up problem of the semiconductor device. III III
族窒化物系化合物半導体素子は、短波長の発光素子、レーザーダイオード、各種電子デバイスとして利用される。 Nitride-based compound semiconductor device, short-wavelength light emitting element, a laser diode is used as various electronic devices.

【0003】 [0003]

【発明が解決しようとする課題】高品質の素子を再現性良く、かつ高い歩留まりで得るためには、基板ウエハー上にIII族窒化物系化合物半導体層をその全域において均質に成長させる必要がある。 BRIEF Problems to be Solved] high-quality reproduction elements well, and in order to obtain a high yield, it is necessary to uniformly grow the group III nitride compound semiconductor layer in its entire area on the substrate wafer . しかしながら、本発明者らが、シリコン基板上にMOCVD法により成長させた However, the present inventors were grown by MOCVD on silicon substrates
III族窒化物系化合物半導体層を観察したところ、その中央部分と周縁部分とで結晶の様子が異なっていた。 Observation of the Group III nitride compound semiconductor layer, appearance of crystals was different between the center portion and the peripheral portion. すなわち、中央部分では設計通りに結晶性良くIII族窒化物系化合物半導体層がエピタキシャル成長しているものの、周縁部分ではIII族窒化物系化合物半導体層の結晶性が低下していた。 That is, although good crystallinity Group III nitride compound semiconductor layer as designed in the central portion is epitaxially grown, the crystallinity of the Group III nitride-based compound semiconductor layer was decreased in the peripheral portion. 本発明者らの検討によれば、かかる周縁部分での結晶性の低下はMOCVD法を実行するときの高温でシリコン基板の材料が蒸発し、III族窒化物系化合物半導体層中へ拡散することによるものと考えられる。 According to the studies of the present inventors, lowering of crystallinity in such peripheral portion of the material of the silicon substrate is evaporated at a high temperature when performing the MOCVD method, diffuse into the Group III nitride compound semiconductor layer that It is considered to be due. また、シリコンがIII族窒化物系化合物半導体層中に拡散するとIII族窒化物系化合物半導体の伝導型及び導電率にも影響がでるため好ましくない。 The silicon is not preferable because the impact on the conductivity type and conductivity of the Group III nitride compound semiconductor III nitride compound when dispersed into the layer a semiconductor comes out.

【0004】 [0004]

【課題を解決するための手段】本発明は、上記課題に鑑みてなされたものであり、高品質のIII族窒化物系化合物半導体素子を得るための新規な製造方法を提供することを目的とする。 Means for Solving the Problems The present invention has been made in view of the above problems, and aims to provide a novel manufacturing method for obtaining high-quality Group III nitride compound semiconductor device to. その構成は以下の通りである。 Its configuration is as follows. シリコン基板の側壁を拡散防止層で被覆した状態でIII族窒化物系化合物半導体を前記シリコン基板の上面に成長させる、ことを特徴とするIII族窒化物系化合物半導体素子の製造方法。 The sidewalls of the silicon substrate to grow a group III nitride compound semiconductor in a state of being covered with the diffusion preventing layer on the upper surface of the silicon substrate, the manufacturing method of a group III nitride compound semiconductor device, characterized in that.

【0005】上記の製造方法によれば、III族窒化物系化合物半導体層を成長させるとき当該III族窒化物系化合物半導体層に最も近いシリコン基板の側壁が酸化シリコン層で覆われるため、基板材料であるシリコンがそこから蒸発することが防止される。 [0005] According to the above manufacturing method, since the side walls of the nearest silicon substrate to the Group III nitride compound semiconductor layer when growing the group III nitride compound semiconductor layer is covered with a silicon oxide layer, the substrate material thereby preventing the silicon is to evaporate therefrom. これにより、基板由来の不純物がIII族窒化物系化合物半導体層に拡散することが防止され、その結果、結晶性に優れ、かつ全域で均質のIII族窒化物系化合物半導体層が形成される。 Thus, it is prevented that impurities from the substrate from diffusing into the Group III nitride-based compound semiconductor layer, as a result, excellent crystallinity, and homogeneous Group III nitride compound semiconductor layer across are formed. また、III族窒化物系化合物半導体層の伝導型及び導電率も安定する。 Further, conductivity type and conductivity of the Group III nitride compound semiconductor layer is stabilized. もって、高品質のIII族窒化物系化合物半導体素子を再現性良く製造することができる。 It has can be manufactured with good reproducibility high-quality Group III nitride compound semiconductor device.

【0006】 [0006]

【発明の実施の形態】上記において、拡散防止層はIII DETAILED DESCRIPTION OF THE INVENTION In the above, the diffusion preventing layer III
族窒化物系化合物半導体を成長させるとき、その成長温度及び環境において安定であって、シリコン基板の材料が蒸発することを防止できるものであれば特にその材料は限定されない。 When growing a group nitride compound semiconductor, a stable in the growth temperature and the environment, in particular the material as long as the material of the silicon substrate can be prevented from evaporating is not limited. 例えば、酸化シリコンや窒化シリコンなどを挙げることができる。 For example, a silicon oxide or silicon nitride. かかる拡散防止層の形成方法も特に限定されるものではなく、CVD法やスパッタ法等の一般的な方法が採用できる。 Forming method according diffusion preventing layer is not particularly limited, typical methods such as a CVD method or a sputtering method can be employed. 拡散防止層が酸化シリコン製のときは、基板を酸素や水の雰囲気下で高温処理するか若しくは所定のエッチャント(H O、H When the diffusion preventing layer is made of silicon oxide, either or predetermined etchant to the high temperature treatment of the substrate in an atmosphere of oxygen and water (H 2 O, H
、NH OH混合液)へ基板を浸漬することによりこれを形成することができる。 Can be formed this by 2 O 2, NH 3 OH mixture) into the substrate is immersed. なお、このような酸化処理を行うとシリコン基板の裏面にも酸化シリコン層が形成される場合があるが、この発明は基板裏面への酸化シリコン層、即ち拡散防止層の形成を除外するものではない。 Incidentally, there are cases where even a silicon oxide layer on the back surface of the silicon substrate is formed when performing such oxidation treatment, the invention is intended to exclude the formation of the silicon oxide layer, i.e. the diffusion preventing layer on the back surface of the substrate is Absent. 換言すれば、III族窒化物系化合物半導体を成長させる面以外のシリコン基板の面を当該拡散防止層で被覆する。 In other words, the surface of the silicon substrate other than the surface of growing a group III nitride compound semiconductor is covered with the diffusion preventing layer.

【0007】シリコンによる汚染を回避したいIII族窒化物系化合物半導体層を成長させる前までに拡散防止層はシリコン基板の側壁へ形成される。 [0007] anti-diffusion layer and before growing the Group III nitride compound semiconductor layer to be avoid contamination by silicon is formed to a sidewall of the silicon substrate. AlNやGaN等のIII族窒化物系化合物半導体からなる低温成長バッファ層を用いるときは、その形成時にはシリコンの蒸発量が少ない。 When using low-temperature growth buffer layer made of a Group III nitride compound semiconductor of AlN and GaN or the like is less evaporation amount of silicon during its formation. 従って、当該バッファ層を形成した後、シリコン基板を酸化処理して酸化シリコン製の拡散防止層を形成する。 Thus, after forming the buffer layer, a silicon substrate oxidation treatment to form a diffusion preventing layer made of silicon oxide. なお、このときIII族窒化物系化合物半導体からなるバッファ層は酸化処理の影響を受けない。 At this time III nitride compound buffer layer made of a semiconductor is not affected by the oxidation process. また、n層のIII族窒化物系化合物半導体にはシリコンが拡散してもその伝導型に影響が出ないので、発光素子の場合、nクラッド層を形成した後、活性層及びp型クラッド層を形成する前に当該酸化処理を行っても良い。 Further, since the silicon in group III nitride compound semiconductor of the n-layer is not affected in its conduction type be diffused, in the case of the light emitting element, after forming the n-cladding layer, active layer and p-type clad layer it may be performed the oxidation treatment before the formation of the. また、シリコン基板表面へ酸化シリコンのストライプ層を形成する所謂LEO法(Appl.Phys.Lett. Moreover, so-called LEO method for forming a stripe layer of silicon oxide to the silicon substrate surface (Appl.
71(18)、3 Nov. 71 (18), 3 Nov. 1997参照)を実行するときには、当該酸化シリコンのストライプ層を形成するステップを実行する際に、若しくはそのステップの前後に当該シリコン基板の側面へ酸化シリコン層を形成することが好ましい。 When running 1997.), when performing the step of forming a stripe layer of the silicon oxide, or it is preferable to form a silicon oxide layer to the side face of the silicon substrate before and after the step. 拡散防止層の膜厚は特に限定されないが、0.02〜1.0μmとすることが好ましい。 The thickness of the diffusion preventing layer is not particularly limited, it is preferable that the 0.02 to 1.0 m.

【0008】III族窒化物系化合物半導体は、一般式としてAl Ga In 1ーXーY N(0≦X≦1、0≦ [0008] Group III nitride compound semiconductor, Al X Ga Y In 1-X over Y N (0 ≦ X ≦ 1,0 ≦ a general formula
Y≦1、0≦X+Y≦1)で表されるものであるが、更にIII族元素としてボロン(B)、タリウム(Tl)を含んでもよく、また、窒素(N)の一部を、リン(P)、ヒ素(As)、アンチモン(Sb)、ビスマス(Bi)で置き換えても良い。 But is represented by Y ≦ 1,0 ≦ X + Y ≦ 1), may contain further boron as a group III element (B), thallium (Tl), also a part of nitrogen (N), phosphorus (P), arsenic (As), may be replaced with antimony (Sb), bismuth (Bi). III族窒化物系化合物半導体は任意のドーパントを含むものであっても良い。 Group III nitride-based compound semiconductor may contain any dopant. II II
I族窒化物系化合物半導体層の形成方法は特に限定されないが、例えば、周知の有機金属化合物気相成長法(この明細書で、「MOCVD法」という。)により形成される。 The method of forming the I nitride compound semiconductor layer is not particularly limited, for example, (in this specification, referred to. "MOCVD method") known metal organic vapor phase epitaxy is formed by. また、周知の分子線結晶成長法(MBE法)やハライド系気相成長法(HVPE法)等によっても形成することができる。 It can also be formed by well known molecular beam epitaxy method (MBE method) and halide vapor phase epitaxy (HVPE) or the like. III族窒化物系化合物半導体の層は素子の種類、目的に応じて複数設ける。 Group III nitride-based compound semiconductor layer on the type of device, providing a plurality depending on the purpose. 例えば、後述の実施例における発光素子では、n型III族窒化物系化合物半導体層、発光層、p型III族窒化物系化合物半導体層を形成する。 For example, the light-emitting elements in the Examples below, n-type Group III nitride-based compound semiconductor layer, light emitting layer, a p-type Group III nitride compound semiconductor layer.

【0009】III族窒化物系化合物半導体を成長させるときの温度が高いほど、シリコン基板からのシリコンの脱離量が多くなる。 [0009] As the temperature at the time of growing the Group III nitride compound semiconductor is higher, the greater the amount of released silicon from the silicon substrate. 従って、その成長温度が800〜1 Therefore, the growth temperature is 800 to 1
200℃であるIII族窒化物系化合物半導体を成長させる前までに、シリコン基板の側壁に拡散防止層を形成しておくことが好ましい。 And before growing the Group III nitride compound semiconductor is 200 ° C., it is preferable to form the diffusion preventing layer on the sidewall of the silicon substrate. したがって, Therefore,

【0010】III族窒化物系化合物半導体層を積層した後、拡散防止層を除去する。 [0010] After laminating Group III nitride compound semiconductor layer, removing the anti-diffusion layer. この拡散防止層を残存させても良い。 The diffusion prevention layer may be left.

【0011】 [0011]

【実施例】次にこの発明の実施例について説明する. (第1実施例)図1に本発明の製造方法により作製した発光素子10の構成を示す。 EXAMPLES Next showing the configuration of embodiment will be described. Emitting element 10 was fabricated by the manufacturing method of the present invention (first embodiment) FIG 1 of the present invention. 各層のスペックは次の通りである。 Each layer of the specs are as follows. 層 : 組成:ドーパント (膜厚) pクラッド層 17 : p−GaN:Mg (0.3μm) 発光層 16 : 超格子構造 量子井戸層 :In 0.15 Ga 0.85 N (35Å) バリア層 :GaN (35Å) 量子井戸とバリア層の繰り返し数:1〜10 nクラッド層 15 : n−GaN:Si (4μm) バッファ層 14 : Al 0.9 Ga 0.1 N (150Å) TiN層 13 : TiN単結晶 (3000Å) 基板 11 : Si(111) (300μm) バッファ層14及び各半導体層の成長はMOCVD法により行われる。 Layer: Composition: dopant (thickness) p-cladding layer 17: p-GaN: Mg ( 0.3μm) emission layer 16: superlattice structure Quantum well layer: In 0.15 Ga 0.85 N (35Å ) Barrier layer: GaN (35 Å) the number of repetitions of the quantum well and barrier layers: 1 to 10 n cladding layer 15: n-GaN: Si ( 4μm) buffer layer 14: Al 0.9 Ga 0.1 n ( 150Å) TiN layer 13: TiN single crystal (3000 Å) substrate 11: Si (111) (300μm) growth of buffer layer 14 and the respective semiconductor layers is performed by MOCVD. この成長法においては、アンモニアガスとIII族元素のアルキル化合物ガス、例えばトリメチルガリウム(TMG)、トリメチルアルミニウム(TM In this growth method, alkyl compounds of ammonia gas and group III element gas such as trimethyl gallium (TMG), trimethyl aluminum (TM
A)やトリメチルインジウム(TMI)とを適当な温度に加熱された基板上に供給して熱分解反応させ、もって所望の結晶を基板の上に成長させる。 Is supplied onto the substrate which is heated and A) and trimethylindium (TMI) to a suitable temperature by a thermal decomposition reaction, have been growing desired crystal on the substrate. 勿論、各半導体層の形成方法はこれに限定されるものではなく、周知のM Of course, the method of forming the respective semiconductor layers is not limited thereto, the well-known M
BE法によっても形成することができる。 It can be formed by BE method.

【0012】nクラッド層15は発光層16側の低電子濃度n 層とバッファ層14側の高電子濃度n 層となる2層構造とすることができる。 [0012] n-cladding layer 15 is low electron density n of the light-emitting layer 16 side - may be a two-layer structure of the layer and the buffer layer 14 side of the high electron density n + layer. 発光層16は超格子構造のものに限定されない。 Emitting layer 16 is not limited to the superlattice structure. 発光素子の構成としてはシングルへテロ型、ダブルへテロ型及びホモ接合型のものなどを用いることができる。 The structure of the light-emitting element may be used such as those hetero type single, a double hetero type, and homojunction type. 発光層16とpクラッド層1 Emitting layer 16 and the p-cladding layer 1
7との間にマグネシウム等のアクセプタをドープしたバンドキャップの広いAl Ga In 1−X−Y N(0 7 broad Al X band cap doped with acceptor magnesium or the like between the Ga Y In 1-X-Y N (0
≦X≦1、0≦Y≦1、X+Y≦1)層を介在させることができる。 ≦ X ≦ 1,0 ≦ Y ≦ 1, X + Y ≦ 1) layer may be interposed. これは発光層16の中に注入された電子がpクラッド層17に拡散するのを防止するためである。 This is to prevent electrons injected into the light emitting layer 16 from diffusing into the p-cladding layer 17.
pクラッド層17を発光層16側の低ホール濃度p 層と電極側の高ホール濃度p 層とからなる2層構造とすることができる。 low hole concentration of the p-cladding layer 17 emitting layer 16 side p - may be a two-layer structure consisting of a high hole concentration p + layer of the layer and the electrode.

【0013】以下、図1及び図2を参照しながら実施例の発光素子10の製造方法を説明する。 [0013] Hereinafter, a method of manufacturing the light emitting device 10 of the embodiment will be described with reference to FIGS. まず、Si(1 First, Si (1
11)面にTiN層13が形成される。 11) surface TiN layer 13 is formed. 成長の方法はT The method of growth is T
hinSolid Films 271(1995) hinSolid Films 271 (1995)
108〜116頁を参照されたい。 Pp. 108-116. その後、TiN/S Then, TiN / S
iサンプルをスパッタ装置からMOCVD装置のチャンバ内に移し変える。 The i samples varied transferred into the chamber of the MOCVD apparatus from the sputtering device. このチャンバ内へ水素ガスを流通させながら当該サンプルを1000℃まで昇温させて5分間維持する。 This while flowing hydrogen gas into the chamber is allowed to warm the sample to 1000 ° C. is maintained for 5 minutes.

【0014】その後、AlGaNバッファ層14を成長させる(図2(a))。 [0014] Then, to grow the AlGaN buffer layer 14 (FIG. 2 (a)). 次に、バッファ層/TiN/S Next, the buffer layer / TiN / S
iサンプル30を一旦MOCVD装置のチャンバ内から取りだし、水蒸気で酸化する装置へ移す。 The i samples 30 once removed from the chamber of the MOCVD apparatus and transferred to the device to oxidize with water vapor. そして、当該酸化膜形成装置内で900℃の条件下15分間放置する。 Then, they left in the oxide film forming apparatus 900 ° C. under 15 minutes. これにより、基板11の側面11s及び底面11b Thus, the side surface 11s and the bottom surface 11b of the substrate 11
の表面が酸化され、酸化シリコンからなる拡散防止層1 The surface of the oxidation, diffusion prevention layer 1 made of silicon oxide
8が形成される(図2(b))。 8 is formed (Figure 2 (b)). 本実施例では、水蒸気による酸化処理をMOCVD装置とは別の装置で行ったが、もちろんMOCVD装置チャンバ内で同様の処理を行うこともできる。 In this embodiment, the oxidation treatment with steam was carried out in a different apparatus from the MOCVD apparatus, it is also possible to perform the same processing course MOCVD apparatus chamber. また、酸化処理は水蒸気によるものに限られず、他の一般的な方法を採用できることは言うまでもない。 Further, the oxidation process not limited to by water vapor, can of course be employed other common methods.

【0015】その後、サンプル30をMOCVD装置のチャンバ内にもどし、常法に従いnクラッド層15、発光層16、及びpクラッド層17が順次積層される(図2(c))。 [0015] Then, back to the sample 30 into the chamber of the MOCVD apparatus, n cladding layer 15, the light emitting layer 16 and the p-cladding layer 17, it is sequentially laminated in a conventional manner (FIG. 2 (c)). 各半導体層の成長は約1000℃の高温で行われるが、予め基板側面及び底面が高温に安定な酸化シリコンにより被覆されているため、基板材料であるシリコンが基板表面より蒸発し各半導体層に拡散することが防止される。 Although growth of the semiconductor layers is carried out at a high temperature of about 1000 ° C., in advance since the substrate side and bottom surfaces is coated with a stable oxide silicon to a high temperature, it evaporates from the silicon substrate surface which is substrate material for the semiconductor layer be diffused can be prevented. これにより、結晶性に優れた各半導体層を成長させることができる。 Thus, it is possible to grow the semiconductor layers with excellent crystallinity. また、基板由来のシリコンがIII族窒化物系化合物半導体層に拡散すればドナー不純物として挙動するためIII族窒化物系化合物半導体層の導電率に影響するが、かかるシリコンの拡散を防止することにより半導体層の導電率を変化させるおそれがなくなる。 Further, by a silicon-derived substrates but affects the conductivity of the Group III nitride compound semiconductor layer to behave as a donor impurity when diffused in a group III nitride compound semiconductor layer, which prevents diffusion of such silicon possibility of changing the conductivity of the semiconductor layer is eliminated. その結果、所望の伝導型及び導電率を有するII As a result, II having a desired conductivity type and conductivity
I族窒化物系化合物半導体層を再現性良く成長させることができる。 The I nitride compound semiconductor layer can be reproducibly grown.

【0016】続いて、ドライエッチング、ウエットエッチング等のエッチングにより拡散防止層18を除去する(図2(d))。 [0016] Then, dry etching, to remove the diffusion barrier layer 18 by etching such as wet etching (Figure 2 (d)).

【0017】透光性電極19は金を含む薄膜であり、p The transparent electrode 19 is a thin film containing gold, p
クラッド層17の上面の実質的な全面を覆って積層される。 It is stacked over the substantial entire upper surface of the cladding layer 17. p電極20も金を含む材料で構成されており、蒸着により透光性電極19の上に形成される。 p electrode 20 is also formed of a material containing gold, it is formed on the transparent electrode 19 by vapor deposition. なお、Si基板11がn電極となる。 Incidentally, Si substrate 11 is n-electrode. そして、その所望の位置にワイヤーがボンディングされる。 Then, the wire is bonded to its desired position.

【0018】(第3実施例)図3に本発明の第3実施例に係る製造方法を示す。 [0018] A manufacturing method according to a third embodiment of the present invention (Third Embodiment) FIG. この実施例では、まずシリコン基板11の全面に酸化シリコン層38を形成する。 In this example, first formed on the entire surface a silicon oxide layer 38 of the silicon substrate 11. そして、シリコン基板11の上面の酸化シリコン層を常法によりパターンニングしてELOパターン31を形成する(図3(a)参照)。 Then, a silicon oxide layer on the top surface of the silicon substrate 11 to form the ELO pattern 31 is patterned by a conventional method (see Figure 3 (a)). その後、MOCVD法を実行して基板11の上面にn−GaN層35を形成する。 Then run the MOCVD method to form a n-GaN layer 35 on the upper surface of the substrate 11. このn This n
−GaN層35はELO(Eptaxial Late -GaN layer 35 ELO (Eptaxial Late
ral Overgrowth)成長により好適な結晶性を有する(図3(b)参照)。 ral Overgrowth) has suitable crystallinity by growth reference (Figure 3 (b)). 続いて、発光層36及びp−GaN層37を同じくMOCVD法で形成する。 Subsequently, likewise formed by the MOCVD method a luminescent layer 36 and p-GaN layer 37.
これらIII族窒化物系化合物半導体層35〜37は前の実施例のIII族窒化物系化合物半導体層15〜17とそれぞれ同等の層である(図3(c)参照)。 These group III nitride compound semiconductor layer 35 to 37 are each equivalent to a layer with a Group III nitride compound semiconductor layer 15 to 17 of the previous embodiment (see Figure 3 (c)). そして、酸化シリコン層38を除去し、透光性電極39を蒸着して図3(d)の素子構成を得る。 Then, to remove the silicon oxide layer 38, obtaining the device configuration shown in FIG. 3 (d) by depositing translucent electrode 39.

【0019】本発明が適用される素子は上記の発光ダイオードに限定されるものではなく、受光ダイオード、レーザダイオード、太陽電池等の光素子の他、整流器、サイリスタ及びトランジスタ等のバイポーラ素子、FET [0019] device to which the present invention is applied is not limited to the above-mentioned light-emitting diode, light-receiving diodes, laser diodes, other optical devices such as a solar cell, a rectifier, bipolar devices such as thyristors and transistors, FET
等のユニポーラ素子並びにマイクロウェーブ素子などの電子デバイスにも適用できる。 It can be applied to electronic devices such as unipolar devices and microwave devices and the like. また、これらの素子の中間体としての積層体にも本発明は適用されるものである。 Further, it is understood that the present invention may be applied to the laminate as intermediates of these devices.

【0020】この発明は、上記発明の実施の形態及び実施例の説明に何ら限定されるものではない。 [0020] This invention is not intended to be limited to the description of embodiments and examples of the invention. 特許請求の範囲の記載を逸脱せず、当業者が容易に想到できる範囲で種々の変形態様もこの発明に含まれる。 Without departing from the description of the claims, various modifications within a range that a person skilled in the art can easily conceive also included in the present invention.

【0021】(11) シリコン基板の側壁を拡散防止層で被覆した状態でIII族窒化物系化合物半導体を前記シリコン基板の上面に成長させる、ことを特徴とする積層体の製造方法。 [0021] (11) The group III nitride compound semiconductor sidewalls of the silicon substrate in a state coated with the diffusion barrier layer is grown on the top surface of the silicon substrate, method for producing a laminate, characterized in that. (12) 前記III族窒化物系化合物半導体の成長温度は800〜1200℃である、ことを特徴とする(1 (12) wherein the growth temperature of the group III nitride compound semiconductor is 800 to 1200 ° C., it is characterized by (1
1)に記載の製造方法。 The method according to 1). (13) 前記拡散防止層は酸化シリコン又は窒化シリコンからなる、ことを特徴とする(11)又は(12) (13) the diffusion barrier layer is made of silicon oxide or silicon nitride, it is characterized by (11) or (12)
に記載の製造方法。 The method according to. (14) 前記拡散防止層を除去するステップが更に含まれる、ことを特徴とする(11)〜(13)のいずれかに記載の製造方法。 (14) The process according to any one of the step of removing the diffusion barrier layer is further included, wherein the (11) to (13). (15) シリコン基板上とその上に形成されたIII族窒化物系化合物半導体層からなる積層体であって、前記 (15) A laminate comprising a silicon substrate as the Group III nitride formed thereon a compound semiconductor layer, wherein
III族窒化物系化合物半導体層は前記シリコン基板の側壁を拡散防止層で被覆した状態で形成されたものである、ことを特徴とする積層体。 Group III nitride-based compound semiconductor layer is one formed in a state of being covered with the diffusion preventing layer sidewalls of the silicon substrate, laminate, characterized in that. (16) 前記III族窒化物系化合物半導体の成長温度は800〜1200℃である、ことを特徴とする(1 (16) Growth temperature of the group III nitride compound semiconductor is 800 to 1200 ° C., and wherein the (1
5)に記載の積層体。 The laminate according to 5). (17) 前記拡散防止層は酸化シリコン又は窒化シリコンからなる、ことを特徴とする(15)又は(16) (17) the diffusion barrier layer is made of silicon oxide or silicon nitride, it is characterized by (15) or (16)
に記載の積層体。 Laminate according to. (21) シリコン基板にIII族窒化物系化合物半導体層を形成するステップと、少なくとも一層のIII族窒化物系化合物半導体層を形成した後に前記シリコン基板の前記III族窒化物系化合物半導体層が形成されない面に酸化シリコン層を形成するステップと、を含んでなるII (21) forming a Group III nitride compound semiconductor layer on a silicon substrate, the group III nitride compound semiconductor layer of the silicon substrate after forming at least one layer of Group III nitride compound semiconductor layer is formed II comprising the steps of forming a silicon oxide layer on the surface which is not a
I族窒化物系化合物半導体素子の製造方法。 Method for producing I nitride compound semiconductor device. (22) シリコン基板にIII族窒化物系化合物半導体層を形成するステップと、前記ステップにより形成されたIII族窒化物系化合物半導体層/シリコン基板積層体において前記シリコン基板を選択的に酸化するステップと、を含んでなるIII族窒化物系化合物半導体素子の製造方法。 (22) forming a Group III nitride compound semiconductor layer on a silicon substrate, the step of selectively oxidizing the silicon substrate in the Group III nitride-based compound semiconductor layer / silicon substrate laminate formed by the steps When the comprising at group III manufacturing method of the nitride-based compound semiconductor device. (23) シリコン基板に少なくとも一層のIII族窒化物系化合物半導体層を形成するステップと、前記III族窒化物系化合物半導体層/シリコン基板積層体において少なくとも前記シリコン基板の側面にシリコンが前記II (23) forming at least one layer of Group III nitride compound semiconductor layer on a silicon substrate, the group III nitride compound semiconductor layer / silicon substrate silicon to at least a side surface of the silicon substrate is the in the laminate II
I族窒化物系化合物半導体層に拡散することを防止する拡散防止層を形成するステップと、を含んでなるIII族窒化物系化合物半導体素子の製造方法。 Steps and, the comprising at Group III manufacturing method of the nitride-based compound semiconductor elements forming a diffusion preventing layer for preventing the diffusion of the I nitride compound semiconductor layer. (24) 前記拡散防止層は酸化シリコン又は窒化シリコンである、ことを特徴とする(24)に記載の製造方法。 (24) the diffusion barrier layer is silicon oxide or silicon nitride, the production method according to (24) that. (25) 前記拡散防止層を除去するステップが更に含まれている、ことを特徴とする(23)又は(24)に記載の製造方法。 (25) The process according to the which further includes the step of removing the anti-diffusion layer, it is characterized by (23) or (24). (51) シリコン基板にIII族窒化物系化合物半導体層を形成するステップと、少なくとも一層のIII族窒化物系化合物半導体層を形成した後に前記シリコン基板の前記III族窒化物系化合物半導体層が形成されない面に酸化シリコン層を形成するステップと、を含んでなる積層体の製造方法。 (51) forming a Group III nitride compound semiconductor layer on a silicon substrate, the group III nitride compound semiconductor layer of the silicon substrate after forming at least one layer of Group III nitride compound semiconductor layer is formed steps and, the comprising at method for producing a laminate for forming a silicon oxide layer on the surface which is not. (52) シリコン基板にIII族窒化物系化合物半導体層を形成するステップと、前記ステップにより形成されたIII族窒化物系化合物半導体層/シリコン基板積層体において前記シリコン基板を選択的に酸化するステップと、を含んでなる積層体の製造方法。 (52) forming a Group III nitride compound semiconductor layer on a silicon substrate, the step of selectively oxidizing the silicon substrate in the Group III nitride-based compound semiconductor layer / silicon substrate laminate formed by the steps If, comprising the method of manufacturing the laminate. (53) シリコン基板に少なくとも一層のIII族窒化物系化合物半導体層を形成するステップと、前記III族窒化物系化合物半導体層/シリコン基板積層体において少なくとも前記シリコン基板の側面にシリコンが前記II (53) forming at least one layer of Group III nitride compound semiconductor layer on a silicon substrate, the group III nitride compound semiconductor layer / silicon substrate silicon to at least a side surface of the silicon substrate is the in the laminate II
I族窒化物系化合物半導体層に拡散することを防止する拡散防止層を形成するステップと、を含んでなる積層体の製造方法。 Step a comprises a method for producing a laminate for forming a diffusion preventing layer for preventing the diffusion of the I nitride compound semiconductor layer. (54) 前記拡散防止層は酸化シリコン又は窒化シリコンである、ことを特徴とする請求項(53)に記載の製造方法。 (54) The process according to claim (53) of the diffusion barrier layer is silicon oxide or silicon nitride, it is characterized. (55) 前記拡散防止層を除去するステップが更に含まれている、ことを特徴とする請求項(53)又は(5 (55) the preceding claims, the step of removing the diffusion barrier layer is further included, it is characterized by (53) or (5
4)に記載の製造方法。 The method according to 4).

【図面の簡単な説明】 BRIEF DESCRIPTION OF THE DRAWINGS

【図1】本実施例の発光素子10の構成を示した図である。 1 is a diagram showing the configuration of a light emitting device 10 of the present embodiment.

【図2】同じく発光素子10の製造方法を示した工程図である。 [2] which is also a process diagram showing a manufacturing method of the light emitting element 10.

【図3】本発明の他の実施例の製造方法を示す工程図である。 3 is a process diagram showing a manufacturing method of another embodiment of the present invention.

【符号の説明】 DESCRIPTION OF SYMBOLS

10 発光素子 11 基板 12 Al層 13 TiN層 14 バッファ層 15 nクラッド層 16 発光層 17 pクラッド層 18 拡散防止層 10 light-emitting element 11 substrate 12 Al layer 13 TiN layer 14 buffer layer 15 n-cladding layer 16 emitting layer 17 p-cladding layer 18 diffusion prevention layer

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Claims (7)

    【特許請求の範囲】 [The claims]
  1. 【請求項1】 シリコン基板の側壁を拡散防止層で被覆した状態でIII族窒化物系化合物半導体を前記シリコン基板の上面に成長させる、ことを特徴とするIII族窒化物系化合物半導体素子の製造方法。 Preparation of 1. A group III nitride compound semiconductor sidewalls of the silicon substrate in a state coated with the diffusion barrier layer is grown on the top surface of the silicon substrate, III nitride compound semiconductor device, characterized in that Method.
  2. 【請求項2】 前記III族窒化物系化合物半導体の成長温度は800〜1200℃である、ことを特徴とする請求項1に記載の製造方法。 Wherein the growth temperature of the group III nitride compound semiconductor is 800 to 1200 ° C., the manufacturing method according to claim 1, characterized in that.
  3. 【請求項3】 前記拡散防止層は酸化シリコン又は窒化シリコンからなる、ことを特徴とする請求項1又は2に記載の製造方法。 3. A process according to claim 1 or 2, wherein the diffusion barrier layer is made of silicon oxide or silicon nitride, it is characterized.
  4. 【請求項4】 前記拡散防止層を除去するステップが更に含まれる、ことを特徴とする請求項1〜3のいずれかに記載の製造方法。 Wherein the step of removing the diffusion barrier layer is further included, the production method according to claim 1, characterized in that.
  5. 【請求項5】 シリコン基板上に形成されたIII族窒化物系化合物半導体層を有する素子であって、 前記III族窒化物系化合物半導体層は前記シリコン基板の側壁を拡散防止層で被覆した状態で形成されたものである、ことを特徴とするIII族窒化物系化合物半導体素子。 5. A device comprising a group III nitride-based compound semiconductor layer formed on a silicon substrate, the group III nitride compound semiconductor layer is covered with the diffusion preventing layer sidewalls of the silicon substrate condition group III nitride compound semiconductor device in which those formed, characterized in that.
  6. 【請求項6】 前記III族窒化物系化合物半導体の成長温度は800〜1200℃である、ことを特徴とする請求項5に記載の素子。 6. The device of claim 5, wherein the growth temperature of the group III nitride compound semiconductor is 800 to 1200 ° C., it is characterized.
  7. 【請求項7】 前記拡散防止層は酸化シリコン又は窒化シリコンからなる、ことを特徴とする請求項5又は6に記載の素子。 Wherein said diffusion barrier layer is made of silicon oxide or silicon nitride, device according to claim 5 or 6, characterized in that.
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